From: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
To: <iommu@lists.linux-foundation.org>
Cc: <scottwood@freescale.com>, <Varun.Sethi@freescale.com>,
<linuxppc-dev@lists.ozlabs.org>,
Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
Subject: [PATCH 7/7] iommu/fsl: Added cache controller compatible strings for SOCs
Date: Mon, 7 Mar 2016 17:34:23 +0200 [thread overview]
Message-ID: <1457364863-18004-8-git-send-email-codrin.ciubotariu@nxp.com> (raw)
In-Reply-To: <1457364863-18004-1-git-send-email-codrin.ciubotariu@nxp.com>
From: Varun Sethi <Varun.Sethi@freescale.com>
Added cache controller compatible strings for T2080, B4420, T1040
and T1024. PAMU driver searches for a matching string while setting
up L3 cache stashing.
Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com>
---
drivers/iommu/fsl_pamu.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index 290231a..47f54fe 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -63,12 +63,20 @@ static const struct of_device_id guts_device_ids[] = {
/*
* Table for matching compatible strings, for device tree
* L3 cache controller node.
+ * "fsl,t1024-l3-cache-controller" corresponds to T1024,
+ * "fsl,t1040-l3-cache-controller" corresponds to T1040,
+ * "fsl,b4420-l3-cache-controller" corresponds to B4420,
+ * "fsl,t2080-l3-cache-controller" corresponds to T2080,
* "fsl,t4240-l3-cache-controller" corresponds to T4,
* "fsl,b4860-l3-cache-controller" corresponds to B4 &
* "fsl,p4080-l3-cache-controller" corresponds to other,
* SOCs.
*/
static const struct of_device_id l3_device_ids[] = {
+ { .compatible = "fsl,t1024-l3-cache-controller", },
+ { .compatible = "fsl,t1040-l3-cache-controller", },
+ { .compatible = "fsl,b4420-l3-cache-controller", },
+ { .compatible = "fsl,t2080-l3-cache-controller", },
{ .compatible = "fsl,t4240-l3-cache-controller", },
{ .compatible = "fsl,b4860-l3-cache-controller", },
{ .compatible = "fsl,p4080-l3-cache-controller", },
@@ -647,6 +655,8 @@ u32 get_stash_id(u32 stash_dest_hint, u32 vcpu)
of_node_put(node);
return be32_to_cpup(prop);
}
+ pr_err("%s: Failed to get L3 cache controller information\n",
+ __func__);
return ~(u32)0;
}
--
1.9.3
next prev parent reply other threads:[~2016-03-07 15:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-07 15:34 [PATCH 0/7] PAMU driver update Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 1/7] iommu/fsl: Fix most checkpatch warnings and typos Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 2/7] iommu/fsl: Work around erratum A-007907 Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 3/7] iommu/fsl: Enable OMT cache, before invalidating PAACT and SPAACT cache Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 4/7] iommu/fsl: Factor out PCI specific code Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 5/7] iommu/fsl: Enable default DMA window for PCIe devices once detached from domain Codrin Ciubotariu
2016-03-07 15:34 ` [PATCH 6/7] iommu/fsl: PAMU power management support Codrin Ciubotariu
2016-03-07 15:34 ` Codrin Ciubotariu [this message]
2016-03-22 13:59 ` [PATCH 0/7] PAMU driver update Codrin Constantin Ciubotariu
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