From: Philippe Bergheaud <felix@linux.vnet.ibm.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: mpe@ellerman.id.au, imunsie@au1.ibm.com, mikey@neuling.org,
Philippe Bergheaud <felix@linux.vnet.ibm.com>
Subject: [PATCH v3 1/2] powerpc: Define PVR value for POWER8NVL processor
Date: Thu, 31 Mar 2016 11:19:27 +0200 [thread overview]
Message-ID: <1459415968-4890-1-git-send-email-felix@linux.vnet.ibm.com> (raw)
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
V2:
- New patch, added to patch set
V3:
- no change
arch/powerpc/include/asm/reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f5f4c66..cf09c6e 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1182,6 +1182,7 @@
#define PVR_970GX 0x0045
#define PVR_POWER7p 0x004A
#define PVR_POWER8E 0x004B
+#define PVR_POWER8NVL 0x004C
#define PVR_POWER8 0x004D
#define PVR_BE 0x0070
#define PVR_PA6T 0x0090
--
2.1.0
next reply other threads:[~2016-03-31 9:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-31 9:19 Philippe Bergheaud [this message]
2016-03-31 9:19 ` [PATCH v3 2/2] cxl: Configure the PSL for two CAPI ports on POWER8NVL Philippe Bergheaud
2016-04-11 12:35 ` [v3,2/2] " Michael Ellerman
2016-04-11 12:35 ` [v3,1/2] powerpc: Define PVR value for POWER8NVL processor Michael Ellerman
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