[PATCH kernel v3 0/9] powerpc/powernv/npu: Enable PCI pass through for NVLink

[Alexey Kardashevskiy <aik@ozlabs.ru>]

IBM POWER8 NVlink systems contain usual Tesla K40-ish GPUs but also
contain a couple of really fast links between GPU and CPU. These links
are exposed to the userspace by the OPAL firmware as bridges.
In order to make these links work when GPU is passed to the guest,
these bridges need to be passed as well; otherwise performance will
degrade. More details are in 10/10.

This reworks the existing NPU support in the powernv platform and adds
VFIO support on top of that.

There was no v2 of this patchset, just a last patch, this is why this
is v3 and most changes went to "powerpc/powernv/npu: Enable NVLink pass through".

This was tested on POWER8NVL platform. pvr=0x004c0100.

Please comment. Thanks.


Alexey Kardashevskiy (9):
  vfio/spapr: Relax the IOMMU compatibility check
  powerpc/powernv: Rename pnv_pci_ioda2_tce_invalidate_entire
  powerpc/powernv: Define TCE Kill flags
  powerpc/powernv/npu: TCE Kill helpers cleanup
  powerpc/powernv/npu: Use the correct IOMMU page size
  powerpc/powernv/npu: Simplify DMA setup
  powerpc/powernv/npu: Rework TCE Kill handling
  powerpc/powernv/ioda2: Export debug helper pe_level_printk()
  powerpc/powernv/npu: Enable NVLink pass through

 arch/powerpc/platforms/powernv/npu-dma.c  | 340 +++++++++++++++++-------------
 arch/powerpc/platforms/powernv/pci-ioda.c | 227 +++++++++++++-------
 arch/powerpc/platforms/powernv/pci.h      |  31 +--
 drivers/vfio/vfio_iommu_spapr_tce.c       |   3 +-
 4 files changed, 360 insertions(+), 241 deletions(-)

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2.5.0.rc3