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From: Michael Neuling <mikey@neuling.org>
To: Michael Ellerman <mpe@ellerman.id.au>,
	Jack Miller <jack@codezen.org>,
	linuxppc-dev@lists.ozlabs.org
Cc: anton@samba.org
Subject: Re: [PATCH 3/3] powerpc: Load Monitor Register Tests
Date: Wed, 04 May 2016 21:41:16 +1000	[thread overview]
Message-ID: <1462362076.4115.89.camel@neuling.org> (raw)
In-Reply-To: <1462361464.1846.3.camel@ellerman.id.au>

On Wed, 2016-05-04 at 21:31 +1000, Michael Ellerman wrote:
> On Wed, 2016-05-04 at 20:43 +1000, Michael Neuling wrote:
> >=20
> > On Mon, 2016-04-18 at 16:08 -0500, Jack Miller wrote:
> >=20
> > >=20
> > > +int ebb_lmr(void)
> > > +{
> > > +	int i;
> > > +
> > > +	SKIP_IF(!ebb_is_supported());
> > We skip this test currently as EBB is not enabled on POWER9.
> >=20
> > On POWER8 we enable EBB in the PMU code. Should we do this elsewhere fo=
r
> > POWER9 since EBB doesn't directly require the PMU?
> Probably. But we will need to check that if the PMU code is *not* enabled=
 we
> still do the context switching of EBB regs correctly. We probably do, but=
 I
> don't now for sure.

I think we're fine. =C2=A0The code to switch BESCR, EBBHR & EBBRR is in
save/restore_sprs() and just depends on cpu_has_feature(CPU_FTR_ARCH_207S).

Actually, do we really need be using PPC_FEATURE2_EBB for this test? Should
we really be using PPC_FEATURE2_ARCH_3_00?

Should the existing=C2=A0PPC_FEATURE2_EBB really signify=C2=A0PPC_FEATURE2_=
EBB_PMU?

Mikey

  reply	other threads:[~2016-05-04 11:41 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-18 19:07 [v2] P9 ldmx support Jack Miller
2016-04-18 19:08 ` [PATCH 1/3] powerpc: Complete FSCR context switch Jack Miller
2016-04-18 19:08 ` [PATCH 2/3] powerpc: Load Monitor Register Support Jack Miller
2016-04-18 20:47   ` kbuild test robot
2016-04-18 21:08     ` [v3] P9 ldmx support Jack Miller
2016-04-18 21:08       ` [PATCH 1/3] powerpc: Complete FSCR context switch Jack Miller
2016-05-04 11:16         ` [PATCH v4] " Michael Neuling
2016-05-06  2:30           ` [PATCH v5 0/3] POWER9 Load Monitor Support Michael Neuling
2016-05-06  2:30             ` [PATCH v5 1/3] powerpc: Improve FSCR init and context switching Michael Neuling
2016-05-06  2:30             ` [PATCH v5 2/3] powerpc: Load Monitor Register Support Michael Neuling
2016-05-06  2:30             ` [PATCH v5 3/3] powerpc: Load Monitor Register Tests Michael Neuling
2016-06-08 10:38             ` [PATCH v6 0/3] POWER9 Load Monitor Support Michael Neuling
2016-06-08 10:38               ` [PATCH v6 1/3] powerpc: Improve FSCR init and context switching Michael Neuling
2016-06-08 10:38               ` [PATCH v6 2/3] powerpc: Load Monitor Register Support Michael Neuling
2016-06-08 10:38               ` [PATCH v6 3/3] powerpc: Load Monitor Register Tests Michael Neuling
2016-06-09  2:31               ` [PATCH v7 0/3] POWER9 Load Monitor Support Michael Neuling
2016-06-09  2:31                 ` [PATCH v7 1/3] powerpc: Improve FSCR init and context switching Michael Neuling
2016-06-21 12:27                   ` [v7,1/3] " Michael Ellerman
2016-06-09  2:31                 ` [PATCH v7 2/3] powerpc: Load Monitor Register Support Michael Neuling
2016-06-21 12:27                   ` [v7,2/3] " Michael Ellerman
2016-06-09  2:31                 ` [PATCH v7 3/3] powerpc: Load Monitor Register Tests Michael Neuling
2016-06-21 12:27                   ` [v7,3/3] " Michael Ellerman
2016-04-18 21:08       ` [PATCH 2/3] powerpc: Load Monitor Register Support Jack Miller
2016-04-18 21:08       ` [PATCH 3/3] powerpc: Load Monitor Register Tests Jack Miller
2016-05-04 10:43         ` Michael Neuling
2016-05-04 11:31           ` Michael Ellerman
2016-05-04 11:41             ` Michael Neuling [this message]
2016-04-18 19:08 ` Jack Miller
  -- strict thread matches above, loose matches on Subject: below --
2016-04-11 18:57 [RFC] P9 ldmx support Jack Miller
2016-04-11 18:57 ` [PATCH 3/3] powerpc: Load Monitor Register Tests Jack Miller
2016-04-15 10:34   ` Madhavan Srinivasan

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