linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v6 1/7] QE: Add IC, SI and SIRAM document to device tree bindings.
@ 2016-05-17  2:38 Zhao Qiang
  2016-05-17  2:38 ` [PATCH v6 2/7] QE: Add ucc hdlc document to bindings Zhao Qiang
                   ` (5 more replies)
  0 siblings, 6 replies; 8+ messages in thread
From: Zhao Qiang @ 2016-05-17  2:38 UTC (permalink / raw)
  To: oss; +Cc: devicetree, linuxppc-dev, xiaobo.xie, Zhao Qiang

Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
---
changes for v2
	- Add interrupt-controller in Required properties
	- delete address-cells and size-cells for qe-si and qe-siram
Changes for v3
	- Add SoC specific caompatible strings to qe-si and qe-siram
Changes for v4
	- NA 
Changes for v5
	- NA 
Changes for v6
	- modify property to "fsl,<chip>-qe-si" and "fsl,<chip>-qe-siram"

 .../devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt  | 52 ++++++++++++++++++++++
 1 file changed, 52 insertions(+)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
index 4f89302..d7afaff 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
@@ -69,6 +69,58 @@ Example:
 	};
      };
 
+* Interrupt Controller (IC)
+
+Required properties:
+- compatible : should be "fsl,qe-ic".
+- reg : Address range of IC register set.
+- interrupts : interrupts generated by the device.
+- interrupt-controller : this device is a interrupt controller.
+
+Example:
+
+	qeic: interrupt-controller@80 {
+		interrupt-controller;
+		compatible = "fsl,qe-ic";
+		#address-cells = <0>;
+		#interrupt-cells = <1>;
+		reg = <0x80 0x80>;
+		interrupts = <95 2 0 0  94 2 0 0>;
+	};
+
+* Serial Interface Block (SI)
+
+The SI manages the routing of eight TDM lines to the QE block serial drivers
+, the MCC and the UCCs, for receive and transmit.
+
+Required properties:
+- compatible : must be "fsl,<chip>-qe-si". For t1040, must contain
+  "fsl,t1040-qe-si".
+- reg : Address range of SI register set.
+
+Example:
+
+	si1: si@700 {
+		compatible = "fsl,t1040-qe-si";
+		reg = <0x700 0x80>;
+	};
+
+* Serial Interface Block RAM(SIRAM)
+
+store the routing entries of SI
+
+Required properties:
+- compatible : should be "fsl,<chip>-qe-siram". For t1040, must contain
+  "fsl,t1040-qe-siram".
+- reg : Address range of SI RAM.
+
+Example:
+
+	siram1: siram@1000 {
+		compatible = "fsl,t1040-qe-siram";
+		reg = <0x1000 0x800>;
+	};
+
 * QE Firmware Node
 
 This node defines a firmware binary that is embedded in the device tree, for
-- 
2.1.0.27.g96db324

^ permalink raw reply related	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2016-05-18 16:47 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-05-17  2:38 [PATCH v6 1/7] QE: Add IC, SI and SIRAM document to device tree bindings Zhao Qiang
2016-05-17  2:38 ` [PATCH v6 2/7] QE: Add ucc hdlc document to bindings Zhao Qiang
2016-05-17  2:38 ` [PATCH v6 3/7] QE: Add uqe_serial " Zhao Qiang
2016-05-18 16:47   ` Rob Herring
2016-05-17  2:39 ` [PATCH v6 4/7] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl Zhao Qiang
2016-05-17  2:39 ` [PATCH v6 5/7] T104xD4RDB: Add qe node to t104xd4rdb Zhao Qiang
2016-05-17  2:39 ` [PATCH v6 6/7] T104xRDB: Add qe node to t104xrdb Zhao Qiang
2016-05-17  2:39 ` [PATCH v6 7/7] T104xQDS: Add qe node to t104xqds Zhao Qiang

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).