From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154]) (using TLSv1.2 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rKxlH080nzDqc9 for ; Thu, 2 Jun 2016 16:14:34 +1000 (AEST) Received: from localhost by e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Thu, 2 Jun 2016 00:14:33 -0600 From: Yongji Xie To: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, iommu@lists.linux-foundation.org Cc: alex.williamson@redhat.com, bhelgaas@google.com, aik@ozlabs.ru, benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au, joro@8bytes.org, warrier@linux.vnet.ibm.com, zhong@linux.vnet.ibm.com, nikunj@linux.vnet.ibm.com, eric.auger@linaro.org, will.deacon@arm.com, gwshan@linux.vnet.ibm.com, alistair@popple.id.au, ruscur@russell.cc, kevin.tian@intel.com, David.Laight@ACULAB.COM Subject: [RESEND PATCH v2 1/6] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag Date: Thu, 2 Jun 2016 14:09:58 +0800 Message-Id: <1464847803-22756-2-git-send-email-xyjxie@linux.vnet.ibm.com> In-Reply-To: <1464847803-22756-1-git-send-email-xyjxie@linux.vnet.ibm.com> References: <1464847803-22756-1-git-send-email-xyjxie@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates interrupts of all devices on the bus are managed by the hardware enabling IRQ remapping(intel naming). When the capability is enabled, a given PCI device can only shoot the MSIs assigned for it. In other words, the hardware can protect system from invalid MSIs of the device by checking the target address and data when there is something wrong with MSI part in device or device driver. There is a existing flag for this capability in the IOMMU space: enum iommu_cap { IOMMU_CAP_CACHE_COHERENCY, ---> IOMMU_CAP_INTR_REMAP, IOMMU_CAP_NOEXEC, }; and Eric also posted a patchset [1] to abstract it on MSI controller side for ARM. But it would make sense to have a more common flag like PCI_BUS_FLAGS_MSI_REMAP so that we can use a universal flag to test this capability on PCI side for different archs. With this flag enabled, we can easily know whether it's safe to expose MSI-X tables of PCI BARs to userspace. Some usespace drivers such as VFIO may benefit from this. [1] https://www.mail-archive.com/linux-kernel%40vger.kernel.org/msg1138820.html Signed-off-by: Yongji Xie --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index 932ec74..4ec37da 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -187,6 +187,7 @@ typedef unsigned short __bitwise pci_bus_flags_t; enum pci_bus_flags { PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, + PCI_BUS_FLAGS_MSI_REMAP = (__force pci_bus_flags_t) 4, }; /* These values come from the PCI Express Spec */ -- 1.7.9.5