[PATCH] powerpc/mm/radix: Update LPCR HR bit as per ISA

[PATCH] powerpc/mm/radix: Update LPCR HR bit as per ISA

[Aneesh Kumar K.V]

We need to se HR bit LPCR for radix partitions.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/reg.h  | 1 +
 arch/powerpc/mm/pgtable-radix.c | 4 ++--
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c1e82e968506..652147ef5ae3 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -348,6 +348,7 @@
 #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */
 #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */
 #define   LPCR_UPRT    0x00400000      /* Use Process Table (ISA 3) */
+#define	  LPCR_HR      0x00100000
 #ifndef SPRN_LPID
 #define SPRN_LPID	0x13F	/* Logical Partition Identifier */
 #endif
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index c939e6e57a9e..73aa402047ef 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -340,7 +340,7 @@ void __init radix__early_init_mmu(void)
 	radix_init_page_sizes();
 	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
 		lpcr = mfspr(SPRN_LPCR);
-		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
+		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
 		radix_init_partition_table();
 	}
 
@@ -355,7 +355,7 @@ void radix__early_init_mmu_secondary(void)
 	 */
 	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
 		lpcr = mfspr(SPRN_LPCR);
-		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
+		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
 
 		mtspr(SPRN_PTCR,
 		      __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));
-- 
2.7.4

Re: [PATCH] powerpc/mm/radix: Update LPCR HR bit as per ISA

[Benjamin Herrenschmidt]

On Thu, 2016-06-02 at 15:10 +0530, Aneesh Kumar K.V wrote:
> We need to se HR bit LPCR for radix partitions.

Again (:-) pleaaaaase.... a better changeset description. In fact this
one is actually incorrect, this is not a partition.

Something like "The processor requires the MMU mode (radix vs. hash) of
the hypervisor to be mirrored in the LPCR register, in addition to the
partition table, so as to avoid fetching from the table when deciding,
among other things, how to perform transitions to HV mode on some
interrupts. So let's set it up appropriately".

Cheers,
Ben.

> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/asm/reg.h  | 1 +
>  arch/powerpc/mm/pgtable-radix.c | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/reg.h
> b/arch/powerpc/include/asm/reg.h
> index c1e82e968506..652147ef5ae3 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -348,6 +348,7 @@
>  #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit
> */
>  #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE)
> */
>  #define   LPCR_UPRT    0x00400000      /* Use Process Table (ISA 3)
> */
> +#define	  LPCR_HR      0x00100000
>  #ifndef SPRN_LPID
>  #define SPRN_LPID	0x13F	/* Logical Partition
> Identifier */
>  #endif
> diff --git a/arch/powerpc/mm/pgtable-radix.c
> b/arch/powerpc/mm/pgtable-radix.c
> index c939e6e57a9e..73aa402047ef 100644
> --- a/arch/powerpc/mm/pgtable-radix.c
> +++ b/arch/powerpc/mm/pgtable-radix.c
> @@ -340,7 +340,7 @@ void __init radix__early_init_mmu(void)
>  	radix_init_page_sizes();
>  	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
>  		lpcr = mfspr(SPRN_LPCR);
> -		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
> +		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
>  		radix_init_partition_table();
>  	}
>  
> @@ -355,7 +355,7 @@ void radix__early_init_mmu_secondary(void)
>  	 */
>  	if (!firmware_has_feature(FW_FEATURE_LPAR)) {
>  		lpcr = mfspr(SPRN_LPCR);
> -		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);
> +		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
>  
>  		mtspr(SPRN_PTCR,
>  		      __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));

Re: powerpc/mm/radix: Update LPCR HR bit as per ISA

[Michael Ellerman]

On Thu, 2016-02-06 at 09:40:57 UTC, "Aneesh Kumar K.V" wrote:
> We need to se HR bit LPCR for radix partitions.
 
Please update the change log with something similar to what Ben sent.

> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> ---
>  arch/powerpc/include/asm/reg.h  | 1 +
>  arch/powerpc/mm/pgtable-radix.c | 4 ++--
>  2 files changed, 3 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
> index c1e82e968506..652147ef5ae3 100644
> --- a/arch/powerpc/include/asm/reg.h
> +++ b/arch/powerpc/include/asm/reg.h
> @@ -348,6 +348,7 @@
>  #define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */
>  #define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */
>  #define   LPCR_UPRT    0x00400000      /* Use Process Table (ISA 3) */
> +#define	  LPCR_HR      0x00100000

What is this bit? Where is it documented?

Also white space is wrong.

cheers