From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH 3/3] powerpc/mm/radix: Flush page walk cache when freeing page table
Date: Fri, 03 Jun 2016 11:03:38 +1000 [thread overview]
Message-ID: <1464915818.26773.7.camel@kernel.crashing.org> (raw)
In-Reply-To: <1464860789-3672-3-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Thu, 2016-06-02 at 15:16 +0530, Aneesh Kumar K.V wrote:
>
>
> +/*
> + * flush the page walk cache for the address
> + */
> +void flush_tlb_pgtable(struct mmu_gather *tlb, unsigned long address)
> +{
> + struct mm_struct *mm = tlb->mm;
> + /*
> + * flush the page table walk cache on freeing page table. We already
> + * have marked the upper/higher level page table entry none by now.
> + * So it is safe to flush PWC here.
> + */
> + if (!radix_enabled())
> + return;
> + radix__flush_tlb_mm_pwc(mm);
That means that on hash, we pay the price of a useless function call
and return. Shouldn't we put the radix_enabled() test in the caller
instead ?
Cheers,
Ben.
next prev parent reply other threads:[~2016-06-03 1:03 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-02 9:46 [PATCH 1/3] Fix .long's in mm/tlb-radix.c to more meaningful Aneesh Kumar K.V
2016-06-02 9:46 ` [PATCH 2/3] powerpc/mm/radix: Update to tlb functions ric argument Aneesh Kumar K.V
2016-06-02 9:46 ` [PATCH 3/3] powerpc/mm/radix: Flush page walk cache when freeing page table Aneesh Kumar K.V
2016-06-03 1:03 ` Benjamin Herrenschmidt [this message]
2016-06-03 2:59 ` Aneesh Kumar K.V
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