From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH V2 06/16] powerpc/mm/hash: Add helper for finding SLBE LLP encoding
Date: Wed, 8 Jun 2016 20:13:13 +0530 [thread overview]
Message-ID: <1465397003-26812-7-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1465397003-26812-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
Replace opencoding of the same at multiple places with the helper.
No functional change with this patch.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/book3s/64/mmu-hash.h | 9 +++++++++
arch/powerpc/include/asm/kvm_book3s_64.h | 3 +--
arch/powerpc/mm/hash_native_64.c | 6 ++----
3 files changed, 12 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
index 74839f24f412..b042e5f9a428 100644
--- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
+++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
@@ -151,6 +151,15 @@ static inline unsigned int mmu_psize_to_shift(unsigned int mmu_psize)
BUG();
}
+static inline unsigned long get_sllp_encoding(int psize)
+{
+ unsigned long sllp;
+
+ sllp = ((mmu_psize_defs[psize].sllp & SLB_VSID_L) >> 6) |
+ ((mmu_psize_defs[psize].sllp & SLB_VSID_LP) >> 4);
+ return sllp;
+}
+
#endif /* __ASSEMBLY__ */
/*
diff --git a/arch/powerpc/include/asm/kvm_book3s_64.h b/arch/powerpc/include/asm/kvm_book3s_64.h
index 1f4497fb5b83..88d17b4ea9c8 100644
--- a/arch/powerpc/include/asm/kvm_book3s_64.h
+++ b/arch/powerpc/include/asm/kvm_book3s_64.h
@@ -181,8 +181,7 @@ static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
switch (b_psize) {
case MMU_PAGE_4K:
- sllp = ((mmu_psize_defs[a_psize].sllp & SLB_VSID_L) >> 6) |
- ((mmu_psize_defs[a_psize].sllp & SLB_VSID_LP) >> 4);
+ sllp = get_sllp_encoding(a_psize);
rb |= sllp << 5; /* AP field */
rb |= (va_low & 0x7ff) << 12; /* remaining 11 bits of AVA */
break;
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 4c6d4c736ba4..fd483948981a 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -72,8 +72,7 @@ static inline void __tlbie(unsigned long vpn, int psize, int apsize, int ssize)
/* clear out bits after (52) [0....52.....63] */
va &= ~((1ul << (64 - 52)) - 1);
va |= ssize << 8;
- sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
- ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
+ sllp = get_sllp_encoding(apsize);
va |= sllp << 5;
asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
: : "r" (va), "r"(0), "i" (CPU_FTR_ARCH_206)
@@ -122,8 +121,7 @@ static inline void __tlbiel(unsigned long vpn, int psize, int apsize, int ssize)
/* clear out bits after(52) [0....52.....63] */
va &= ~((1ul << (64 - 52)) - 1);
va |= ssize << 8;
- sllp = ((mmu_psize_defs[apsize].sllp & SLB_VSID_L) >> 6) |
- ((mmu_psize_defs[apsize].sllp & SLB_VSID_LP) >> 4);
+ sllp = get_sllp_encoding(apsize);
va |= sllp << 5;
asm volatile(".long 0x7c000224 | (%0 << 11) | (0 << 21)"
: : "r"(va) : "memory");
--
2.7.4
next prev parent reply other threads:[~2016-06-08 14:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-08 14:43 [PATCH V2 00/16] TLB flush improvments and Segment table support Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 01/16] mm/hugetlb: Simplify hugetlb unmap Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 02/16] mm: Change the interface for __tlb_remove_page Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 03/16] mm/mmu_gather: Track page size with mmu gather and force flush if page size change Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 04/16] powerpc/mm/radix: Implement tlb mmu gather flush efficiently Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 05/16] powerpc/mm: Make MMU_FTR_RADIX a MMU family feature Aneesh Kumar K.V
2016-06-08 14:43 ` Aneesh Kumar K.V [this message]
2016-06-08 14:43 ` [PATCH V2 07/16] powerpc/mm: Use hugetlb flush functions Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 08/16] powerpc/mm: Drop multiple definition of mm_is_core_local Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 09/16] powerpc/mm/radix: Add tlb flush of THP ptes Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 10/16] powerpc/mm/radix: Rename function and drop unused arg Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 11/16] powerpc/mm/radix/hugetlb: Add helper for finding page size from hstate Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 12/16] powerpc/mm/hugetlb: Add flush_hugetlb_tlb_range Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 13/16] powerpc/mm: remove flush_tlb_page_nohash Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 14/16] powerpc/mm: Cleanup LPCR defines Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 15/16] powerpc/mm: Switch user slb fault handling to translation enabled Aneesh Kumar K.V
2016-06-08 14:43 ` [PATCH V2 16/16] powerpc/mm: Support segment table for Power9 Aneesh Kumar K.V
2016-06-08 15:07 ` Aneesh Kumar K.V
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