From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3rYYy00Hj4zDqhh for ; Tue, 21 Jun 2016 14:04:07 +1000 (AEST) Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id u5L3xnIU068014 for ; Tue, 21 Jun 2016 00:04:06 -0400 Received: from e33.co.us.ibm.com (e33.co.us.ibm.com [32.97.110.151]) by mx0a-001b2d01.pphosted.com with ESMTP id 23n2cqv1ds-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 21 Jun 2016 00:04:06 -0400 Received: from localhost by e33.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 20 Jun 2016 22:04:04 -0600 From: Sukadev Bhattiprolu To: mingo@redhat.com, ak@linux.intel.com, Michael Ellerman , Jiri Olsa , Arnaldo Carvalho de Melo Cc: peterz@infradead.org, maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, Subject: [PATCH v20 19/20] perf, tools, pmu-events: Add Skylake frontend MSR support Date: Mon, 20 Jun 2016 21:02:49 -0700 In-Reply-To: <1466481770-25290-1-git-send-email-sukadev@linux.vnet.ibm.com> References: <1466481770-25290-1-git-send-email-sukadev@linux.vnet.ibm.com> Message-Id: <1466481770-25290-20-git-send-email-sukadev@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Andi Kleen Add support for the "frontend" extra MSR on Skylake in the JSON conversion. Signed-off-by: Andi Kleen --- tools/perf/pmu-events/jevents.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/pmu-events/jevents.c b/tools/perf/pmu-events/jevents.c index c8d8e4a..0e43dce 100644 --- a/tools/perf/pmu-events/jevents.c +++ b/tools/perf/pmu-events/jevents.c @@ -126,6 +126,7 @@ static struct msrmap { { "0x3F6", "ldlat=" }, { "0x1A6", "offcore_rsp=" }, { "0x1A7", "offcore_rsp=" }, + { "0x3F7", "frontend=" }, { NULL, NULL } }; -- 2.5.3