From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH for-4.8 09/12] powerpc/mm/radix: Update machine call back to support new HCALL.
Date: Wed, 13 Jul 2016 15:05:28 +0530 [thread overview]
Message-ID: <1468402531-4914-10-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1468402531-4914-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
This update the machine dep callback such that we can use the same
callback to register process table. The interface is updated such that
we can easily call H_REGISTER_PROC_TBL hcall. The HCALL itself is
introduced in a later patch.
No functionality change introduced by this patch.
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/machdep.h | 3 ++-
arch/powerpc/mm/hash_native_64.c | 10 ++++++++--
arch/powerpc/mm/pgtable-radix.c | 9 ++++++---
3 files changed, 16 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index 6bdcd0da9e21..4c8260855748 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -256,7 +256,8 @@ struct machdep_calls {
#ifdef CONFIG_ARCH_RANDOM
int (*get_random_seed)(unsigned long *v);
#endif
- int (*update_partition_table)(u64);
+ int (*register_process_table)(unsigned long base, unsigned long page_size,
+ unsigned long tbl_size);
};
extern void e500_idle(void);
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 70521ef171fc..cb3b4c98b637 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -725,8 +725,14 @@ static void native_flush_hash_range(unsigned long number, int local)
local_irq_restore(flags);
}
-static int native_update_partition_table(u64 patb1)
+static int native_register_proc_table(unsigned long base, unsigned long page_size,
+ unsigned long table_size)
{
+ unsigned long patb1 = base << 25; /* VSID */
+
+ patb1 |= (page_size << 5); /* sllp */
+ patb1 |= table_size;
+
partition_tb->patb1 = cpu_to_be64(patb1);
return 0;
}
@@ -743,5 +749,5 @@ void __init hpte_init_native(void)
ppc_md.hugepage_invalidate = native_hugepage_invalidate;
if (cpu_has_feature(CPU_FTR_ARCH_300))
- ppc_md.update_partition_table = native_update_partition_table;
+ ppc_md.register_process_table = native_register_proc_table;
}
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c
index 366d1ea24465..ce21a0f2c2a1 100644
--- a/arch/powerpc/mm/pgtable-radix.c
+++ b/arch/powerpc/mm/pgtable-radix.c
@@ -21,8 +21,11 @@
#include <trace/events/thp.h>
-static int native_update_partition_table(u64 patb1)
+static int native_register_process_table(unsigned long base, unsigned long pg_sz,
+ unsigned long table_size)
{
+ unsigned long patb1 = base | table_size | PATB_GR;
+
partition_tb->patb1 = cpu_to_be64(patb1);
return 0;
}
@@ -168,7 +171,7 @@ redo:
* of process table here. But our linear mapping also enable us to use
* physical address here.
*/
- ppc_md.update_partition_table(__pa(process_tb) | (PRTB_SIZE_SHIFT - 12) | PATB_GR);
+ ppc_md.register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
}
@@ -195,7 +198,7 @@ static void __init radix_init_partition_table(void)
void __init radix_init_native(void)
{
- ppc_md.update_partition_table = native_update_partition_table;
+ ppc_md.register_process_table = native_register_process_table;
}
static int __init get_idx_from_shift(unsigned int shift)
--
2.7.4
next prev parent reply other threads:[~2016-07-13 9:36 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-13 9:35 [PATCH for-4.8_set1 00/12] Radix fixes for 4.8 Aneesh Kumar K.V
2016-07-13 9:35 ` [PATCH for-4.8 01/12] Fix .long's in mm/tlb-radix.c to more meaningful Aneesh Kumar K.V
2016-07-17 10:28 ` [for-4.8,01/12] " Michael Ellerman
2016-07-13 9:35 ` [PATCH for-4.8 02/12] powerpc/mm/radix: Update LPCR HR bit as per ISA Aneesh Kumar K.V
2016-07-14 3:30 ` Balbir Singh
2016-07-13 9:35 ` [PATCH for-4.8 03/12] powerpc/mm: use _raw variant of page table accessors Aneesh Kumar K.V
2016-07-14 3:42 ` Balbir Singh
2016-07-15 11:42 ` David Laight
2016-07-17 5:22 ` Anton Blanchard
2016-07-13 9:35 ` [PATCH for-4.8 04/12] powerpc/mm: Compile out radix related functions if RADIX_MMU is disabled Aneesh Kumar K.V
2016-07-13 9:35 ` [PATCH for-4.8 05/12] powerpc/mm: Clear top 16 bits of va only on older cpus Aneesh Kumar K.V
2016-07-14 3:50 ` Balbir Singh
2016-07-13 9:35 ` [PATCH for-4.8 06/12] powerpc/mm: Print formation regarding the the MMU mode Aneesh Kumar K.V
2016-07-14 4:03 ` Balbir Singh
2016-07-13 9:35 ` [PATCH for-4.8 07/12] powerpc/mm/hash: Update SDR1 size encoding as documented in ISA 3.0 Aneesh Kumar K.V
2016-07-14 4:29 ` Balbir Singh
2016-07-13 9:35 ` [PATCH for-4.8 08/12] powerpc/mm/radix: Update PID switch sequence Aneesh Kumar K.V
2016-07-13 9:35 ` Aneesh Kumar K.V [this message]
2016-07-13 9:35 ` [PATCH for-4.8 10/12] powerpc/mm/radix: Add LPID based tlb flush helpers Aneesh Kumar K.V
2016-07-14 5:12 ` Balbir Singh
2016-07-13 9:35 ` [PATCH for-4.8 11/12] powerpc/mm: Cleanup LPCR defines Aneesh Kumar K.V
2016-07-13 9:35 ` [PATCH for-4.8 12/12] powerpc/mm/radix: Add a kernel command line to disable radix Aneesh Kumar K.V
2016-07-14 5:02 ` Balbir Singh
2016-07-14 8:43 ` Aneesh Kumar K.V
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