[PATCH v11 0/5] soc: fsl: Add initial guts driver

[PATCH v11 0/5] soc: fsl: Add initial guts driver

[Scott Wood]

This patchset adds the beginnings of a driver to consolidate accesses to
the Freescale/NXP "global utilities" block.  Initially only access to SVR
(the system version register) is provided.  This register is needed by
various drivers, mainly for errata detection.  Access to SVR via
mfspr(SPRN_SVR) is now discouraged, especially in drivers that are
not PPC-specific.

I plan to send this via the PPC tree for this merge window, to provide a
base for using/extending the guts driver in various drivers in the next
cycle.

Scott Wood (1):
  powerpc/fsl-pci: Use fsl_guts_get_svr()

Yangbo Lu (2):
  dt: bindings: move guts devicetree doc out of powerpc directory
  soc: fsl: add GUTS driver for QorIQ platforms

yangbo lu (2):
  dt: bindings: update Freescale DCFG compatible
  powerpc/fsl: move mpc85xx.h to include/linux/fsl

 Documentation/devicetree/bindings/arm/fsl.txt      |   6 +-
 .../bindings/{powerpc => soc}/fsl/guts.txt         |   3 +
 arch/powerpc/Kconfig                               |   1 +
 arch/powerpc/kernel/cpu_setup_fsl_booke.S          |   2 +-
 arch/powerpc/platforms/85xx/common.c               |   2 -
 arch/powerpc/sysdev/fsl_pci.c                      |   8 +-
 drivers/clk/clk-qoriq.c                            |   3 +-
 drivers/i2c/busses/i2c-mpc.c                       |   2 +-
 drivers/iommu/fsl_pamu.c                           |   3 +-
 drivers/net/ethernet/freescale/gianfar.c           |   2 +-
 drivers/soc/Kconfig                                |   2 +-
 drivers/soc/fsl/Kconfig                            |   8 ++
 drivers/soc/fsl/Makefile                           |   1 +
 drivers/soc/fsl/guts.c                             | 113 ++++++++++++++++++
 include/linux/fsl/guts.h                           | 126 +++++++++++++--------
 .../asm/mpc85xx.h => include/linux/fsl/svr.h       |   4 +-
 16 files changed, 223 insertions(+), 63 deletions(-)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

-- 
2.7.4

[PATCH v11 1/5] dt: bindings: update Freescale DCFG compatible

[Scott Wood]

From: yangbo lu <yangbo.lu@nxp.com>

Update Freescale DCFG compatible with 'fsl,<chip>-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Scott Wood <oss@buserror.net>
---
 Documentation/devicetree/bindings/arm/fsl.txt | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index dbbc095..713c1ae 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -119,7 +119,11 @@ Freescale DCFG
 configuration and status for the device. Such as setting the secondary
 core start address and release the secondary core from holdoff and startup.
   Required properties:
-  - compatible: should be "fsl,ls1021a-dcfg"
+  - compatible: should be "fsl,<chip>-dcfg"
+    Possible compatibles:
+	"fsl,ls1021a-dcfg"
+	"fsl,ls1043a-dcfg"
+	"fsl,ls2080a-dcfg"
   - reg : should contain base address and length of DCFG memory-mapped registers
 
 Example:
-- 
2.7.4

[PATCH v11 2/5] dt: bindings: move guts devicetree doc out of powerpc directory

[Scott Wood]

From: Yangbo Lu <yangbo.lu@nxp.com>

Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Scott Wood <oss@buserror.net>
---
 Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt | 3 +++
 1 file changed, 3 insertions(+)
 rename Documentation/devicetree/bindings/{powerpc => soc}/fsl/guts.txt (91%)

diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt b/Documentation/devicetree/bindings/soc/fsl/guts.txt
similarity index 91%
rename from Documentation/devicetree/bindings/powerpc/fsl/guts.txt
rename to Documentation/devicetree/bindings/soc/fsl/guts.txt
index b71b203..07adca9 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
+++ b/Documentation/devicetree/bindings/soc/fsl/guts.txt
@@ -25,6 +25,9 @@ Recommended properties:
  - fsl,liodn-bits : Indicates the number of defined bits in the LIODN
    registers, for those SOCs that have a PAMU device.
 
+ - little-endian : Indicates that the global utilities block is little
+   endian. The default is big endian.
+
 Examples:
 	global-utilities@e0000 {	/* global utilities block */
 		compatible = "fsl,mpc8548-guts";
-- 
2.7.4

[PATCH v11 3/5] soc: fsl: add GUTS driver for QorIQ platforms

[Scott Wood]

From: Yangbo Lu <yangbo.lu@nxp.com>

The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.

This patch adds a driver to manage and access global utilities block.
Initially only reading SVR is supported.  Other guts accesses, such as
reading RCW, should eventually be moved into this driver as well.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
[scottwood: minor cleanup]
Signed-off-by: Scott Wood <oss@buserror.net>
---
 arch/powerpc/platforms/85xx/common.c |   2 -
 drivers/soc/Kconfig                  |   2 +-
 drivers/soc/fsl/Kconfig              |   8 +++
 drivers/soc/fsl/Makefile             |   1 +
 drivers/soc/fsl/guts.c               | 113 +++++++++++++++++++++++++++++++
 include/linux/fsl/guts.h             | 126 ++++++++++++++++++++++-------------
 6 files changed, 201 insertions(+), 51 deletions(-)
 create mode 100644 drivers/soc/fsl/Kconfig
 create mode 100644 drivers/soc/fsl/guts.c

diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 28720a4..badd193 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -29,8 +29,6 @@ static const struct of_device_id mpc85xx_common_ids[] __initconst = {
 	{ .compatible = "fsl,srio", },
 	/* So that the DMA channel nodes can be probed individually: */
 	{ .compatible = "fsl,eloplus-dma", },
-	/* For the PMC driver */
-	{ .compatible = "fsl,mpc8548-guts", },
 	/* Probably unnecessary? */
 	{ .compatible = "gpio-leds", },
 	/* For all PCI controllers */
diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig
index cb58ef0..7106463 100644
--- a/drivers/soc/Kconfig
+++ b/drivers/soc/Kconfig
@@ -2,7 +2,7 @@ menu "SOC (System On Chip) specific Drivers"
 
 source "drivers/soc/bcm/Kconfig"
 source "drivers/soc/brcmstb/Kconfig"
-source "drivers/soc/fsl/qe/Kconfig"
+source "drivers/soc/fsl/Kconfig"
 source "drivers/soc/mediatek/Kconfig"
 source "drivers/soc/qcom/Kconfig"
 source "drivers/soc/rockchip/Kconfig"
diff --git a/drivers/soc/fsl/Kconfig b/drivers/soc/fsl/Kconfig
new file mode 100644
index 0000000..b313759
--- /dev/null
+++ b/drivers/soc/fsl/Kconfig
@@ -0,0 +1,8 @@
+#
+# Freescale SOC drivers
+#
+
+source "drivers/soc/fsl/qe/Kconfig"
+
+config FSL_GUTS
+	bool
diff --git a/drivers/soc/fsl/Makefile b/drivers/soc/fsl/Makefile
index 203307f..02afb7f 100644
--- a/drivers/soc/fsl/Makefile
+++ b/drivers/soc/fsl/Makefile
@@ -4,3 +4,4 @@
 
 obj-$(CONFIG_QUICC_ENGINE)		+= qe/
 obj-$(CONFIG_CPM)			+= qe/
+obj-$(CONFIG_FSL_GUTS)			+= guts.o
diff --git a/drivers/soc/fsl/guts.c b/drivers/soc/fsl/guts.c
new file mode 100644
index 0000000..b534654
--- /dev/null
+++ b/drivers/soc/fsl/guts.c
@@ -0,0 +1,113 @@
+/*
+ * Freescale QorIQ Platforms GUTS Driver
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/io.h>
+#include <linux/slab.h>
+#include <linux/mutex.h>
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/fsl/guts.h>
+
+struct guts {
+	struct ccsr_guts __iomem *regs;
+	bool little_endian;
+};
+
+static struct guts *guts;
+static DEFINE_MUTEX(guts_lock);
+
+u32 fsl_guts_get_svr(void)
+{
+	u32 svr = 0;
+
+	if (!guts || !guts->regs) {
+#ifdef CONFIG_PPC
+		svr =  mfspr(SPRN_SVR);
+#endif
+		return svr;
+	}
+
+	if (guts->little_endian)
+		svr = ioread32(&guts->regs->svr);
+	else
+		svr = ioread32be(&guts->regs->svr);
+
+	return svr;
+}
+EXPORT_SYMBOL(fsl_guts_get_svr);
+
+/*
+ * Table for matching compatible strings, for device tree
+ * guts node, for Freescale QorIQ SOCs.
+ */
+static const struct of_device_id guts_of_match[] = {
+	{ .compatible = "fsl,qoriq-device-config-1.0", },
+	{ .compatible = "fsl,qoriq-device-config-2.0", },
+	{ .compatible = "fsl,p1010-guts", },
+	{ .compatible = "fsl,p1020-guts", },
+	{ .compatible = "fsl,p1021-guts", },
+	{ .compatible = "fsl,p1022-guts", },
+	{ .compatible = "fsl,p1023-guts", },
+	{ .compatible = "fsl,p2020-guts", },
+	{ .compatible = "fsl,bsc9131-guts", },
+	{ .compatible = "fsl,bsc9132-guts", },
+	{ .compatible = "fsl,mpc8536-guts", },
+	{ .compatible = "fsl,mpc8544-guts", },
+	{ .compatible = "fsl,mpc8548-guts", },
+	{ .compatible = "fsl,mpc8568-guts", },
+	{ .compatible = "fsl,mpc8569-guts", },
+	{ .compatible = "fsl,mpc8572-guts", },
+	{ .compatible = "fsl,ls1021a-dcfg", },
+	{ .compatible = "fsl,ls1043a-dcfg", },
+	{ .compatible = "fsl,ls2080a-dcfg", },
+	{}
+};
+
+int fsl_guts_init(void)
+{
+	struct device_node *np;
+	int ret;
+
+	mutex_lock(&guts_lock);
+	/* Initialize guts only once */
+	if (guts) {
+		ret = guts->regs ? 0 : -ENOMEM;
+		goto out;
+	}
+
+	np = of_find_matching_node(NULL, guts_of_match);
+	if (!np) {
+		ret = -ENODEV;
+		goto out;
+	}
+
+	guts = kzalloc(sizeof(*guts), GFP_KERNEL);
+	if (!guts) {
+		ret = -ENOMEM;
+		goto out_np;
+	}
+
+	guts->little_endian = of_property_read_bool(np, "little-endian");
+
+	guts->regs = of_iomap(np, 0);
+	if (!guts->regs) {
+		ret = -ENOMEM;
+		goto out_np;
+	}
+
+	ret = 0;
+out_np:
+	of_node_put(np);
+out:
+	mutex_unlock(&guts_lock);
+	return ret;
+}
+EXPORT_SYMBOL(fsl_guts_init);
diff --git a/include/linux/fsl/guts.h b/include/linux/fsl/guts.h
index 649e917..7e1e22b 100644
--- a/include/linux/fsl/guts.h
+++ b/include/linux/fsl/guts.h
@@ -29,83 +29,113 @@
  * #ifdefs.
  */
 struct ccsr_guts {
-	__be32	porpllsr;	/* 0x.0000 - POR PLL Ratio Status Register */
-	__be32	porbmsr;	/* 0x.0004 - POR Boot Mode Status Register */
-	__be32	porimpscr;	/* 0x.0008 - POR I/O Impedance Status and Control Register */
-	__be32	pordevsr;	/* 0x.000c - POR I/O Device Status Register */
-	__be32	pordbgmsr;	/* 0x.0010 - POR Debug Mode Status Register */
-	__be32	pordevsr2;	/* 0x.0014 - POR device status register 2 */
+	u32	porpllsr;	/* 0x.0000 - POR PLL Ratio Status Register */
+	u32	porbmsr;	/* 0x.0004 - POR Boot Mode Status Register */
+	u32	porimpscr;	/* 0x.0008 - POR I/O Impedance Status and
+				 *           Control Register
+				 */
+	u32	pordevsr;	/* 0x.000c - POR I/O Device Status Register */
+	u32	pordbgmsr;	/* 0x.0010 - POR Debug Mode Status Register */
+	u32	pordevsr2;	/* 0x.0014 - POR device status register 2 */
 	u8	res018[0x20 - 0x18];
-	__be32	porcir;		/* 0x.0020 - POR Configuration Information Register */
+	u32	porcir;		/* 0x.0020 - POR Configuration Information
+				 *           Register
+				 */
 	u8	res024[0x30 - 0x24];
-	__be32	gpiocr;		/* 0x.0030 - GPIO Control Register */
+	u32	gpiocr;		/* 0x.0030 - GPIO Control Register */
 	u8	res034[0x40 - 0x34];
-	__be32	gpoutdr;	/* 0x.0040 - General-Purpose Output Data Register */
+	u32	gpoutdr;	/* 0x.0040 - General-Purpose Output Data
+				 *           Register
+				 */
 	u8	res044[0x50 - 0x44];
-	__be32	gpindr;		/* 0x.0050 - General-Purpose Input Data Register */
+	u32	gpindr;		/* 0x.0050 - General-Purpose Input Data
+				 *           Register
+				 */
 	u8	res054[0x60 - 0x54];
-	__be32	pmuxcr;		/* 0x.0060 - Alternate Function Signal Multiplex Control */
-        __be32  pmuxcr2;	/* 0x.0064 - Alternate function signal multiplex control 2 */
-        __be32  dmuxcr;		/* 0x.0068 - DMA Mux Control Register */
+	u32	pmuxcr;		/* 0x.0060 - Alternate Function Signal
+				 *           Multiplex Control
+				 */
+	u32	pmuxcr2;	/* 0x.0064 - Alternate function signal
+				 *           multiplex control 2
+				 */
+	u32	dmuxcr;		/* 0x.0068 - DMA Mux Control Register */
         u8	res06c[0x70 - 0x6c];
-	__be32	devdisr;	/* 0x.0070 - Device Disable Control */
+	u32	devdisr;	/* 0x.0070 - Device Disable Control */
 #define CCSR_GUTS_DEVDISR_TB1	0x00001000
 #define CCSR_GUTS_DEVDISR_TB0	0x00004000
-	__be32	devdisr2;	/* 0x.0074 - Device Disable Control 2 */
+	u32	devdisr2;	/* 0x.0074 - Device Disable Control 2 */
 	u8	res078[0x7c - 0x78];
-	__be32  pmjcr;		/* 0x.007c - 4 Power Management Jog Control Register */
-	__be32	powmgtcsr;	/* 0x.0080 - Power Management Status and Control Register */
-	__be32  pmrccr;		/* 0x.0084 - Power Management Reset Counter Configuration Register */
-	__be32  pmpdccr;	/* 0x.0088 - Power Management Power Down Counter Configuration Register */
-	__be32  pmcdr;		/* 0x.008c - 4Power management clock disable register */
-	__be32	mcpsumr;	/* 0x.0090 - Machine Check Summary Register */
-	__be32	rstrscr;	/* 0x.0094 - Reset Request Status and Control Register */
-	__be32  ectrstcr;	/* 0x.0098 - Exception reset control register */
-	__be32  autorstsr;	/* 0x.009c - Automatic reset status register */
-	__be32	pvr;		/* 0x.00a0 - Processor Version Register */
-	__be32	svr;		/* 0x.00a4 - System Version Register */
+	u32	pmjcr;		/* 0x.007c - 4 Power Management Jog Control
+				 *           Register
+				 */
+	u32	powmgtcsr;	/* 0x.0080 - Power Management Status and
+				 *           Control Register
+				 */
+	u32	pmrccr;		/* 0x.0084 - Power Management Reset Counter
+				 *           Configuration Register
+				 */
+	u32	pmpdccr;	/* 0x.0088 - Power Management Power Down Counter
+				 *           Configuration Register
+				 */
+	u32	pmcdr;		/* 0x.008c - 4Power management clock disable
+				 *           register
+				 */
+	u32	mcpsumr;	/* 0x.0090 - Machine Check Summary Register */
+	u32	rstrscr;	/* 0x.0094 - Reset Request Status and
+				 *           Control Register
+				 */
+	u32	ectrstcr;	/* 0x.0098 - Exception reset control register */
+	u32	autorstsr;	/* 0x.009c - Automatic reset status register */
+	u32	pvr;		/* 0x.00a0 - Processor Version Register */
+	u32	svr;		/* 0x.00a4 - System Version Register */
 	u8	res0a8[0xb0 - 0xa8];
-	__be32	rstcr;		/* 0x.00b0 - Reset Control Register */
+	u32	rstcr;		/* 0x.00b0 - Reset Control Register */
 	u8	res0b4[0xc0 - 0xb4];
-	__be32  iovselsr;	/* 0x.00c0 - I/O voltage select status register
+	u32	iovselsr;	/* 0x.00c0 - I/O voltage select status register
 					     Called 'elbcvselcr' on 86xx SOCs */
 	u8	res0c4[0x100 - 0xc4];
-	__be32	rcwsr[16];	/* 0x.0100 - Reset Control Word Status registers
+	u32	rcwsr[16];	/* 0x.0100 - Reset Control Word Status registers
 					     There are 16 registers */
 	u8	res140[0x224 - 0x140];
-	__be32  iodelay1;	/* 0x.0224 - IO delay control register 1 */
-	__be32  iodelay2;	/* 0x.0228 - IO delay control register 2 */
+	u32	iodelay1;	/* 0x.0224 - IO delay control register 1 */
+	u32	iodelay2;	/* 0x.0228 - IO delay control register 2 */
 	u8	res22c[0x604 - 0x22c];
-	__be32	pamubypenr; 	/* 0x.604 - PAMU bypass enable register */
+	u32	pamubypenr;	/* 0x.604 - PAMU bypass enable register */
 	u8	res608[0x800 - 0x608];
-	__be32	clkdvdr;	/* 0x.0800 - Clock Divide Register */
+	u32	clkdvdr;	/* 0x.0800 - Clock Divide Register */
 	u8	res804[0x900 - 0x804];
-	__be32	ircr;		/* 0x.0900 - Infrared Control Register */
+	u32	ircr;		/* 0x.0900 - Infrared Control Register */
 	u8	res904[0x908 - 0x904];
-	__be32	dmacr;		/* 0x.0908 - DMA Control Register */
+	u32	dmacr;		/* 0x.0908 - DMA Control Register */
 	u8	res90c[0x914 - 0x90c];
-	__be32	elbccr;		/* 0x.0914 - eLBC Control Register */
+	u32	elbccr;		/* 0x.0914 - eLBC Control Register */
 	u8	res918[0xb20 - 0x918];
-	__be32	ddr1clkdr;	/* 0x.0b20 - DDR1 Clock Disable Register */
-	__be32	ddr2clkdr;	/* 0x.0b24 - DDR2 Clock Disable Register */
-	__be32	ddrclkdr;	/* 0x.0b28 - DDR Clock Disable Register */
+	u32	ddr1clkdr;	/* 0x.0b20 - DDR1 Clock Disable Register */
+	u32	ddr2clkdr;	/* 0x.0b24 - DDR2 Clock Disable Register */
+	u32	ddrclkdr;	/* 0x.0b28 - DDR Clock Disable Register */
 	u8	resb2c[0xe00 - 0xb2c];
-	__be32	clkocr;		/* 0x.0e00 - Clock Out Select Register */
+	u32	clkocr;		/* 0x.0e00 - Clock Out Select Register */
 	u8	rese04[0xe10 - 0xe04];
-	__be32	ddrdllcr;	/* 0x.0e10 - DDR DLL Control Register */
+	u32	ddrdllcr;	/* 0x.0e10 - DDR DLL Control Register */
 	u8	rese14[0xe20 - 0xe14];
-	__be32	lbcdllcr;	/* 0x.0e20 - LBC DLL Control Register */
-	__be32  cpfor;		/* 0x.0e24 - L2 charge pump fuse override register */
+	u32	lbcdllcr;	/* 0x.0e20 - LBC DLL Control Register */
+	u32	cpfor;		/* 0x.0e24 - L2 charge pump fuse override
+				 *           register
+				 */
 	u8	rese28[0xf04 - 0xe28];
-	__be32	srds1cr0;	/* 0x.0f04 - SerDes1 Control Register 0 */
-	__be32	srds1cr1;	/* 0x.0f08 - SerDes1 Control Register 0 */
+	u32	srds1cr0;	/* 0x.0f04 - SerDes1 Control Register 0 */
+	u32	srds1cr1;	/* 0x.0f08 - SerDes1 Control Register 0 */
 	u8	resf0c[0xf2c - 0xf0c];
-	__be32  itcr;		/* 0x.0f2c - Internal transaction control register */
+	u32	itcr;		/* 0x.0f2c - Internal transaction control
+				 *           register
+				 */
 	u8	resf30[0xf40 - 0xf30];
-	__be32	srds2cr0;	/* 0x.0f40 - SerDes2 Control Register 0 */
-	__be32	srds2cr1;	/* 0x.0f44 - SerDes2 Control Register 0 */
+	u32	srds2cr0;	/* 0x.0f40 - SerDes2 Control Register 0 */
+	u32	srds2cr1;	/* 0x.0f44 - SerDes2 Control Register 0 */
 } __attribute__ ((packed));
 
+u32 fsl_guts_get_svr(void);
+int fsl_guts_init(void);
 
 /* Alternate function signal multiplex control */
 #define MPC85xx_PMUXCR_QE(x) (0x8000 >> (x))
-- 
2.7.4

[PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Scott Wood]

From: yangbo lu <yangbo.lu@nxp.com>

Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
header file.  This SVR numberspace is used on some ARM chips as well as
PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
need to ifdef the header inclusion and all references to the SVR symbols.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Joerg Roedel <jroedel@suse.de>
[scottwood: update description]
Signed-off-by: Scott Wood <oss@buserror.net>
---
 arch/powerpc/kernel/cpu_setup_fsl_booke.S                     | 2 +-
 arch/powerpc/sysdev/fsl_pci.c                                 | 2 +-
 drivers/clk/clk-qoriq.c                                       | 3 +--
 drivers/i2c/busses/i2c-mpc.c                                  | 2 +-
 drivers/iommu/fsl_pamu.c                                      | 3 +--
 drivers/net/ethernet/freescale/gianfar.c                      | 2 +-
 arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h | 4 ++--
 7 files changed, 8 insertions(+), 10 deletions(-)
 rename arch/powerpc/include/asm/mpc85xx.h => include/linux/fsl/svr.h (97%)

diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 462aed9..2b0284e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -13,13 +13,13 @@
  *
  */
 
+#include <linux/fsl/svr.h>
 #include <asm/page.h>
 #include <asm/processor.h>
 #include <asm/cputable.h>
 #include <asm/ppc_asm.h>
 #include <asm/mmu-book3e.h>
 #include <asm/asm-offsets.h>
-#include <asm/mpc85xx.h>
 
 _GLOBAL(__e500_icache_setup)
 	mfspr	r0, SPRN_L1CSR1
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0ef9df4..0fd1895 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/fsl/edac.h>
+#include <linux/fsl/svr.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
 #include <linux/memblock.h>
@@ -37,7 +38,6 @@
 #include <asm/pci-bridge.h>
 #include <asm/ppc-pci.h>
 #include <asm/machdep.h>
-#include <asm/mpc85xx.h>
 #include <asm/disassemble.h>
 #include <asm/ppc-opcode.h>
 #include <sysdev/fsl_soc.h>
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 58566a17..4b6c438 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -13,6 +13,7 @@
 #include <linux/clk.h>
 #include <linux/clk-provider.h>
 #include <linux/fsl/guts.h>
+#include <linux/fsl/svr.h>
 #include <linux/io.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
@@ -1149,8 +1150,6 @@ bad_args:
 }
 
 #ifdef CONFIG_PPC
-#include <asm/mpc85xx.h>
-
 static const u32 a4510_svrs[] __initconst = {
 	(SVR_P2040 << 8) | 0x10,	/* P2040 1.0 */
 	(SVR_P2040 << 8) | 0x11,	/* P2040 1.1 */
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 48ecffe..600704c 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -27,9 +27,9 @@
 #include <linux/i2c.h>
 #include <linux/interrupt.h>
 #include <linux/delay.h>
+#include <linux/fsl/svr.h>
 
 #include <asm/mpc52xx.h>
-#include <asm/mpc85xx.h>
 #include <sysdev/fsl_soc.h>
 
 #define DRV_NAME "mpc-i2c"
diff --git a/drivers/iommu/fsl_pamu.c b/drivers/iommu/fsl_pamu.c
index a34355f..af8fb27 100644
--- a/drivers/iommu/fsl_pamu.c
+++ b/drivers/iommu/fsl_pamu.c
@@ -21,11 +21,10 @@
 #include "fsl_pamu.h"
 
 #include <linux/fsl/guts.h>
+#include <linux/fsl/svr.h>
 #include <linux/interrupt.h>
 #include <linux/genalloc.h>
 
-#include <asm/mpc85xx.h>
-
 /* define indexes for each operation mapping scenario */
 #define OMI_QMAN        0x00
 #define OMI_FMAN        0x01
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 2e6785b..450d31f 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -86,11 +86,11 @@
 #include <linux/udp.h>
 #include <linux/in.h>
 #include <linux/net_tstamp.h>
+#include <linux/fsl/svr.h>
 
 #include <asm/io.h>
 #ifdef CONFIG_PPC
 #include <asm/reg.h>
-#include <asm/mpc85xx.h>
 #endif
 #include <asm/irq.h>
 #include <asm/uaccess.h>
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/include/linux/fsl/svr.h
similarity index 97%
rename from arch/powerpc/include/asm/mpc85xx.h
rename to include/linux/fsl/svr.h
index 213f3a8..8d13836 100644
--- a/arch/powerpc/include/asm/mpc85xx.h
+++ b/include/linux/fsl/svr.h
@@ -9,8 +9,8 @@
  * (at your option) any later version.
  */
 
-#ifndef __ASM_PPC_MPC85XX_H
-#define __ASM_PPC_MPC85XX_H
+#ifndef FSL_SVR_H
+#define FSL_SVR_H
 
 #define SVR_REV(svr)	((svr) & 0xFF)		/* SOC design resision */
 #define SVR_MAJ(svr)	(((svr) >>  4) & 0xF)	/* Major revision field*/
-- 
2.7.4

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Arnd Bergmann]

On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> From: yangbo lu <yangbo.lu@nxp.com>
> 
> Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> header file.  This SVR numberspace is used on some ARM chips as well as
> PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
> need to ifdef the header inclusion and all references to the SVR symbols.
> 
> Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> Acked-by: Wolfram Sang <wsa@the-dreams.de>
> Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> Acked-by: Joerg Roedel <jroedel@suse.de>
> [scottwood: update description]
> Signed-off-by: Scott Wood <oss@buserror.net>
> 

As discussed before, please don't introduce yet another vendor specific
way to match a SoC ID from a device driver.

I've posted a patch for an extension to the soc_device infrastructure
to allow comparing the running SoC to a table of devices, use that
instead.

	Arnd

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Scott Wood]

On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > 
> > From: yangbo lu <yangbo.lu@nxp.com>
> > 
> > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> > header file.  This SVR numberspace is used on some ARM chips as well as
> > PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
> > need to ifdef the header inclusion and all references to the SVR symbols.
> > 
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > Acked-by: Joerg Roedel <jroedel@suse.de>
> > [scottwood: update description]
> > Signed-off-by: Scott Wood <oss@buserror.net>
> > 
> As discussed before, please don't introduce yet another vendor specific
> way to match a SoC ID from a device driver.
> 
> I've posted a patch for an extension to the soc_device infrastructure
> to allow comparing the running SoC to a table of devices, use that
> instead.

As I asked before, in which relevant maintainership capacity are you NACKing
this?

-Scott

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Arnd Bergmann]

On Wednesday, July 20, 2016 1:31:48 PM CEST Scott Wood wrote:
> On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > 
> > > From: yangbo lu <yangbo.lu@nxp.com>
> > > 
> > > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> > > header file.  This SVR numberspace is used on some ARM chips as well as
> > > PPC, and even to check for a PPC SVR multi-arch drivers would otherwise
> > > need to ifdef the header inclusion and all references to the SVR symbols.
> > > 
> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > > Acked-by: Joerg Roedel <jroedel@suse.de>
> > > [scottwood: update description]
> > > Signed-off-by: Scott Wood <oss@buserror.net>
> > > 
> > As discussed before, please don't introduce yet another vendor specific
> > way to match a SoC ID from a device driver.
> > 
> > I've posted a patch for an extension to the soc_device infrastructure
> > to allow comparing the running SoC to a table of devices, use that
> > instead.
> 
> As I asked before, in which relevant maintainership capacity are you NACKing
> this?

I don't know why that's important, but I suggested the creation of
drivers/soc/ as a place to have a more general place for platform
specific drivers as part of being maintainer for arm-soc, and
almost all changes to drivers/soc go through our tree.

Olof does about half the merges, but I do the majority of the reviews
for drivers/soc patches. See also

git log --graph --format="%an %s" --merges drivers/soc/ 

	Arnd

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Michael Ellerman]

Quoting Scott Wood (2016-07-21 04:31:48)
> On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > =

> > > From: yangbo lu <yangbo.lu@nxp.com>
> > > =

> > > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> > > header file.=C2=A0=C2=A0This SVR numberspace is used on some ARM chip=
s as well as
> > > PPC, and even to check for a PPC SVR multi-arch drivers would otherwi=
se
> > > need to ifdef the header inclusion and all references to the SVR symb=
ols.
> > > =

> > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > > Acked-by: Joerg Roedel <jroedel@suse.de>
> > > [scottwood: update description]
> > > Signed-off-by: Scott Wood <oss@buserror.net>
> > > =

> > As discussed before, please don't introduce yet another vendor specific
> > way to match a SoC ID from a device driver.
> > =

> > I've posted a patch for an extension to the soc_device infrastructure
> > to allow comparing the running SoC to a table of devices, use that
> > instead.
> =

> As I asked before, in which relevant maintainership capacity are you NACK=
ing
> this?

I'll nack the powerpc part until you guys can agree.

cheers

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Scott Wood]

On Thu, 2016-07-21 at 20:26 +1000, Michael Ellerman wrote:
> Quoting Scott Wood (2016-07-21 04:31:48)
> > 
> > On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > > 
> > > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > > 
> > > > 
> > > > From: yangbo lu <yangbo.lu@nxp.com>
> > > > 
> > > > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a common
> > > > header file.  This SVR numberspace is used on some ARM chips as well
> > > > as
> > > > PPC, and even to check for a PPC SVR multi-arch drivers would
> > > > otherwise
> > > > need to ifdef the header inclusion and all references to the SVR
> > > > symbols.
> > > > 
> > > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > > > Acked-by: Joerg Roedel <jroedel@suse.de>
> > > > [scottwood: update description]
> > > > Signed-off-by: Scott Wood <oss@buserror.net>
> > > > 
> > > As discussed before, please don't introduce yet another vendor specific
> > > way to match a SoC ID from a device driver.
> > > 
> > > I've posted a patch for an extension to the soc_device infrastructure
> > > to allow comparing the running SoC to a table of devices, use that
> > > instead.
> > As I asked before, in which relevant maintainership capacity are you
> > NACKing
> > this?
> I'll nack the powerpc part until you guys can agree.

OK, I've pulled these patches out.

For the MMC issue I suggest using ifdef CONFIG_PPC and mfspr(SPRN_SVR) like
the clock driver does[1] and we can revisit the issue if/when we need to do
something similar on an ARM chip.

-Scott

[1] One of the issues with Arnd's approach is that it wouldn't have worked for
early things like the clock driver, and he didn't seem to mind using ifdef and
mfspr() there.

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Arnd Bergmann]

On Thursday, July 21, 2016 11:45:26 AM CEST Scott Wood wrote:
> 
> For the MMC issue I suggest using ifdef CONFIG_PPC and mfspr(SPRN_SVR) like
> the clock driver does[1] and we can revisit the issue if/when we need to do
> something similar on an ARM chip.

That sounds ok to me. having an mfspr check isn't nice but does the
job to work around existing bindings. For future chips, we can hopefully
find a way to identify most quirks early enough that the DT binding
can describe them using distinct compatible strings or other properties,
if necessary with the help of the boot loader.

Some other folks on MIPS were interested in having the soc_device
matching infrastructure and contacted me off-list, but they can of
course take the patch I sent and work from that.

	Arnd

RE: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Yangbo Lu]

SGkgU2NvdHQsDQoNCg0KPiAtLS0tLU9yaWdpbmFsIE1lc3NhZ2UtLS0tLQ0KPiBGcm9tOiBTY290
dCBXb29kIFttYWlsdG86b3NzQGJ1c2Vycm9yLm5ldF0NCj4gU2VudDogRnJpZGF5LCBKdWx5IDIy
LCAyMDE2IDEyOjQ1IEFNDQo+IFRvOiBNaWNoYWVsIEVsbGVybWFuOyBBcm5kIEJlcmdtYW5uDQo+
IENjOiBsaW51eC1tbWNAdmdlci5rZXJuZWwub3JnOyBkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9y
ZzsgbGludXhwcGMtDQo+IGRldkBsaXN0cy5vemxhYnMub3JnOyBsaW51eC1rZXJuZWxAdmdlci5r
ZXJuZWwub3JnOyBZYW5nYm8gTHUNCj4gU3ViamVjdDogUmU6IFtQQVRDSCB2MTEgNC81XSBwb3dl
cnBjL2ZzbDogbW92ZSBtcGM4NXh4LmggdG8NCj4gaW5jbHVkZS9saW51eC9mc2wNCj4gDQo+IE9u
IFRodSwgMjAxNi0wNy0yMSBhdCAyMDoyNiArMTAwMCwgTWljaGFlbCBFbGxlcm1hbiB3cm90ZToN
Cj4gPiBRdW90aW5nIFNjb3R0IFdvb2QgKDIwMTYtMDctMjEgMDQ6MzE6NDgpDQo+ID4gPg0KPiA+
ID4gT24gV2VkLCAyMDE2LTA3LTIwIGF0IDEzOjI0ICswMjAwLCBBcm5kIEJlcmdtYW5uIHdyb3Rl
Og0KPiA+ID4gPg0KPiA+ID4gPiBPbiBTYXR1cmRheSwgSnVseSAxNiwgMjAxNiA5OjUwOjIxIFBN
IENFU1QgU2NvdHQgV29vZCB3cm90ZToNCj4gPiA+ID4gPg0KPiA+ID4gPiA+DQo+ID4gPiA+ID4g
RnJvbTogeWFuZ2JvIGx1IDx5YW5nYm8ubHVAbnhwLmNvbT4NCj4gPiA+ID4gPg0KPiA+ID4gPiA+
IE1vdmUgbXBjODV4eC5oIHRvIGluY2x1ZGUvbGludXgvZnNsIGFuZCByZW5hbWUgaXQgdG8gc3Zy
LmggYXMgYQ0KPiA+ID4gPiA+IGNvbW1vbiBoZWFkZXIgZmlsZS7CoMKgVGhpcyBTVlIgbnVtYmVy
c3BhY2UgaXMgdXNlZCBvbiBzb21lIEFSTQ0KPiA+ID4gPiA+IGNoaXBzIGFzIHdlbGwgYXMgUFBD
LCBhbmQgZXZlbiB0byBjaGVjayBmb3IgYSBQUEMgU1ZSIG11bHRpLWFyY2gNCj4gPiA+ID4gPiBk
cml2ZXJzIHdvdWxkIG90aGVyd2lzZSBuZWVkIHRvIGlmZGVmIHRoZSBoZWFkZXIgaW5jbHVzaW9u
IGFuZA0KPiA+ID4gPiA+IGFsbCByZWZlcmVuY2VzIHRvIHRoZSBTVlIgc3ltYm9scy4NCj4gPiA+
ID4gPg0KPiA+ID4gPiA+IFNpZ25lZC1vZmYtYnk6IFlhbmdibyBMdSA8eWFuZ2JvLmx1QG54cC5j
b20+DQo+ID4gPiA+ID4gQWNrZWQtYnk6IFdvbGZyYW0gU2FuZyA8d3NhQHRoZS1kcmVhbXMuZGU+
DQo+ID4gPiA+ID4gQWNrZWQtYnk6IFN0ZXBoZW4gQm95ZCA8c2JveWRAY29kZWF1cm9yYS5vcmc+
DQo+ID4gPiA+ID4gQWNrZWQtYnk6IEpvZXJnIFJvZWRlbCA8anJvZWRlbEBzdXNlLmRlPg0KPiA+
ID4gPiA+IFtzY290dHdvb2Q6IHVwZGF0ZSBkZXNjcmlwdGlvbl0NCj4gPiA+ID4gPiBTaWduZWQt
b2ZmLWJ5OiBTY290dCBXb29kIDxvc3NAYnVzZXJyb3IubmV0Pg0KPiA+ID4gPiA+DQo+ID4gPiA+
IEFzIGRpc2N1c3NlZCBiZWZvcmUsIHBsZWFzZSBkb24ndCBpbnRyb2R1Y2UgeWV0IGFub3RoZXIg
dmVuZG9yDQo+ID4gPiA+IHNwZWNpZmljIHdheSB0byBtYXRjaCBhIFNvQyBJRCBmcm9tIGEgZGV2
aWNlIGRyaXZlci4NCj4gPiA+ID4NCj4gPiA+ID4gSSd2ZSBwb3N0ZWQgYSBwYXRjaCBmb3IgYW4g
ZXh0ZW5zaW9uIHRvIHRoZSBzb2NfZGV2aWNlDQo+ID4gPiA+IGluZnJhc3RydWN0dXJlIHRvIGFs
bG93IGNvbXBhcmluZyB0aGUgcnVubmluZyBTb0MgdG8gYSB0YWJsZSBvZg0KPiA+ID4gPiBkZXZp
Y2VzLCB1c2UgdGhhdCBpbnN0ZWFkLg0KPiA+ID4gQXMgSSBhc2tlZCBiZWZvcmUsIGluIHdoaWNo
IHJlbGV2YW50IG1haW50YWluZXJzaGlwIGNhcGFjaXR5IGFyZSB5b3UNCj4gPiA+IE5BQ0tpbmcg
dGhpcz8NCj4gPiBJJ2xsIG5hY2sgdGhlIHBvd2VycGMgcGFydCB1bnRpbCB5b3UgZ3V5cyBjYW4g
YWdyZWUuDQo+IA0KPiBPSywgSSd2ZSBwdWxsZWQgdGhlc2UgcGF0Y2hlcyBvdXQuDQo+IA0KPiBG
b3IgdGhlIE1NQyBpc3N1ZSBJIHN1Z2dlc3QgdXNpbmcgaWZkZWYgQ09ORklHX1BQQyBhbmQgbWZz
cHIoU1BSTl9TVlIpDQo+IGxpa2UgdGhlIGNsb2NrIGRyaXZlciBkb2VzWzFdIGFuZCB3ZSBjYW4g
cmV2aXNpdCB0aGUgaXNzdWUgaWYvd2hlbiB3ZQ0KPiBuZWVkIHRvIGRvIHNvbWV0aGluZyBzaW1p
bGFyIG9uIGFuIEFSTSBjaGlwLg0KDQpbTHUgWWFuZ2JvLUI0NzA5M10gSSByZW1lbWJlcmVkIHRo
YXQgVWZmZSBoYWQgb3Bwb3NlZCB1cyB0byBpbnRyb2R1Y2Ugbm9uLWdlbmVyaWMgaGVhZGVyIGZp
bGVzKGxpa2UgJyNpbmNsdWRlIDxhc20vbXBjODV4eC5oPicpDQppbiBtbWMgZHJpdmVyIGluaXRp
YWxseS4gU28gSSB0aGluayBpdCB3aWxsIG5vdCBiZSBhY2NlcHRlZCB0byB1c2UgaWZkZWYgQ09O
RklHX1BQQyBhbmQgbWZzcHIoU1BSTl9TVlIpLi4uDQpBbmQgdGhpcyBtZXRob2Qgc3RpbGwgY291
bGRu4oCZdCBnZXQgU1ZSIG9mIEFSTSBjaGlwIG5vdy4NCg0KQW55IG90aGVyIHN1Z2dlc3Rpb24g
aGVyZT8NClRoYW5rIHlvdSB2ZXJ5IG11Y2guDQoNCi0gWWFuZ2JvIEx1DQoNCj4gDQo+IC1TY290
dA0KPiANCj4gWzFdIE9uZSBvZiB0aGUgaXNzdWVzIHdpdGggQXJuZCdzIGFwcHJvYWNoIGlzIHRo
YXQgaXQgd291bGRuJ3QgaGF2ZQ0KPiB3b3JrZWQgZm9yIGVhcmx5IHRoaW5ncyBsaWtlIHRoZSBj
bG9jayBkcml2ZXIsIGFuZCBoZSBkaWRuJ3Qgc2VlbSB0byBtaW5kDQo+IHVzaW5nIGlmZGVmIGFu
ZA0KPiBtZnNwcigpIHRoZXJlLg0KDQo=

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Scott Wood]

On Mon, 2016-07-25 at 06:12 +0000, Yangbo Lu wrote:
> Hi Scott,
> 
> 
> > 
> > -----Original Message-----
> > From: Scott Wood [mailto:oss@buserror.net]
> > Sent: Friday, July 22, 2016 12:45 AM
> > To: Michael Ellerman; Arnd Bergmann
> > Cc: linux-mmc@vger.kernel.org; devicetree@vger.kernel.org; linuxppc-
> > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; Yangbo Lu
> > Subject: Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to
> > include/linux/fsl
> > 
> > On Thu, 2016-07-21 at 20:26 +1000, Michael Ellerman wrote:
> > > 
> > > Quoting Scott Wood (2016-07-21 04:31:48)
> > > > 
> > > > 
> > > > On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > > > > 
> > > > > 
> > > > > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > From: yangbo lu <yangbo.lu@nxp.com>
> > > > > > 
> > > > > > Move mpc85xx.h to include/linux/fsl and rename it to svr.h as a
> > > > > > common header file.  This SVR numberspace is used on some ARM
> > > > > > chips as well as PPC, and even to check for a PPC SVR multi-arch
> > > > > > drivers would otherwise need to ifdef the header inclusion and
> > > > > > all references to the SVR symbols.
> > > > > > 
> > > > > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > > > > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > > > > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > > > > > Acked-by: Joerg Roedel <jroedel@suse.de>
> > > > > > [scottwood: update description]
> > > > > > Signed-off-by: Scott Wood <oss@buserror.net>
> > > > > > 
> > > > > As discussed before, please don't introduce yet another vendor
> > > > > specific way to match a SoC ID from a device driver.
> > > > > 
> > > > > I've posted a patch for an extension to the soc_device
> > > > > infrastructure to allow comparing the running SoC to a table of
> > > > > devices, use that instead.
> > > > As I asked before, in which relevant maintainership capacity are you
> > > > NACKing this?
> > > I'll nack the powerpc part until you guys can agree.
> > OK, I've pulled these patches out.
> > 
> > For the MMC issue I suggest using ifdef CONFIG_PPC and mfspr(SPRN_SVR)
> > like the clock driver does[1] and we can revisit the issue if/when we
> > need to do something similar on an ARM chip.
> [Lu Yangbo-B47093] I remembered that Uffe had opposed us to introduce non-
> generic header files(like '#include <asm/mpc85xx.h>')
> in mmc driver initially. So I think it will not be accepted to use ifdef
> CONFIG_PPC and mfspr(SPRN_SVR)...
> And this method still couldn’t get SVR of ARM chip now.

Right, as I said we'll have to revisit the issue if/when we have the same
problem on an ARM chip.  That also applies if the PPC ifdef is still getting
NACKed from the MMC side.

> Any other suggestion here?

The other option is to try to come up with something that fits into Arnd's
framework while addressing the concerns I raised.  The soc_id string should be
well-structured to avoid mismatches and compatibility problems (especially
since it would get exposed to userspace).  Maybe something like:

svr:<SVR minus E bit>,svre:<full SVR including E bit>,name:<soc name>,die:<soc
die name>,rev:X.Y,<tag1>,<tag2>,<...>,

with the final comma used so that globs can put a colon on either end to be
sure they're matching a full field.  The SoC die name would be the primary
chip for a given die (e.g. p4040 would have a die name of p4080).  The "name"
and "die" fields would never include the trailing "e" indicated by the E bit.

Extra tags could be used for common groupings, such as all chips from a
particular die before a certain revision.  Once a tag is added it can't be
removed or reordered, to maintain userspace compatibility, but new tags could
be appended.

Some examples:

svr:0x82000020,svre:0x82000020,name:p4080,die:p4080,rev:2.0,
svr:0x82000020,svr
e:0x82080020,name:p4080,die:p4080,rev:2.0,
svr:0x82000030,svre:0x82000030,name:
p4080,die:p4080,rev:3.0,
svr:0x82000030,svre:0x82080030,name:p4080,die:p4080,re
v:3.0,
svr:0x82010020,svre:0x82010020,name:p4040,die:p4080,rev:2.0,
svr:0x820100
20,svre:0x82090020,name:p4040,die:p4080,rev:2.0,

svr:0x82010030,svre:0x82010030
,name:p4040,die:p4080,rev:3.0,
svr:0x82010030,svre:0x82090030,name:p4040,die:p4
080,rev:3.0,

Then if you want to apply a workaround on:
- all chips using the p4080 die, match with "*,die:p4080,*"
- all chips using the rev 2.0 p4080 die, match with "*,die:p4080,rev:2.0,*"
- Only p4040, but of any rev, match with "*,name:p4040,*"

Matching via open-coded hex number should be considered a last resort (it's
more error-prone, either for getting the number wrong or for forgetting
variants -- the latter is already a common problem), but preferable to adding
too many tags.

Using wildcards within a tag field would be discouraged.  

-Scott

RE: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Yangbo Lu]

SGkgU2NvdHQsDQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogU2NvdHQg
V29vZCBbbWFpbHRvOm9zc0BidXNlcnJvci5uZXRdDQo+IFNlbnQ6IFdlZG5lc2RheSwgSnVseSAy
NywgMjAxNiA4OjM4IEFNDQo+IFRvOiBZYW5nYm8gTHU7IE1pY2hhZWwgRWxsZXJtYW47IEFybmQg
QmVyZ21hbm47IFVsZiBIYW5zc29uDQo+IENjOiBsaW51eC1tbWNAdmdlci5rZXJuZWwub3JnOyBk
ZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZzsgbGludXhwcGMtDQo+IGRldkBsaXN0cy5vemxhYnMu
b3JnOyBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnDQo+IFN1YmplY3Q6IFJlOiBbUEFUQ0gg
djExIDQvNV0gcG93ZXJwYy9mc2w6IG1vdmUgbXBjODV4eC5oIHRvDQo+IGluY2x1ZGUvbGludXgv
ZnNsDQo+IA0KPiBPbiBNb24sIDIwMTYtMDctMjUgYXQgMDY6MTIgKzAwMDAsIFlhbmdibyBMdSB3
cm90ZToNCj4gPiBIaSBTY290dCwNCj4gPg0KPiA+DQo+ID4gPg0KPiA+ID4gLS0tLS1PcmlnaW5h
bCBNZXNzYWdlLS0tLS0NCj4gPiA+IEZyb206IFNjb3R0IFdvb2QgW21haWx0bzpvc3NAYnVzZXJy
b3IubmV0XQ0KPiA+ID4gU2VudDogRnJpZGF5LCBKdWx5IDIyLCAyMDE2IDEyOjQ1IEFNDQo+ID4g
PiBUbzogTWljaGFlbCBFbGxlcm1hbjsgQXJuZCBCZXJnbWFubg0KPiA+ID4gQ2M6IGxpbnV4LW1t
Y0B2Z2VyLmtlcm5lbC5vcmc7IGRldmljZXRyZWVAdmdlci5rZXJuZWwub3JnOyBsaW51eHBwYy0N
Cj4gPiA+IGRldkBsaXN0cy5vemxhYnMub3JnOyBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3Jn
OyBZYW5nYm8gTHUNCj4gPiA+IFN1YmplY3Q6IFJlOiBbUEFUQ0ggdjExIDQvNV0gcG93ZXJwYy9m
c2w6IG1vdmUgbXBjODV4eC5oIHRvDQo+ID4gPiBpbmNsdWRlL2xpbnV4L2ZzbA0KPiA+ID4NCj4g
PiA+IE9uIFRodSwgMjAxNi0wNy0yMSBhdCAyMDoyNiArMTAwMCwgTWljaGFlbCBFbGxlcm1hbiB3
cm90ZToNCj4gPiA+ID4NCj4gPiA+ID4gUXVvdGluZyBTY290dCBXb29kICgyMDE2LTA3LTIxIDA0
OjMxOjQ4KQ0KPiA+ID4gPiA+DQo+ID4gPiA+ID4NCj4gPiA+ID4gPiBPbiBXZWQsIDIwMTYtMDct
MjAgYXQgMTM6MjQgKzAyMDAsIEFybmQgQmVyZ21hbm4gd3JvdGU6DQo+ID4gPiA+ID4gPg0KPiA+
ID4gPiA+ID4NCj4gPiA+ID4gPiA+IE9uIFNhdHVyZGF5LCBKdWx5IDE2LCAyMDE2IDk6NTA6MjEg
UE0gQ0VTVCBTY290dCBXb29kIHdyb3RlOg0KPiA+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gPg0K
PiA+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gPiBGcm9tOiB5YW5nYm8gbHUgPHlhbmdiby5sdUBu
eHAuY29tPg0KPiA+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gPiBNb3ZlIG1wYzg1eHguaCB0byBp
bmNsdWRlL2xpbnV4L2ZzbCBhbmQgcmVuYW1lIGl0IHRvIHN2ci5oDQo+ID4gPiA+ID4gPiA+IGFz
IGEgY29tbW9uIGhlYWRlciBmaWxlLsKgwqBUaGlzIFNWUiBudW1iZXJzcGFjZSBpcyB1c2VkIG9u
DQo+ID4gPiA+ID4gPiA+IHNvbWUgQVJNIGNoaXBzIGFzIHdlbGwgYXMgUFBDLCBhbmQgZXZlbiB0
byBjaGVjayBmb3IgYSBQUEMNCj4gPiA+ID4gPiA+ID4gU1ZSIG11bHRpLWFyY2ggZHJpdmVycyB3
b3VsZCBvdGhlcndpc2UgbmVlZCB0byBpZmRlZiB0aGUNCj4gPiA+ID4gPiA+ID4gaGVhZGVyIGlu
Y2x1c2lvbiBhbmQgYWxsIHJlZmVyZW5jZXMgdG8gdGhlIFNWUiBzeW1ib2xzLg0KPiA+ID4gPiA+
ID4gPg0KPiA+ID4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBZYW5nYm8gTHUgPHlhbmdiby5sdUBu
eHAuY29tPg0KPiA+ID4gPiA+ID4gPiBBY2tlZC1ieTogV29sZnJhbSBTYW5nIDx3c2FAdGhlLWRy
ZWFtcy5kZT4NCj4gPiA+ID4gPiA+ID4gQWNrZWQtYnk6IFN0ZXBoZW4gQm95ZCA8c2JveWRAY29k
ZWF1cm9yYS5vcmc+DQo+ID4gPiA+ID4gPiA+IEFja2VkLWJ5OiBKb2VyZyBSb2VkZWwgPGpyb2Vk
ZWxAc3VzZS5kZT4NCj4gPiA+ID4gPiA+ID4gW3Njb3R0d29vZDogdXBkYXRlIGRlc2NyaXB0aW9u
XQ0KPiA+ID4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5OiBTY290dCBXb29kIDxvc3NAYnVzZXJyb3Iu
bmV0Pg0KPiA+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gQXMgZGlzY3Vzc2VkIGJlZm9yZSwgcGxl
YXNlIGRvbid0IGludHJvZHVjZSB5ZXQgYW5vdGhlciB2ZW5kb3INCj4gPiA+ID4gPiA+IHNwZWNp
ZmljIHdheSB0byBtYXRjaCBhIFNvQyBJRCBmcm9tIGEgZGV2aWNlIGRyaXZlci4NCj4gPiA+ID4g
PiA+DQo+ID4gPiA+ID4gPiBJJ3ZlIHBvc3RlZCBhIHBhdGNoIGZvciBhbiBleHRlbnNpb24gdG8g
dGhlIHNvY19kZXZpY2UNCj4gPiA+ID4gPiA+IGluZnJhc3RydWN0dXJlIHRvIGFsbG93IGNvbXBh
cmluZyB0aGUgcnVubmluZyBTb0MgdG8gYSB0YWJsZQ0KPiA+ID4gPiA+ID4gb2YgZGV2aWNlcywg
dXNlIHRoYXQgaW5zdGVhZC4NCj4gPiA+ID4gPiBBcyBJIGFza2VkIGJlZm9yZSwgaW4gd2hpY2gg
cmVsZXZhbnQgbWFpbnRhaW5lcnNoaXAgY2FwYWNpdHkgYXJlDQo+ID4gPiA+ID4geW91IE5BQ0tp
bmcgdGhpcz8NCj4gPiA+ID4gSSdsbCBuYWNrIHRoZSBwb3dlcnBjIHBhcnQgdW50aWwgeW91IGd1
eXMgY2FuIGFncmVlLg0KPiA+ID4gT0ssIEkndmUgcHVsbGVkIHRoZXNlIHBhdGNoZXMgb3V0Lg0K
PiA+ID4NCj4gPiA+IEZvciB0aGUgTU1DIGlzc3VlIEkgc3VnZ2VzdCB1c2luZyBpZmRlZiBDT05G
SUdfUFBDIGFuZA0KPiA+ID4gbWZzcHIoU1BSTl9TVlIpIGxpa2UgdGhlIGNsb2NrIGRyaXZlciBk
b2VzWzFdIGFuZCB3ZSBjYW4gcmV2aXNpdCB0aGUNCj4gPiA+IGlzc3VlIGlmL3doZW4gd2UgbmVl
ZCB0byBkbyBzb21ldGhpbmcgc2ltaWxhciBvbiBhbiBBUk0gY2hpcC4NCj4gPiBbTHUgWWFuZ2Jv
LUI0NzA5M10gSSByZW1lbWJlcmVkIHRoYXQgVWZmZSBoYWQgb3Bwb3NlZCB1cyB0byBpbnRyb2R1
Y2UNCj4gPiBub24tIGdlbmVyaWMgaGVhZGVyIGZpbGVzKGxpa2UgJyNpbmNsdWRlIDxhc20vbXBj
ODV4eC5oPicpIGluIG1tYw0KPiA+IGRyaXZlciBpbml0aWFsbHkuIFNvIEkgdGhpbmsgaXQgd2ls
bCBub3QgYmUgYWNjZXB0ZWQgdG8gdXNlIGlmZGVmDQo+ID4gQ09ORklHX1BQQyBhbmQgbWZzcHIo
U1BSTl9TVlIpLi4uDQo+ID4gQW5kIHRoaXMgbWV0aG9kIHN0aWxsIGNvdWxkbuKAmXQgZ2V0IFNW
UiBvZiBBUk0gY2hpcCBub3cuDQo+IA0KPiBSaWdodCwgYXMgSSBzYWlkIHdlJ2xsIGhhdmUgdG8g
cmV2aXNpdCB0aGUgaXNzdWUgaWYvd2hlbiB3ZSBoYXZlIHRoZSBzYW1lDQo+IHByb2JsZW0gb24g
YW4gQVJNIGNoaXAuIMKgVGhhdCBhbHNvIGFwcGxpZXMgaWYgdGhlIFBQQyBpZmRlZiBpcyBzdGls
bA0KPiBnZXR0aW5nIE5BQ0tlZCBmcm9tIHRoZSBNTUMgc2lkZS4NCg0KW0x1IFlhbmdiby1CNDcw
OTNdIEl0J3Mgbm90IGNsZWFyIGZvciBtZSBhYm91dCB5b3VyIGlkZWEgOiggDQpEbyB5b3UgbWVh
biB3ZSBjYW4gc3RpbGwgdXNlIHRoaXMgbWV0aG9kLCBvciBub3QgPw0KSSB0aGluayBVZmZlIGhh
ZCBvcHBvc2VkIHRvIHVzZSBpZmRlZiBDT05GSUdfUFBDIGFuZCBtZnNwcihTUFJOX1NWUikuDQpJ
cyB0aGVyZSBhbnkgc29sdXRpb24gdG8gcmVzb2x2ZSA/DQo6KQ0KDQo+IA0KPiA+IEFueSBvdGhl
ciBzdWdnZXN0aW9uIGhlcmU/DQo+IA0KPiBUaGUgb3RoZXIgb3B0aW9uIGlzIHRvIHRyeSB0byBj
b21lIHVwIHdpdGggc29tZXRoaW5nIHRoYXQgZml0cyBpbnRvDQo+IEFybmQncyBmcmFtZXdvcmsg
d2hpbGUgYWRkcmVzc2luZyB0aGUgY29uY2VybnMgSSByYWlzZWQuIMKgVGhlIHNvY19pZA0KPiBz
dHJpbmcgc2hvdWxkIGJlIHdlbGwtc3RydWN0dXJlZCB0byBhdm9pZCBtaXNtYXRjaGVzIGFuZCBj
b21wYXRpYmlsaXR5DQo+IHByb2JsZW1zIChlc3BlY2lhbGx5IHNpbmNlIGl0IHdvdWxkIGdldCBl
eHBvc2VkIHRvIHVzZXJzcGFjZSkuIMKgTWF5YmUNCj4gc29tZXRoaW5nIGxpa2U6DQo+IA0KPiBz
dnI6PFNWUiBtaW51cyBFIGJpdD4sc3ZyZTo8ZnVsbCBTVlIgaW5jbHVkaW5nIEUgYml0PixuYW1l
Ojxzb2MNCj4gbmFtZT4sZGllOjxzb2MgZGllIG5hbWU+LHJldjpYLlksPHRhZzE+LDx0YWcyPiw8
Li4uPiwNCg0KW0x1IFlhbmdiby1CNDcwOTNdIFRoZSBzb2NfZGV2aWNlX2F0dHJpYnV0IHN0cnVj
dCBpcyBkZWZpbmVkIGFzIGJlbG93Lg0Kc3RydWN0IHNvY19kZXZpY2VfYXR0cmlidXRlIHsNCiAg
ICAgICAgY29uc3QgY2hhciAqbWFjaGluZTsNCiAgICAgICAgY29uc3QgY2hhciAqZmFtaWx5Ow0K
ICAgICAgICBjb25zdCBjaGFyICpyZXZpc2lvbjsNCiAgICAgICAgY29uc3QgY2hhciAqc29jX2lk
Ow0KfTsNCg0KV2UgY2FuIHB1dCB0aGUgJ21vZGVsJyBpbiByb290IG5vZGUgb2YgZHRzIGFzIG1h
Y2hpbmUsIHB1dCAnRnJlZXNjYWxlIFFvcklRJyBhcyBmYW1pbHksDQphbmQgcHV0IHgueCBhcyBy
ZXZpc2lvbi4gSXMgaXQgb2s/DQpBcyB5b3Ugc3VnZ2VzdGVkLCB5b3UgbGlrZSB0byB1c2UgYmVs
b3cgc3RyaW5nIGFzIHNvY19pZC4gSXQncyBlYXN5IHRvIGdldCBzdnIsIGJ1dCBob3cgZG9lcyB0
aGUgc29mdHdhcmUga25vdyB0aGUgbmFtZSBhbmQgZGllLA0KYW5kIHB1dCB0aGVtIGludG8gdGhp
cyBzdHJpbmcgPyBJdCdzIGEgbGFyZ2UgY29kZSB0byBkZWZpbmUgdGhlbS4gDQo+IHN2cjo8U1ZS
IG1pbnVzIEUgYml0PixzdnJlOjxmdWxsIFNWUiBpbmNsdWRpbmcgRSBiaXQ+LG5hbWU6PHNvYw0K
PiBuYW1lPixkaWU6PHNvYyBkaWUgbmFtZT4scmV2OlguWSw8dGFnMT4sPHRhZzI+LDwuLi4+LA0K
U2hvdWxkIHdlIHJlbW92ZSByZXYgaGVyZSBzaW5jZSB0aGVyZSBpcyBhbHNvIGEgcmV2aXNpb24g
bWVtYmVyPw0KDQpSZWdhcmRpbmcgdGhlIGd1dHNfaW5pdCwgd2Ugc3RpbGwgY2FsbCBndXRzX2lu
aXQgYW5kIHRoZW4gbWF0Y2ggdGhlIHNvYywgb3Igd2UgY2hhbmdlIHRvIHVzZSBwbGF0Zm9ybSBk
cml2ZXI/DQpPciBkbyB5b3Uga25vdyBhbnkgYmV0dGVyIHBsYWNlIHRvIGNhbGwgZ3V0c19pbml0
IHRvIGluaXRpYWxpemUgb25seSBvbmNlPw0KDQpUaGFuayB5b3Ugc28gbXVjaCA6KQ0KDQo+IA0K
PiB3aXRoIHRoZSBmaW5hbCBjb21tYSB1c2VkIHNvIHRoYXQgZ2xvYnMgY2FuIHB1dCBhIGNvbG9u
IG9uIGVpdGhlciBlbmQgdG8NCj4gYmUgc3VyZSB0aGV5J3JlIG1hdGNoaW5nIGEgZnVsbCBmaWVs
ZC4gwqBUaGUgU29DIGRpZSBuYW1lIHdvdWxkIGJlIHRoZQ0KPiBwcmltYXJ5IGNoaXAgZm9yIGEg
Z2l2ZW4gZGllIChlLmcuIHA0MDQwIHdvdWxkIGhhdmUgYSBkaWUgbmFtZSBvZg0KPiBwNDA4MCku
IMKgVGhlICJuYW1lIg0KPiBhbmQgImRpZSIgZmllbGRzIHdvdWxkIG5ldmVyIGluY2x1ZGUgdGhl
IHRyYWlsaW5nICJlIiBpbmRpY2F0ZWQgYnkgdGhlIEUNCj4gYml0Lg0KPiANCj4gRXh0cmEgdGFn
cyBjb3VsZCBiZSB1c2VkIGZvciBjb21tb24gZ3JvdXBpbmdzLCBzdWNoIGFzIGFsbCBjaGlwcyBm
cm9tIGENCj4gcGFydGljdWxhciBkaWUgYmVmb3JlIGEgY2VydGFpbiByZXZpc2lvbi4gwqBPbmNl
IGEgdGFnIGlzIGFkZGVkIGl0IGNhbid0DQo+IGJlIHJlbW92ZWQgb3IgcmVvcmRlcmVkLCB0byBt
YWludGFpbiB1c2Vyc3BhY2UgY29tcGF0aWJpbGl0eSwgYnV0IG5ldw0KPiB0YWdzIGNvdWxkIGJl
IGFwcGVuZGVkLg0KPiANCj4gU29tZSBleGFtcGxlczoNCj4gDQo+IHN2cjoweDgyMDAwMDIwLHN2
cmU6MHg4MjAwMDAyMCxuYW1lOnA0MDgwLGRpZTpwNDA4MCxyZXY6Mi4wLA0KPiBzdnI6MHg4MjAw
MDAyMCxzdnINCj4gZToweDgyMDgwMDIwLG5hbWU6cDQwODAsZGllOnA0MDgwLHJldjoyLjAsDQo+
IHN2cjoweDgyMDAwMDMwLHN2cmU6MHg4MjAwMDAzMCxuYW1lOg0KPiBwNDA4MCxkaWU6cDQwODAs
cmV2OjMuMCwNCj4gc3ZyOjB4ODIwMDAwMzAsc3ZyZToweDgyMDgwMDMwLG5hbWU6cDQwODAsZGll
OnA0MDgwLHJlDQo+IHY6My4wLA0KPiBzdnI6MHg4MjAxMDAyMCxzdnJlOjB4ODIwMTAwMjAsbmFt
ZTpwNDA0MCxkaWU6cDQwODAscmV2OjIuMCwNCj4gc3ZyOjB4ODIwMTAwDQo+IDIwLHN2cmU6MHg4
MjA5MDAyMCxuYW1lOnA0MDQwLGRpZTpwNDA4MCxyZXY6Mi4wLA0KPiANCj4gc3ZyOjB4ODIwMTAw
MzAsc3ZyZToweDgyMDEwMDMwDQo+ICxuYW1lOnA0MDQwLGRpZTpwNDA4MCxyZXY6My4wLA0KPiBz
dnI6MHg4MjAxMDAzMCxzdnJlOjB4ODIwOTAwMzAsbmFtZTpwNDA0MCxkaWU6cDQNCj4gMDgwLHJl
djozLjAsDQo+IA0KPiBUaGVuIGlmIHlvdSB3YW50IHRvIGFwcGx5IGEgd29ya2Fyb3VuZCBvbjoN
Cj4gLSBhbGwgY2hpcHMgdXNpbmcgdGhlIHA0MDgwIGRpZSwgbWF0Y2ggd2l0aCAiKixkaWU6cDQw
ODAsKiINCj4gLSBhbGwgY2hpcHMgdXNpbmcgdGhlIHJldiAyLjAgcDQwODAgZGllLCBtYXRjaCB3
aXRoDQo+ICIqLGRpZTpwNDA4MCxyZXY6Mi4wLCoiDQo+IC0gT25seSBwNDA0MCwgYnV0IG9mIGFu
eSByZXYsIG1hdGNoIHdpdGggIiosbmFtZTpwNDA0MCwqIg0KPiANCj4gTWF0Y2hpbmcgdmlhIG9w
ZW4tY29kZWQgaGV4IG51bWJlciBzaG91bGQgYmUgY29uc2lkZXJlZCBhIGxhc3QgcmVzb3J0DQo+
IChpdCdzIG1vcmUgZXJyb3ItcHJvbmUsIGVpdGhlciBmb3IgZ2V0dGluZyB0aGUgbnVtYmVyIHdy
b25nIG9yIGZvcg0KPiBmb3JnZXR0aW5nIHZhcmlhbnRzIC0tIHRoZSBsYXR0ZXIgaXMgYWxyZWFk
eSBhIGNvbW1vbiBwcm9ibGVtKSwgYnV0DQo+IHByZWZlcmFibGUgdG8gYWRkaW5nIHRvbyBtYW55
IHRhZ3MuDQo+IA0KPiBVc2luZyB3aWxkY2FyZHMgd2l0aGluIGEgdGFnIGZpZWxkIHdvdWxkIGJl
IGRpc2NvdXJhZ2VkLg0KPiANCj4gLVNjb3R0DQoNCg==

Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Scott Wood]

On Tue, 2016-08-02 at 05:57 +0000, Yangbo Lu wrote:
> Hi Scott,
> 
> > 
> > -----Original Message-----
> > From: Scott Wood [mailto:oss@buserror.net]
> > Sent: Wednesday, July 27, 2016 8:38 AM
> > To: Yangbo Lu; Michael Ellerman; Arnd Bergmann; Ulf Hansson
> > Cc: linux-mmc@vger.kernel.org; devicetree@vger.kernel.org; linuxppc-
> > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to
> > include/linux/fsl
> > 
> > On Mon, 2016-07-25 at 06:12 +0000, Yangbo Lu wrote:
> > > 
> > > Hi Scott,
> > > 
> > > 
> > > > 
> > > > 
> > > > -----Original Message-----
> > > > From: Scott Wood [mailto:oss@buserror.net]
> > > > Sent: Friday, July 22, 2016 12:45 AM
> > > > To: Michael Ellerman; Arnd Bergmann
> > > > Cc: linux-mmc@vger.kernel.org; devicetree@vger.kernel.org; linuxppc-
> > > > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org; Yangbo Lu
> > > > Subject: Re: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to
> > > > include/linux/fsl
> > > > 
> > > > On Thu, 2016-07-21 at 20:26 +1000, Michael Ellerman wrote:
> > > > > 
> > > > > 
> > > > > Quoting Scott Wood (2016-07-21 04:31:48)
> > > > > > 
> > > > > > 
> > > > > > 
> > > > > > On Wed, 2016-07-20 at 13:24 +0200, Arnd Bergmann wrote:
> > > > > > > 
> > > > > > > 
> > > > > > > 
> > > > > > > On Saturday, July 16, 2016 9:50:21 PM CEST Scott Wood wrote:
> > > > > > > > 
> > > > > > > > 
> > > > > > > > 
> > > > > > > > 
> > > > > > > > From: yangbo lu <yangbo.lu@nxp.com>
> > > > > > > > 
> > > > > > > > Move mpc85xx.h to include/linux/fsl and rename it to svr.h
> > > > > > > > as a common header file.  This SVR numberspace is used on
> > > > > > > > some ARM chips as well as PPC, and even to check for a PPC
> > > > > > > > SVR multi-arch drivers would otherwise need to ifdef the
> > > > > > > > header inclusion and all references to the SVR symbols.
> > > > > > > > 
> > > > > > > > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > > > > > > > Acked-by: Wolfram Sang <wsa@the-dreams.de>
> > > > > > > > Acked-by: Stephen Boyd <sboyd@codeaurora.org>
> > > > > > > > Acked-by: Joerg Roedel <jroedel@suse.de>
> > > > > > > > [scottwood: update description]
> > > > > > > > Signed-off-by: Scott Wood <oss@buserror.net>
> > > > > > > > 
> > > > > > > As discussed before, please don't introduce yet another vendor
> > > > > > > specific way to match a SoC ID from a device driver.
> > > > > > > 
> > > > > > > I've posted a patch for an extension to the soc_device
> > > > > > > infrastructure to allow comparing the running SoC to a table
> > > > > > > of devices, use that instead.
> > > > > > As I asked before, in which relevant maintainership capacity are
> > > > > > you NACKing this?
> > > > > I'll nack the powerpc part until you guys can agree.
> > > > OK, I've pulled these patches out.
> > > > 
> > > > For the MMC issue I suggest using ifdef CONFIG_PPC and
> > > > mfspr(SPRN_SVR) like the clock driver does[1] and we can revisit the
> > > > issue if/when we need to do something similar on an ARM chip.
> > > [Lu Yangbo-B47093] I remembered that Uffe had opposed us to introduce
> > > non- generic header files(like '#include <asm/mpc85xx.h>') in mmc
> > > driver initially. So I think it will not be accepted to use ifdef
> > > CONFIG_PPC and mfspr(SPRN_SVR)...
> > > And this method still couldn’t get SVR of ARM chip now.
> > Right, as I said we'll have to revisit the issue if/when we have the same
> > problem on an ARM chip.  That also applies if the PPC ifdef is still
> > getting NACKed from the MMC side.
> [Lu Yangbo-B47093] It's not clear for me about your idea :( 
> Do you mean we can still use this method, or not ?
> I think Uffe had opposed to use ifdef CONFIG_PPC and mfspr(SPRN_SVR).
> Is there any solution to resolve ?
> :)

As I said, I'm OK with using the SPR.  It's up to you to find out whether it's
still unacceptable with the MMC maintainers given all the discussion (it would
be the quickest way to get the workaround enabled), or just go with the method
below.

> > > Any other suggestion here?
> > The other option is to try to come up with something that fits into
> > Arnd's framework while addressing the concerns I raised.  The soc_id
> > string should be well-structured to avoid mismatches and compatibility
> > problems (especially since it would get exposed to userspace).  Maybe
> > something like:
> > 
> > svr:<SVR minus E bit>,svre:<full SVR including E bit>,name:<soc
> > name>,die:<soc die name>,rev:X.Y,<tag1>,<tag2>,<...>,
> [Lu Yangbo-B47093] The soc_device_attribut struct is defined as below.
> struct soc_device_attribute {
>         const char *machine;
>         const char *family;
>         const char *revision;
>         const char *soc_id;
> };
> 
> We can put the 'model' in root node of dts as machine, put 'Freescale QorIQ'
> as family,

I'd just put "QorIQ" to avoid the question of whether to use "Freescale" or
"NXP".

> and put x.x as revision. Is it ok?
> As you suggested, you like to use below string as soc_id. It's easy to get
> svr, but how does the software know the name and die,
> and put them into this string ? It's a large code to define them. 

Yes, there would need to be a table in the guts driver for each SVR.  If the
SVR isn't found in the table then the soc_id would only contain the svr: and
svre: fields.

> > 
> > svr:<SVR minus E bit>,svre:<full SVR including E bit>,name:<soc
> > name>,die:<soc die name>,rev:X.Y,<tag1>,<tag2>,<...>,
> Should we remove rev here since there is also a revision member?

Yes, I forgot there was a revision field -- it should go there obviously.

> Regarding the guts_init, we still call guts_init and then match the soc, or
> we change to use platform driver?
> Or do you know any better place to call guts_init to initialize only once?

Use a platform driver for now.  If we ever need to check an ARM SVR in the
clock driver or similar place, then Arnd can explain what he wants us to do
then :-)

-Scott

RE: [PATCH v11 4/5] powerpc/fsl: move mpc85xx.h to include/linux/fsl

[Yangbo Lu]

SGkgVWZmZSwNCg0KDQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZyb206IFNjb3R0
IFdvb2QgW21haWx0bzpvc3NAYnVzZXJyb3IubmV0XQ0KPiBTZW50OiBXZWRuZXNkYXksIEF1Z3Vz
dCAwMywgMjAxNiA1OjQxIEFNDQo+IFRvOiBZYW5nYm8gTHU7IE1pY2hhZWwgRWxsZXJtYW47IEFy
bmQgQmVyZ21hbm47IFVsZiBIYW5zc29uDQo+IENjOiBsaW51eC1tbWNAdmdlci5rZXJuZWwub3Jn
OyBkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZzsgbGludXhwcGMtDQo+IGRldkBsaXN0cy5vemxh
YnMub3JnOyBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnOyBYaWFvYm8gWGllDQo+IFN1Ympl
Y3Q6IFJlOiBbUEFUQ0ggdjExIDQvNV0gcG93ZXJwYy9mc2w6IG1vdmUgbXBjODV4eC5oIHRvDQo+
IGluY2x1ZGUvbGludXgvZnNsDQo+IA0KPiBPbiBUdWUsIDIwMTYtMDgtMDIgYXQgMDU6NTcgKzAw
MDAsIFlhbmdibyBMdSB3cm90ZToNCj4gPiBIaSBTY290dCwNCj4gPg0KPiA+ID4NCj4gPiA+IC0t
LS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+ID4gPiBGcm9tOiBTY290dCBXb29kIFttYWlsdG86
b3NzQGJ1c2Vycm9yLm5ldF0NCj4gPiA+IFNlbnQ6IFdlZG5lc2RheSwgSnVseSAyNywgMjAxNiA4
OjM4IEFNDQo+ID4gPiBUbzogWWFuZ2JvIEx1OyBNaWNoYWVsIEVsbGVybWFuOyBBcm5kIEJlcmdt
YW5uOyBVbGYgSGFuc3Nvbg0KPiA+ID4gQ2M6IGxpbnV4LW1tY0B2Z2VyLmtlcm5lbC5vcmc7IGRl
dmljZXRyZWVAdmdlci5rZXJuZWwub3JnOyBsaW51eHBwYy0NCj4gPiA+IGRldkBsaXN0cy5vemxh
YnMub3JnOyBsaW51eC1rZXJuZWxAdmdlci5rZXJuZWwub3JnDQo+ID4gPiBTdWJqZWN0OiBSZTog
W1BBVENIIHYxMSA0LzVdIHBvd2VycGMvZnNsOiBtb3ZlIG1wYzg1eHguaCB0bw0KPiA+ID4gaW5j
bHVkZS9saW51eC9mc2wNCj4gPiA+DQo+ID4gPiBPbiBNb24sIDIwMTYtMDctMjUgYXQgMDY6MTIg
KzAwMDAsIFlhbmdibyBMdSB3cm90ZToNCj4gPiA+ID4NCj4gPiA+ID4gSGkgU2NvdHQsDQo+ID4g
PiA+DQo+ID4gPiA+DQo+ID4gPiA+ID4NCj4gPiA+ID4gPg0KPiA+ID4gPiA+IC0tLS0tT3JpZ2lu
YWwgTWVzc2FnZS0tLS0tDQo+ID4gPiA+ID4gRnJvbTogU2NvdHQgV29vZCBbbWFpbHRvOm9zc0Bi
dXNlcnJvci5uZXRdDQo+ID4gPiA+ID4gU2VudDogRnJpZGF5LCBKdWx5IDIyLCAyMDE2IDEyOjQ1
IEFNDQo+ID4gPiA+ID4gVG86IE1pY2hhZWwgRWxsZXJtYW47IEFybmQgQmVyZ21hbm4NCj4gPiA+
ID4gPiBDYzogbGludXgtbW1jQHZnZXIua2VybmVsLm9yZzsgZGV2aWNldHJlZUB2Z2VyLmtlcm5l
bC5vcmc7DQo+ID4gPiA+ID4gbGludXhwcGMtIGRldkBsaXN0cy5vemxhYnMub3JnOyBsaW51eC1r
ZXJuZWxAdmdlci5rZXJuZWwub3JnOw0KPiA+ID4gPiA+IFlhbmdibyBMdQ0KPiA+ID4gPiA+IFN1
YmplY3Q6IFJlOiBbUEFUQ0ggdjExIDQvNV0gcG93ZXJwYy9mc2w6IG1vdmUgbXBjODV4eC5oIHRv
DQo+ID4gPiA+ID4gaW5jbHVkZS9saW51eC9mc2wNCj4gPiA+ID4gPg0KPiA+ID4gPiA+IE9uIFRo
dSwgMjAxNi0wNy0yMSBhdCAyMDoyNiArMTAwMCwgTWljaGFlbCBFbGxlcm1hbiB3cm90ZToNCj4g
PiA+ID4gPiA+DQo+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gUXVvdGluZyBTY290dCBXb29kICgy
MDE2LTA3LTIxIDA0OjMxOjQ4KQ0KPiA+ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gPg0KPiA+ID4g
PiA+ID4gPg0KPiA+ID4gPiA+ID4gPiBPbiBXZWQsIDIwMTYtMDctMjAgYXQgMTM6MjQgKzAyMDAs
IEFybmQgQmVyZ21hbm4gd3JvdGU6DQo+ID4gPiA+ID4gPiA+ID4NCj4gPiA+ID4gPiA+ID4gPg0K
PiA+ID4gPiA+ID4gPiA+DQo+ID4gPiA+ID4gPiA+ID4gT24gU2F0dXJkYXksIEp1bHkgMTYsIDIw
MTYgOTo1MDoyMSBQTSBDRVNUIFNjb3R0IFdvb2Qgd3JvdGU6DQo+ID4gPiA+ID4gPiA+ID4gPg0K
PiA+ID4gPiA+ID4gPiA+ID4NCj4gPiA+ID4gPiA+ID4gPiA+DQo+ID4gPiA+ID4gPiA+ID4gPg0K
PiA+ID4gPiA+ID4gPiA+ID4gRnJvbTogeWFuZ2JvIGx1IDx5YW5nYm8ubHVAbnhwLmNvbT4NCj4g
PiA+ID4gPiA+ID4gPiA+DQo+ID4gPiA+ID4gPiA+ID4gPiBNb3ZlIG1wYzg1eHguaCB0byBpbmNs
dWRlL2xpbnV4L2ZzbCBhbmQgcmVuYW1lIGl0IHRvDQo+ID4gPiA+ID4gPiA+ID4gPiBzdnIuaCBh
cyBhIGNvbW1vbiBoZWFkZXIgZmlsZS7CoMKgVGhpcyBTVlIgbnVtYmVyc3BhY2UgaXMNCj4gPiA+
ID4gPiA+ID4gPiA+IHVzZWQgb24gc29tZSBBUk0gY2hpcHMgYXMgd2VsbCBhcyBQUEMsIGFuZCBl
dmVuIHRvIGNoZWNrDQo+ID4gPiA+ID4gPiA+ID4gPiBmb3IgYSBQUEMgU1ZSIG11bHRpLWFyY2gg
ZHJpdmVycyB3b3VsZCBvdGhlcndpc2UgbmVlZCB0bw0KPiA+ID4gPiA+ID4gPiA+ID4gaWZkZWYg
dGhlIGhlYWRlciBpbmNsdXNpb24gYW5kIGFsbCByZWZlcmVuY2VzIHRvIHRoZSBTVlINCj4gc3lt
Ym9scy4NCj4gPiA+ID4gPiA+ID4gPiA+DQo+ID4gPiA+ID4gPiA+ID4gPiBTaWduZWQtb2ZmLWJ5
OiBZYW5nYm8gTHUgPHlhbmdiby5sdUBueHAuY29tPg0KPiA+ID4gPiA+ID4gPiA+ID4gQWNrZWQt
Ynk6IFdvbGZyYW0gU2FuZyA8d3NhQHRoZS1kcmVhbXMuZGU+DQo+ID4gPiA+ID4gPiA+ID4gPiBB
Y2tlZC1ieTogU3RlcGhlbiBCb3lkIDxzYm95ZEBjb2RlYXVyb3JhLm9yZz4NCj4gPiA+ID4gPiA+
ID4gPiA+IEFja2VkLWJ5OiBKb2VyZyBSb2VkZWwgPGpyb2VkZWxAc3VzZS5kZT4NCj4gPiA+ID4g
PiA+ID4gPiA+IFtzY290dHdvb2Q6IHVwZGF0ZSBkZXNjcmlwdGlvbl0NCj4gPiA+ID4gPiA+ID4g
PiA+IFNpZ25lZC1vZmYtYnk6IFNjb3R0IFdvb2QgPG9zc0BidXNlcnJvci5uZXQ+DQo+ID4gPiA+
ID4gPiA+ID4gPg0KPiA+ID4gPiA+ID4gPiA+IEFzIGRpc2N1c3NlZCBiZWZvcmUsIHBsZWFzZSBk
b24ndCBpbnRyb2R1Y2UgeWV0IGFub3RoZXINCj4gPiA+ID4gPiA+ID4gPiB2ZW5kb3Igc3BlY2lm
aWMgd2F5IHRvIG1hdGNoIGEgU29DIElEIGZyb20gYSBkZXZpY2UgZHJpdmVyLg0KPiA+ID4gPiA+
ID4gPiA+DQo+ID4gPiA+ID4gPiA+ID4gSSd2ZSBwb3N0ZWQgYSBwYXRjaCBmb3IgYW4gZXh0ZW5z
aW9uIHRvIHRoZSBzb2NfZGV2aWNlDQo+ID4gPiA+ID4gPiA+ID4gaW5mcmFzdHJ1Y3R1cmUgdG8g
YWxsb3cgY29tcGFyaW5nIHRoZSBydW5uaW5nIFNvQyB0byBhDQo+ID4gPiA+ID4gPiA+ID4gdGFi
bGUgb2YgZGV2aWNlcywgdXNlIHRoYXQgaW5zdGVhZC4NCj4gPiA+ID4gPiA+ID4gQXMgSSBhc2tl
ZCBiZWZvcmUsIGluIHdoaWNoIHJlbGV2YW50IG1haW50YWluZXJzaGlwIGNhcGFjaXR5DQo+ID4g
PiA+ID4gPiA+IGFyZSB5b3UgTkFDS2luZyB0aGlzPw0KPiA+ID4gPiA+ID4gSSdsbCBuYWNrIHRo
ZSBwb3dlcnBjIHBhcnQgdW50aWwgeW91IGd1eXMgY2FuIGFncmVlLg0KPiA+ID4gPiA+IE9LLCBJ
J3ZlIHB1bGxlZCB0aGVzZSBwYXRjaGVzIG91dC4NCj4gPiA+ID4gPg0KPiA+ID4gPiA+IEZvciB0
aGUgTU1DIGlzc3VlIEkgc3VnZ2VzdCB1c2luZyBpZmRlZiBDT05GSUdfUFBDIGFuZA0KPiA+ID4g
PiA+IG1mc3ByKFNQUk5fU1ZSKSBsaWtlIHRoZSBjbG9jayBkcml2ZXIgZG9lc1sxXSBhbmQgd2Ug
Y2FuIHJldmlzaXQNCj4gPiA+ID4gPiB0aGUgaXNzdWUgaWYvd2hlbiB3ZSBuZWVkIHRvIGRvIHNv
bWV0aGluZyBzaW1pbGFyIG9uIGFuIEFSTSBjaGlwLg0KPiA+ID4gPiBbTHUgWWFuZ2JvLUI0NzA5
M10gSSByZW1lbWJlcmVkIHRoYXQgVWZmZSBoYWQgb3Bwb3NlZCB1cyB0bw0KPiA+ID4gPiBpbnRy
b2R1Y2UNCj4gPiA+ID4gbm9uLSBnZW5lcmljIGhlYWRlciBmaWxlcyhsaWtlICcjaW5jbHVkZSA8
YXNtL21wYzg1eHguaD4nKSBpbiBtbWMNCj4gPiA+ID4gZHJpdmVyIGluaXRpYWxseS4gU28gSSB0
aGluayBpdCB3aWxsIG5vdCBiZSBhY2NlcHRlZCB0byB1c2UgaWZkZWYNCj4gPiA+ID4gQ09ORklH
X1BQQyBhbmQgbWZzcHIoU1BSTl9TVlIpLi4uDQo+ID4gPiA+IEFuZCB0aGlzIG1ldGhvZCBzdGls
bCBjb3VsZG7igJl0IGdldCBTVlIgb2YgQVJNIGNoaXAgbm93Lg0KPiA+ID4gUmlnaHQsIGFzIEkg
c2FpZCB3ZSdsbCBoYXZlIHRvIHJldmlzaXQgdGhlIGlzc3VlIGlmL3doZW4gd2UgaGF2ZSB0aGUN
Cj4gPiA+IHNhbWUgcHJvYmxlbSBvbiBhbiBBUk0gY2hpcC4gwqBUaGF0IGFsc28gYXBwbGllcyBp
ZiB0aGUgUFBDIGlmZGVmIGlzDQo+ID4gPiBzdGlsbCBnZXR0aW5nIE5BQ0tlZCBmcm9tIHRoZSBN
TUMgc2lkZS4NCj4gPiBbTHUgWWFuZ2JvLUI0NzA5M10gSXQncyBub3QgY2xlYXIgZm9yIG1lIGFi
b3V0IHlvdXIgaWRlYSA6KCBEbyB5b3UNCj4gPiBtZWFuIHdlIGNhbiBzdGlsbCB1c2UgdGhpcyBt
ZXRob2QsIG9yIG5vdCA/DQo+ID4gSSB0aGluayBVZmZlIGhhZCBvcHBvc2VkIHRvIHVzZSBpZmRl
ZiBDT05GSUdfUFBDIGFuZCBtZnNwcihTUFJOX1NWUikuDQo+ID4gSXMgdGhlcmUgYW55IHNvbHV0
aW9uIHRvIHJlc29sdmUgPw0KPiA+IDopDQo+IA0KPiBBcyBJIHNhaWQsIEknbSBPSyB3aXRoIHVz
aW5nIHRoZSBTUFIuIMKgSXQncyB1cCB0byB5b3UgdG8gZmluZCBvdXQgd2hldGhlcg0KPiBpdCdz
IHN0aWxsIHVuYWNjZXB0YWJsZSB3aXRoIHRoZSBNTUMgbWFpbnRhaW5lcnMgZ2l2ZW4gYWxsIHRo
ZSBkaXNjdXNzaW9uDQo+IChpdCB3b3VsZCBiZSB0aGUgcXVpY2tlc3Qgd2F5IHRvIGdldCB0aGUg
d29ya2Fyb3VuZCBlbmFibGVkKSwgb3IganVzdCBnbw0KPiB3aXRoIHRoZSBtZXRob2QgYmVsb3cu
DQoNCltMdSBZYW5nYm8tQjQ3MDkzXSBBcyB5b3Uga25vdywgdGhpcyBwYXRjaHNldChhcyBiZWxv
dykgaGFzIGJlZW4gZGlzY3Vzc2VkIGZvciBtb3JlIHRoYW4gb25lIHllYXIuDQpXaGF0IEkgd2Fu
dCBpcyBqdXN0IHRvIGFkZCBhIGZpeCBmb3IgYW4gc3BlY2lmaWMgc29jIHJldmlzaW9uLg0KDQpZ
YW5nYm8gTHUgKDcpOg0KICBEb2N1bWVudGF0aW9uOiBEVDogdXBkYXRlIEZyZWVzY2FsZSBEQ0ZH
IGNvbXBhdGlibGUNCiAgQVJNNjQ6IGR0czogbHMyMDgwYTogYWRkIGRldmljZSBjb25maWd1cmF0
aW9uIG5vZGUNCiAgc29jOiBmc2w6IGFkZCBHVVRTIGRyaXZlciBmb3IgUW9ySVEgcGxhdGZvcm1z
DQogIGR0OiBtb3ZlIGd1dHMgZGV2aWNldHJlZSBkb2Mgb3V0IG9mIHBvd2VycGMgZGlyZWN0b3J5
DQogIHBvd2VycGMvZnNsOiBtb3ZlIG1wYzg1eHguaCB0byBpbmNsdWRlL2xpbnV4L2ZzbA0KICBN
QUlOVEFJTkVSUzogYWRkIGVudHJ5IGZvciBGcmVlc2NhbGUgU29DIGRyaXZlcnMNCiAgbW1jOiBz
ZGhjaS1vZi1lc2RoYzogZml4IGhvc3QgdmVyc2lvbiBmb3IgVDQyNDAtUjEuMC1SMi4wDQoNCkJ1
dCB3ZSBoYXZlIHRvIGFiYW5kb24gaXQgc2luY2UgQXJuZCBzdHJvbmdseSBkaXNhZ3JlZSBvdXIg
Z3V0cyBkcml2ZXIgbWV0aG9kIHRvIGdldCBzb2MgcmV2aXNpb24uDQpOb3cgSSBoYXZlIHRvIGFz
ayB5b3UgdG8gcmVjb25zaWRlciB0aGUgb3JpZ2luYWwgbWV0aG9kIHRvIGdldCBzb2MgcmV2aXNv
biBzaW5jZSB3ZSByZWFsbHkgaGF2ZSBubyBiZXR0ZXIgaWRlYS4NCkFzIFNjb3R0IHN1Z2dlc3Rl
ZCBhYm92ZSwgdXNlIGlmZGVmIENPTkZJR19QUEMgYW5kIG1mc3ByKFNQUk5fU1ZSKSBsaWtlIHRo
ZSBjbG9jayBkcml2ZXIgZG9lcyB0byBnZXQgU1ZSLg0KSXQncyBxdWlja2VzdCB3YXkgdG8gcmVz
b2x2ZSBvdXIgZXNkaGMgaXNzdWUuIENvdWxkIHlvdSByZWNvbnNpZGVyIHRvIHVzZSB0aGlzPw0K
DQpBbHRob3VnaCBBcm5kIHByb3ZpZGVkIGFub3RoZXIgbmV3IG1ldGhvZCBieSBzZW5kaW5nIGEg
cHJvb2Ytb2YtY29uY2VwdCBwYXRjaCBhcyBiZWxvdywgdGhlcmUgd2VyZSBzdGlsbCBtYW55IGNv
bnRyb3ZlcnNpYWwgcG9pbnRzLg0KSSdtIHdvcnJpZWQgdGhhdCB3b3VsZCBiZSBkaXNjdXNzZWQg
Zm9yIGEgcXVpdGUgbG9uZyB0aW1lIGxpa2UgdGhlIGd1dHMgZHJpdmVyLg0KW1BBVENIIDEvNF0g
IGJhc2U6IHNvYzogaW50cm9kdWNlIHNvY19kZXZpY2VfbWF0Y2goKSBpbnRlcmZhY2UNCltQQVRD
SCAyLzRdIHNvYzogZnNsOiBhZGQgR1VUUyBkcml2ZXIgZm9yIFFvcklRIHBsYXRmb3Jtcw0KW1BB
VENIIDMvNF0gbW1jOiBzZGhjaS1vZi1lc2RoYzogZml4IGhvc3QgdmVyc2lvbiBmb3IgVDQyNDAt
UjEuMC1SMi4wDQpbUEFUQ0ggNC80XSBSZXZlcnQgInBvd2VycGMvZnNsOiBNb3ZlIGZzbF9ndXRz
Lmggb3V0IG9mIGFyY2gvcG93ZXJwYyINCg0KQW55d2F5LCB3aGF0IEkgd2FudCBpcyBqdXN0IHRv
IGZpeCB0aGUgZXNkaGMgaXNzdWUgQVNBUC4gDQpVZmZlLCBDb3VsZCB5b3UgcmVjb25zaWRlciB3
aGV0aGVyIHlvdSBjb3VsZCBhY2NlcHQgdGhlIHdheSB1c2luZyBpZmRlZiBDT05GSUdfUFBDIGFu
ZCBtZnNwcihTUFJOX1NWUik/DQpPciBkbyB5b3UgaGF2ZSBhbnkgc3VnZ2VzdGlvbi4NCg0KSSB3
aWxsIGFwcHJlY2lhdGUgeW91ciBzdWdnZXN0aW9uLg0KVGhhbmtzIGEgbG90Lg0KDQotIFlhbmdi
bw0KPiANCj4gPiA+ID4gQW55IG90aGVyIHN1Z2dlc3Rpb24gaGVyZT8NCj4gPiA+IFRoZSBvdGhl
ciBvcHRpb24gaXMgdG8gdHJ5IHRvIGNvbWUgdXAgd2l0aCBzb21ldGhpbmcgdGhhdCBmaXRzIGlu
dG8NCj4gPiA+IEFybmQncyBmcmFtZXdvcmsgd2hpbGUgYWRkcmVzc2luZyB0aGUgY29uY2VybnMg
SSByYWlzZWQuIMKgVGhlIHNvY19pZA0KPiA+ID4gc3RyaW5nIHNob3VsZCBiZSB3ZWxsLXN0cnVj
dHVyZWQgdG8gYXZvaWQgbWlzbWF0Y2hlcyBhbmQNCj4gPiA+IGNvbXBhdGliaWxpdHkgcHJvYmxl
bXMgKGVzcGVjaWFsbHkgc2luY2UgaXQgd291bGQgZ2V0IGV4cG9zZWQgdG8NCj4gPiA+IHVzZXJz
cGFjZSkuIMKgTWF5YmUgc29tZXRoaW5nIGxpa2U6DQo+ID4gPg0KPiA+ID4gc3ZyOjxTVlIgbWlu
dXMgRSBiaXQ+LHN2cmU6PGZ1bGwgU1ZSIGluY2x1ZGluZyBFIGJpdD4sbmFtZTo8c29jDQo+ID4g
PiBuYW1lPixkaWU6PHNvYyBkaWUgbmFtZT4scmV2OlguWSw8dGFnMT4sPHRhZzI+LDwuLi4+LA0K
PiA+IFtMdSBZYW5nYm8tQjQ3MDkzXSBUaGUgc29jX2RldmljZV9hdHRyaWJ1dCBzdHJ1Y3QgaXMg
ZGVmaW5lZCBhcyBiZWxvdy4NCj4gPiBzdHJ1Y3Qgc29jX2RldmljZV9hdHRyaWJ1dGUgew0KPiA+
IMKgwqDCoMKgwqDCoMKgwqBjb25zdCBjaGFyICptYWNoaW5lOw0KPiA+IMKgwqDCoMKgwqDCoMKg
wqBjb25zdCBjaGFyICpmYW1pbHk7DQo+ID4gwqDCoMKgwqDCoMKgwqDCoGNvbnN0IGNoYXIgKnJl
dmlzaW9uOw0KPiA+IMKgwqDCoMKgwqDCoMKgwqBjb25zdCBjaGFyICpzb2NfaWQ7DQo+ID4gfTsN
Cj4gPg0KPiA+IFdlIGNhbiBwdXQgdGhlICdtb2RlbCcgaW4gcm9vdCBub2RlIG9mIGR0cyBhcyBt
YWNoaW5lLCBwdXQgJ0ZyZWVzY2FsZQ0KPiBRb3JJUScNCj4gPiBhcyBmYW1pbHksDQo+IA0KPiBJ
J2QganVzdCBwdXQgIlFvcklRIiB0byBhdm9pZCB0aGUgcXVlc3Rpb24gb2Ygd2hldGhlciB0byB1
c2UgIkZyZWVzY2FsZSINCj4gb3IgIk5YUCIuDQo+IA0KPiA+IGFuZCBwdXQgeC54IGFzIHJldmlz
aW9uLiBJcyBpdCBvaz8NCj4gPiBBcyB5b3Ugc3VnZ2VzdGVkLCB5b3UgbGlrZSB0byB1c2UgYmVs
b3cgc3RyaW5nIGFzIHNvY19pZC4gSXQncyBlYXN5IHRvDQo+ID4gZ2V0IHN2ciwgYnV0IGhvdyBk
b2VzIHRoZSBzb2Z0d2FyZSBrbm93IHRoZSBuYW1lIGFuZCBkaWUsIGFuZCBwdXQgdGhlbQ0KPiA+
IGludG8gdGhpcyBzdHJpbmcgPyBJdCdzIGEgbGFyZ2UgY29kZSB0byBkZWZpbmUgdGhlbS4NCj4g
DQo+IFllcywgdGhlcmUgd291bGQgbmVlZCB0byBiZSBhIHRhYmxlIGluIHRoZSBndXRzIGRyaXZl
ciBmb3IgZWFjaCBTVlIuIMKgSWYNCj4gdGhlIFNWUiBpc24ndCBmb3VuZCBpbiB0aGUgdGFibGUg
dGhlbiB0aGUgc29jX2lkIHdvdWxkIG9ubHkgY29udGFpbiB0aGUNCj4gc3ZyOiBhbmQNCj4gc3Zy
ZTogZmllbGRzLg0KPiANCj4gPiA+DQo+ID4gPiBzdnI6PFNWUiBtaW51cyBFIGJpdD4sc3ZyZTo8
ZnVsbCBTVlIgaW5jbHVkaW5nIEUgYml0PixuYW1lOjxzb2MNCj4gPiA+IG5hbWU+LGRpZTo8c29j
IGRpZSBuYW1lPixyZXY6WC5ZLDx0YWcxPiw8dGFnMj4sPC4uLj4sDQo+ID4gU2hvdWxkIHdlIHJl
bW92ZSByZXYgaGVyZSBzaW5jZSB0aGVyZSBpcyBhbHNvIGEgcmV2aXNpb24gbWVtYmVyPw0KPiAN
Cj4gWWVzLCBJIGZvcmdvdCB0aGVyZSB3YXMgYSByZXZpc2lvbiBmaWVsZCAtLSBpdCBzaG91bGQg
Z28gdGhlcmUgb2J2aW91c2x5Lg0KPiANCj4gPiBSZWdhcmRpbmcgdGhlIGd1dHNfaW5pdCwgd2Ug
c3RpbGwgY2FsbCBndXRzX2luaXQgYW5kIHRoZW4gbWF0Y2ggdGhlDQo+ID4gc29jLCBvciB3ZSBj
aGFuZ2UgdG8gdXNlIHBsYXRmb3JtIGRyaXZlcj8NCj4gPiBPciBkbyB5b3Uga25vdyBhbnkgYmV0
dGVyIHBsYWNlIHRvIGNhbGwgZ3V0c19pbml0IHRvIGluaXRpYWxpemUgb25seQ0KPiBvbmNlPw0K
PiANCj4gVXNlIGEgcGxhdGZvcm0gZHJpdmVyIGZvciBub3cuIMKgSWYgd2UgZXZlciBuZWVkIHRv
IGNoZWNrIGFuIEFSTSBTVlIgaW4NCj4gdGhlIGNsb2NrIGRyaXZlciBvciBzaW1pbGFyIHBsYWNl
LCB0aGVuIEFybmQgY2FuIGV4cGxhaW4gd2hhdCBoZSB3YW50cyB1cw0KPiB0byBkbyB0aGVuIDot
KQ0KPiANCj4gLVNjb3R0DQoNCg==

[PATCH v11 5/5] powerpc/fsl-pci: Use fsl_guts_get_svr()

[Scott Wood]

Establish an initial user of fsl_guts_get_svr(), so that the code gets
some test coverage until users outside arch/powerpc can get converted.

Signed-off-by: Scott Wood <oss@buserror.net>
---
 arch/powerpc/Kconfig          | 1 +
 arch/powerpc/sysdev/fsl_pci.c | 6 +++++-
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index fcfe533..765df81 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -777,6 +777,7 @@ config FSL_PCI
  	bool
 	select PPC_INDIRECT_PCI
 	select PCI_QUIRKS
+	select FSL_GUTS
 
 config FSL_PMC
 	bool
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 0fd1895..9ba570cf 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -22,6 +22,7 @@
 #include <linux/delay.h>
 #include <linux/string.h>
 #include <linux/fsl/edac.h>
+#include <linux/fsl/guts.h>
 #include <linux/fsl/svr.h>
 #include <linux/init.h>
 #include <linux/interrupt.h>
@@ -529,7 +530,10 @@ int fsl_add_bridge(struct platform_device *pdev, int is_primary)
 	struct device_node *dev;
 	struct ccsr_pci __iomem *pci;
 	u16 temp;
-	u32 svr = mfspr(SPRN_SVR);
+	u32 svr;
+
+	fsl_guts_init();
+	svr = fsl_guts_get_svr();
 
 	dev = pdev->dev.of_node;
 
-- 
2.7.4