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From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
	"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH 2/4] powerpc/mm/radix: Use different RTS encoding for different POWER9 revs
Date: Wed, 24 Aug 2016 15:03:37 +0530	[thread overview]
Message-ID: <1472031219-18759-2-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1472031219-18759-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>

POWER9 DD1 uses RTS - 28 for the RTS value but other revisions use
RTS - 31.  This makes this distinction for the different revisions

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/book3s/64/radix.h | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/include/asm/book3s/64/radix.h b/arch/powerpc/include/asm/book3s/64/radix.h
index df294224e280..a2fe8fbfbd3d 100644
--- a/arch/powerpc/include/asm/book3s/64/radix.h
+++ b/arch/powerpc/include/asm/book3s/64/radix.h
@@ -233,14 +233,19 @@ static inline unsigned long radix__get_tree_size(void)
 {
 	unsigned long rts_field;
 	/*
-	 * we support 52 bits, hence 52-31 = 21, 0b10101
+	 * We support 52 bits, hence:
+	 *  DD1    52-28 = 24, 0b11000
+	 *  Others 52-31 = 21, 0b10101
 	 * RTS encoding details
 	 * bits 0 - 3 of rts -> bits 6 - 8 unsigned long
 	 * bits 4 - 5 of rts -> bits 62 - 63 of unsigned long
 	 */
-	rts_field = (0x5UL << 5); /* 6 - 8 bits */
-	rts_field |= (0x2UL << 61);
-
+	if (cpu_has_feature(CPU_FTR_POWER9_DD1))
+		rts_field = (0x3UL << 61);
+	else {
+		rts_field = (0x5UL << 5); /* 6 - 8 bits */
+		rts_field |= (0x2UL << 61);
+	}
 	return rts_field;
 }
 #endif /* __ASSEMBLY__ */
-- 
2.7.4

  reply	other threads:[~2016-08-24  9:34 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-24  9:33 [PATCH 1/4] powerpc/book3s: Add a cpu table entry for different POWER9 revs Aneesh Kumar K.V
2016-08-24  9:33 ` Aneesh Kumar K.V [this message]
2016-09-06  1:11   ` [PATCH 2/4] powerpc/mm/radix: Use different RTS encoding " Michael Neuling
2016-08-24  9:33 ` [PATCH 3/4] powerpc/mm/radix: Use different pte update sequence " Aneesh Kumar K.V
2016-09-06  1:12   ` Michael Neuling
2016-08-24  9:33 ` [PATCH 4/4] powerpc/mm: Update the HID bit when switching from radix to hash Aneesh Kumar K.V
2016-09-06  1:18   ` Michael Neuling
2016-09-06  1:10 ` [PATCH 1/4] powerpc/book3s: Add a cpu table entry for different POWER9 revs Michael Neuling
2016-09-13 12:16 ` [1/4] " Michael Ellerman

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