From: Benjamin Herrenschmidt <benh@au1.ibm.com>
To: Dan Carpenter <dan.carpenter@oracle.com>,
matthias.fuchs@esd-electronics.com
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper
Date: Wed, 26 Oct 2016 13:57:23 -0500 [thread overview]
Message-ID: <1477508243.2828.70.camel@au1.ibm.com> (raw)
In-Reply-To: <20161026130311.GA3080@elgon.mountain>
On Wed, 2016-10-26 at 16:03 +0300, Dan Carpenter wrote:
> 565 cbdv = ((pllmr & 0x00060000) >> 17) + 1; /* CPU:PLB */
> 566 opdv = ((pllmr & 0x00018000) >> 15) + 1; /* PLB:OPB */
> 567 ppdv = ((pllmr & 0x00001800) >> 13) + 1; /* PLB:PCI */
> ^^^^^^^^^^^^^^^^^
> This is zero. It looks like 0x00000600 was probably intended?
I just checked the spec and for the 405gp and it's 0x6000 (bits 17 and
18 in IBM ordering)
Cheers,
Ben.
next prev parent reply other threads:[~2016-10-26 18:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-10-26 13:03 [bug report] [POWERPC] 4xx: Add 405GPr and 405EP support in boot wrapper Dan Carpenter
2016-10-26 18:57 ` Benjamin Herrenschmidt [this message]
2016-10-26 19:07 ` Dan Carpenter
2016-10-26 20:50 ` Benjamin Herrenschmidt
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