From: Paul Mackerras <paulus@ozlabs.org>
To: kvm@vger.kernel.org, kvm-ppc@vger.kernel.org, linuxppc-dev@ozlabs.org
Subject: [PATCH 04/13] KVM: PPC: Book3S HV: Don't lose hardware R/C bit updates in H_PROTECT
Date: Fri, 18 Nov 2016 18:28:33 +1100 [thread overview]
Message-ID: <1479454122-26994-5-git-send-email-paulus@ozlabs.org> (raw)
In-Reply-To: <1479454122-26994-1-git-send-email-paulus@ozlabs.org>
The hashed page table MMU in POWER processors can update the R
(reference) and C (change) bits in a HPTE at any time until the
HPTE has been invalidated and the TLB invalidation sequence has
completed. In kvmppc_h_protect, which implements the H_PROTECT
hypercall, we read the HPTE, modify the second doubleword,
invalidate the HPTE in memory, do the TLB invalidation sequence,
and then write the modified value of the second doubleword back
to memory. In doing so we could overwrite an R/C bit update done
by hardware between when we read the HPTE and when the TLB
invalidation completed. To fix this we re-read the second
doubleword after the TLB invalidation and OR in the (possibly)
new values of R and C. We can use an OR since hardware only ever
sets R and C, never clears them.
This race was found by code inspection. In principle this bug could
cause occasional guest memory corruption under host memory pressure.
Fixes: a8606e20e41a ("KVM: PPC: Handle some PAPR hcalls in the kernel", 2011-06-29)
Cc: stable@vger.kernel.org # v3.19+
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
---
arch/powerpc/kvm/book3s_hv_rm_mmu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_hv_rm_mmu.c b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
index 752451f3..02786b3 100644
--- a/arch/powerpc/kvm/book3s_hv_rm_mmu.c
+++ b/arch/powerpc/kvm/book3s_hv_rm_mmu.c
@@ -670,6 +670,8 @@ long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,
HPTE_V_ABSENT);
do_tlbies(kvm, &rb, 1, global_invalidates(kvm, flags),
true);
+ /* Don't lose R/C bit updates done by hardware */
+ r |= be64_to_cpu(hpte[1]) & (HPTE_R_R | HPTE_R_C);
hpte[1] = cpu_to_be64(r);
}
}
--
2.7.4
next prev parent reply other threads:[~2016-11-18 7:28 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-18 7:28 [PATCH 00/13] KVM: PPC: Support POWER9 guests Paul Mackerras
2016-11-18 7:28 ` [PATCH 01/13] powerpc/64: Add some more SPRs and SPR bits for POWER9 Paul Mackerras
2016-11-18 7:28 ` [PATCH 02/13] powerpc/64: Provide functions for accessing POWER9 partition table Paul Mackerras
2016-11-18 14:27 ` Aneesh Kumar K.V
2016-11-19 4:19 ` Paul Mackerras
2016-11-19 6:35 ` Aneesh Kumar K.V
2016-11-21 2:14 ` Paul Mackerras
2016-11-19 0:45 ` Balbir Singh
2016-11-19 4:23 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 03/13] powerpc/powernv: Define real-mode versions of OPAL XICS accessors Paul Mackerras
2016-11-18 7:28 ` Paul Mackerras [this message]
2016-11-18 7:28 ` [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9 Paul Mackerras
2016-11-19 0:38 ` Balbir Singh
2016-11-21 2:02 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 06/13] KVM: PPC: Book3S HV: Set partition table rather than SDR1 " Paul Mackerras
2016-11-19 1:01 ` Balbir Singh
2016-11-18 7:28 ` [PATCH 07/13] KVM: PPC: Book3S HV: Adjust host/guest context switch for POWER9 Paul Mackerras
2016-11-18 14:35 ` Aneesh Kumar K.V
2016-11-19 4:02 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 08/13] KVM: PPC: Book3S HV: Add new POWER9 guest-accessible SPRs Paul Mackerras
2016-11-18 7:28 ` [PATCH 09/13] KVM: PPC: Book3S HV: Adapt TLB invalidations to work on POWER9 Paul Mackerras
2016-11-18 14:41 ` Aneesh Kumar K.V
2016-11-18 21:57 ` Benjamin Herrenschmidt
2016-11-19 4:14 ` Paul Mackerras
2016-11-19 4:41 ` Benjamin Herrenschmidt
2016-11-19 4:13 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 10/13] KVM: PPC: Book3S HV: Use msgsnd for IPIs to other cores " Paul Mackerras
2016-11-18 14:47 ` Aneesh Kumar K.V
2016-11-19 3:53 ` Paul Mackerras
2016-11-18 7:28 ` [PATCH 11/13] KVM: PPC: Book3S HV: Use OPAL XICS emulation " Paul Mackerras
2016-11-18 7:28 ` [PATCH 12/13] KVM: PPC: Book3S HV: Use stop instruction rather than nap " Paul Mackerras
2016-11-18 7:28 ` [PATCH 13/13] KVM: PPC: Book3S HV: Treat POWER9 CPU threads as independent subcores Paul Mackerras
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