* [PATCH 1/5] powerpc/perf: Factor of event_alternative function @ 2017-01-30 12:23 Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list Madhavan Srinivasan ` (3 more replies) 0 siblings, 4 replies; 7+ messages in thread From: Madhavan Srinivasan @ 2017-01-30 12:23 UTC (permalink / raw) To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan Factor out the power8 event_alternative function to share the code with power9. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/isa207-common.c | 36 ++++++++++++++++++++++++++++++++++++ arch/powerpc/perf/isa207-common.h | 3 +++ arch/powerpc/perf/power8-pmu.c | 35 ++--------------------------------- 3 files changed, 41 insertions(+), 33 deletions(-) diff --git a/arch/powerpc/perf/isa207-common.c b/arch/powerpc/perf/isa207-common.c index 50e598cf644b..a86fadee352b 100644 --- a/arch/powerpc/perf/isa207-common.c +++ b/arch/powerpc/perf/isa207-common.c @@ -338,3 +338,39 @@ void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]) if (pmc <= 3) mmcr[1] &= ~(0xffUL << MMCR1_PMCSEL_SHIFT(pmc + 1)); } + +static int find_alternative(u64 event, const unsigned int ev_alt[][MAX_ALT], int size) +{ + int i, j; + + for (i = 0; i < size; ++i) { + if (event < ev_alt[i][0]) + break; + + for (j = 0; j < MAX_ALT && ev_alt[i][j]; ++j) + if (event == ev_alt[i][j]) + return i; + } + + return -1; +} + +int isa207_get_alternatives(u64 event, u64 alt[], + const unsigned int ev_alt[][MAX_ALT], int size) +{ + int i, j, num_alt = 0; + u64 alt_event; + + alt[num_alt++] = event; + i = find_alternative(event, ev_alt, size); + if (i >= 0) { + /* Filter out the original event, it's already in alt[0] */ + for (j = 0; j < MAX_ALT; ++j) { + alt_event = ev_alt[i][j]; + if (alt_event && alt_event != event) + alt[num_alt++] = alt_event; + } + } + + return num_alt; +} diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h index 90495f1580c7..3e9150f6690a 100644 --- a/arch/powerpc/perf/isa207-common.h +++ b/arch/powerpc/perf/isa207-common.h @@ -260,5 +260,8 @@ int isa207_compute_mmcr(u64 event[], int n_ev, unsigned int hwc[], unsigned long mmcr[], struct perf_event *pevents[]); void isa207_disable_pmc(unsigned int pmc, unsigned long mmcr[]); +int isa207_get_alternatives(u64 event, u64 alt[], + const unsigned int ev_alt[][MAX_ALT], int size); + #endif diff --git a/arch/powerpc/perf/power8-pmu.c b/arch/powerpc/perf/power8-pmu.c index d07186382f3a..ce15b19a7962 100644 --- a/arch/powerpc/perf/power8-pmu.c +++ b/arch/powerpc/perf/power8-pmu.c @@ -48,43 +48,12 @@ static const unsigned int event_alternatives[][MAX_ALT] = { { PM_RUN_INST_CMPL_ALT, PM_RUN_INST_CMPL }, }; -/* - * Scan the alternatives table for a match and return the - * index into the alternatives table if found, else -1. - */ -static int find_alternative(u64 event) -{ - int i, j; - - for (i = 0; i < ARRAY_SIZE(event_alternatives); ++i) { - if (event < event_alternatives[i][0]) - break; - - for (j = 0; j < MAX_ALT && event_alternatives[i][j]; ++j) - if (event == event_alternatives[i][j]) - return i; - } - - return -1; -} - static int power8_get_alternatives(u64 event, unsigned int flags, u64 alt[]) { int i, j, num_alt = 0; - u64 alt_event; - - alt[num_alt++] = event; - - i = find_alternative(event); - if (i >= 0) { - /* Filter out the original event, it's already in alt[0] */ - for (j = 0; j < MAX_ALT; ++j) { - alt_event = event_alternatives[i][j]; - if (alt_event && alt_event != event) - alt[num_alt++] = alt_event; - } - } + num_alt = isa207_get_alternatives(event, alt, event_alternatives, + (int)ARRAY_SIZE(event_alternatives)); if (flags & PPMU_ONLY_COUNT_RUN) { /* * We're only counting in RUN state, so PM_CYC is equivalent to -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list 2017-01-30 12:23 [PATCH 1/5] powerpc/perf: Factor of event_alternative function Madhavan Srinivasan @ 2017-01-30 12:23 ` Madhavan Srinivasan 2017-02-01 11:00 ` Anton Blanchard 2017-01-30 12:23 ` [PATCH 3/5] powerpc/perf: Add alternative event table and function for power9 Madhavan Srinivasan ` (2 subsequent siblings) 3 siblings, 1 reply; 7+ messages in thread From: Madhavan Srinivasan @ 2017-01-30 12:23 UTC (permalink / raw) To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/power9-events-list.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/powerpc/perf/power9-events-list.h b/arch/powerpc/perf/power9-events-list.h index 929b56d47ad9..8210b0d5bcd1 100644 --- a/arch/powerpc/perf/power9-events-list.h +++ b/arch/powerpc/perf/power9-events-list.h @@ -53,3 +53,6 @@ EVENT(PM_ITLB_MISS, 0x400fc) EVENT(PM_RUN_INST_CMPL, 0x500fa) /* Run_cycles */ EVENT(PM_RUN_CYC, 0x600f4) +/* Instruction Dispatched */ +EVENT(PM_INST_DISP, 0x200f0) +EVENT(PM_INST_DISP_ALT, 0x300f0) -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list 2017-01-30 12:23 ` [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list Madhavan Srinivasan @ 2017-02-01 11:00 ` Anton Blanchard 2017-02-01 15:18 ` Madhavan Srinivasan 0 siblings, 1 reply; 7+ messages in thread From: Anton Blanchard @ 2017-02-01 11:00 UTC (permalink / raw) To: Madhavan Srinivasan; +Cc: mpe, linuxppc-dev Hi Maddy, > +EVENT(PM_INST_DISP, 0x200f0) > +EVENT(PM_INST_DISP_ALT, 0x300f0) Are you sure these are the right events? 0x200f2, 0x300f2 should be instruction dispatch I think. Anton ^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list 2017-02-01 11:00 ` Anton Blanchard @ 2017-02-01 15:18 ` Madhavan Srinivasan 0 siblings, 0 replies; 7+ messages in thread From: Madhavan Srinivasan @ 2017-02-01 15:18 UTC (permalink / raw) To: Anton Blanchard; +Cc: mpe, linuxppc-dev On Wednesday 01 February 2017 04:30 PM, Anton Blanchard wrote: > Hi Maddy, > >> +EVENT(PM_INST_DISP, 0x200f0) >> +EVENT(PM_INST_DISP_ALT, 0x300f0) > Are you sure these are the right events? 0x200f2, 0x300f2 should be > instruction dispatch I think. Damn. This is bad. I looked at the wrong column. You are right 0x200f2 and 0x300f2 are the PM_INST_DISPL. Nice catch. Will fix it. Thanks Anton. Maddy > > Anton > ^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH 3/5] powerpc/perf: Add alternative event table and function for power9 2017-01-30 12:23 [PATCH 1/5] powerpc/perf: Factor of event_alternative function Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list Madhavan Srinivasan @ 2017-01-30 12:23 ` Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 4/5] powerpc/perf: Use PM_INST_DISP for generic instructions sample Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 5/5] powerpc/perf: Add restrictions to PMC5 in power9 DD1 Madhavan Srinivasan 3 siblings, 0 replies; 7+ messages in thread From: Madhavan Srinivasan @ 2017-01-30 12:23 UTC (permalink / raw) To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/power9-pmu.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c index 7332634e18c9..b38acff8a791 100644 --- a/arch/powerpc/perf/power9-pmu.c +++ b/arch/powerpc/perf/power9-pmu.c @@ -106,6 +106,21 @@ enum { /* PowerISA v2.07 format attribute structure*/ extern struct attribute_group isa207_pmu_format_group; +/* Table of alternatives, sorted by column 0 */ +static const unsigned int power9_event_alternatives[][MAX_ALT] = { + { PM_INST_DISP, PM_INST_DISP_ALT }, +}; + +static int power9_get_alternatives(u64 event, unsigned int flags, u64 alt[]) +{ + int num_alt = 0; + + num_alt = isa207_get_alternatives(event, alt, power9_event_alternatives, + (int)ARRAY_SIZE(power9_event_alternatives)); + + return num_alt; +} + GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC); GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC); GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL); @@ -383,6 +398,7 @@ static struct power_pmu power9_isa207_pmu = { .config_bhrb = power9_config_bhrb, .bhrb_filter_map = power9_bhrb_filter_map, .get_constraint = isa207_get_constraint, + .get_alternatives = power9_get_alternatives, .disable_pmc = isa207_disable_pmc, .flags = PPMU_NO_SIAR | PPMU_ARCH_207S, .n_generic = ARRAY_SIZE(power9_generic_events), @@ -401,6 +417,7 @@ static struct power_pmu power9_pmu = { .config_bhrb = power9_config_bhrb, .bhrb_filter_map = power9_bhrb_filter_map, .get_constraint = isa207_get_constraint, + .get_alternatives = power9_get_alternatives, .disable_pmc = isa207_disable_pmc, .flags = PPMU_HAS_SIER | PPMU_ARCH_207S, .n_generic = ARRAY_SIZE(power9_generic_events), -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 4/5] powerpc/perf: Use PM_INST_DISP for generic instructions sample 2017-01-30 12:23 [PATCH 1/5] powerpc/perf: Factor of event_alternative function Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 3/5] powerpc/perf: Add alternative event table and function for power9 Madhavan Srinivasan @ 2017-01-30 12:23 ` Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 5/5] powerpc/perf: Add restrictions to PMC5 in power9 DD1 Madhavan Srinivasan 3 siblings, 0 replies; 7+ messages in thread From: Madhavan Srinivasan @ 2017-01-30 12:23 UTC (permalink / raw) To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan PM_INST_CMPL may not provide right counts in all sampling scenarios in power9 DD1, instead use PM_INST_DISP. Patch also update generic instruction sampling with the same. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/power9-pmu.c | 55 ++++++++++++++++++++++++++++++++++++++---- 1 file changed, 50 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c index b38acff8a791..a956bda9ecf4 100644 --- a/arch/powerpc/perf/power9-pmu.c +++ b/arch/powerpc/perf/power9-pmu.c @@ -125,6 +125,7 @@ GENERIC_EVENT_ATTR(cpu-cycles, PM_CYC); GENERIC_EVENT_ATTR(stalled-cycles-frontend, PM_ICT_NOSLOT_CYC); GENERIC_EVENT_ATTR(stalled-cycles-backend, PM_CMPLU_STALL); GENERIC_EVENT_ATTR(instructions, PM_INST_CMPL); +GENERIC_EVENT_ATTR(instruction, PM_INST_DISP); GENERIC_EVENT_ATTR(branch-instructions, PM_BRU_CMPL); GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL); GENERIC_EVENT_ATTR(cache-references, PM_LD_REF_L1); @@ -147,6 +148,34 @@ CACHE_EVENT_ATTR(branch-loads, PM_BRU_CMPL); CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS); CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS); +static struct attribute *power9_events_attr_dd1[] = { + GENERIC_EVENT_PTR(PM_CYC), + GENERIC_EVENT_PTR(PM_ICT_NOSLOT_CYC), + GENERIC_EVENT_PTR(PM_CMPLU_STALL), + GENERIC_EVENT_PTR(PM_INST_DISP), + GENERIC_EVENT_PTR(PM_BRU_CMPL), + GENERIC_EVENT_PTR(PM_BR_MPRED_CMPL), + GENERIC_EVENT_PTR(PM_LD_REF_L1), + GENERIC_EVENT_PTR(PM_LD_MISS_L1_FIN), + CACHE_EVENT_PTR(PM_LD_MISS_L1_FIN), + CACHE_EVENT_PTR(PM_LD_REF_L1), + CACHE_EVENT_PTR(PM_L1_PREF), + CACHE_EVENT_PTR(PM_ST_MISS_L1), + CACHE_EVENT_PTR(PM_L1_ICACHE_MISS), + CACHE_EVENT_PTR(PM_INST_FROM_L1), + CACHE_EVENT_PTR(PM_IC_PREF_WRITE), + CACHE_EVENT_PTR(PM_DATA_FROM_L3MISS), + CACHE_EVENT_PTR(PM_DATA_FROM_L3), + CACHE_EVENT_PTR(PM_L3_PREF_ALL), + CACHE_EVENT_PTR(PM_L2_ST_MISS), + CACHE_EVENT_PTR(PM_L2_ST), + CACHE_EVENT_PTR(PM_BR_MPRED_CMPL), + CACHE_EVENT_PTR(PM_BRU_CMPL), + CACHE_EVENT_PTR(PM_DTLB_MISS), + CACHE_EVENT_PTR(PM_ITLB_MISS), + NULL +}; + static struct attribute *power9_events_attr[] = { GENERIC_EVENT_PTR(PM_CYC), GENERIC_EVENT_PTR(PM_ICT_NOSLOT_CYC), @@ -175,17 +204,22 @@ static struct attribute *power9_events_attr[] = { NULL }; -static struct attribute_group power9_pmu_events_group = { +static struct attribute_group power9_pmu_events_group_dd1 = { .name = "events", - .attrs = power9_events_attr, + .attrs = power9_events_attr_dd1, }; static const struct attribute_group *power9_isa207_pmu_attr_groups[] = { &isa207_pmu_format_group, - &power9_pmu_events_group, + &power9_pmu_events_group_dd1, NULL, }; +static struct attribute_group power9_pmu_events_group = { + .name = "events", + .attrs = power9_events_attr, +}; + PMU_FORMAT_ATTR(event, "config:0-51"); PMU_FORMAT_ATTR(pmcxsel, "config:0-7"); PMU_FORMAT_ATTR(mark, "config:8"); @@ -228,6 +262,17 @@ static const struct attribute_group *power9_pmu_attr_groups[] = { NULL, }; +static int power9_generic_events_dd1[] = { + [PERF_COUNT_HW_CPU_CYCLES] = PM_CYC, + [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC, + [PERF_COUNT_HW_STALLED_CYCLES_BACKEND] = PM_CMPLU_STALL, + [PERF_COUNT_HW_INSTRUCTIONS] = PM_INST_DISP, + [PERF_COUNT_HW_BRANCH_INSTRUCTIONS] = PM_BRU_CMPL, + [PERF_COUNT_HW_BRANCH_MISSES] = PM_BR_MPRED_CMPL, + [PERF_COUNT_HW_CACHE_REFERENCES] = PM_LD_REF_L1, + [PERF_COUNT_HW_CACHE_MISSES] = PM_LD_MISS_L1_FIN, +}; + static int power9_generic_events[] = { [PERF_COUNT_HW_CPU_CYCLES] = PM_CYC, [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = PM_ICT_NOSLOT_CYC, @@ -401,8 +446,8 @@ static struct power_pmu power9_isa207_pmu = { .get_alternatives = power9_get_alternatives, .disable_pmc = isa207_disable_pmc, .flags = PPMU_NO_SIAR | PPMU_ARCH_207S, - .n_generic = ARRAY_SIZE(power9_generic_events), - .generic_events = power9_generic_events, + .n_generic = ARRAY_SIZE(power9_generic_events_dd1), + .generic_events = power9_generic_events_dd1, .cache_events = &power9_cache_events, .attr_groups = power9_isa207_pmu_attr_groups, .bhrb_nr = 32, -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH 5/5] powerpc/perf: Add restrictions to PMC5 in power9 DD1 2017-01-30 12:23 [PATCH 1/5] powerpc/perf: Factor of event_alternative function Madhavan Srinivasan ` (2 preceding siblings ...) 2017-01-30 12:23 ` [PATCH 4/5] powerpc/perf: Use PM_INST_DISP for generic instructions sample Madhavan Srinivasan @ 2017-01-30 12:23 ` Madhavan Srinivasan 3 siblings, 0 replies; 7+ messages in thread From: Madhavan Srinivasan @ 2017-01-30 12:23 UTC (permalink / raw) To: mpe; +Cc: linuxppc-dev, Madhavan Srinivasan PMC5 on POWER9 DD1 may not provide right counts in all sampling scenarios, hence use PM_INST_DISP event instead in PMC2 or PMC3 in preference. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> --- arch/powerpc/perf/isa207-common.h | 4 ++++ arch/powerpc/perf/power9-pmu.c | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/perf/isa207-common.h b/arch/powerpc/perf/isa207-common.h index 3e9150f6690a..cf9bd8990159 100644 --- a/arch/powerpc/perf/isa207-common.h +++ b/arch/powerpc/perf/isa207-common.h @@ -222,6 +222,10 @@ CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \ CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL +/* + * Lets restrict use of PMC5 for instruction counting. + */ +#define P9_DD1_TEST_ADDER (ISA207_TEST_ADDER | CNST_PMC_VAL(5)) /* Bits in MMCR1 for PowerISA v2.07 */ #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) diff --git a/arch/powerpc/perf/power9-pmu.c b/arch/powerpc/perf/power9-pmu.c index a956bda9ecf4..ce00df370ce8 100644 --- a/arch/powerpc/perf/power9-pmu.c +++ b/arch/powerpc/perf/power9-pmu.c @@ -438,7 +438,7 @@ static struct power_pmu power9_isa207_pmu = { .name = "POWER9", .n_counter = MAX_PMU_COUNTERS, .add_fields = ISA207_ADD_FIELDS, - .test_adder = ISA207_TEST_ADDER, + .test_adder = P9_DD1_TEST_ADDER, .compute_mmcr = isa207_compute_mmcr, .config_bhrb = power9_config_bhrb, .bhrb_filter_map = power9_bhrb_filter_map, -- 2.7.4 ^ permalink raw reply related [flat|nested] 7+ messages in thread
end of thread, other threads:[~2017-02-01 15:18 UTC | newest] Thread overview: 7+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-01-30 12:23 [PATCH 1/5] powerpc/perf: Factor of event_alternative function Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 2/5] powerpc/perf: Add PM_INST_DISP event to Power9 event list Madhavan Srinivasan 2017-02-01 11:00 ` Anton Blanchard 2017-02-01 15:18 ` Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 3/5] powerpc/perf: Add alternative event table and function for power9 Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 4/5] powerpc/perf: Use PM_INST_DISP for generic instructions sample Madhavan Srinivasan 2017-01-30 12:23 ` [PATCH 5/5] powerpc/perf: Add restrictions to PMC5 in power9 DD1 Madhavan Srinivasan
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