From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
To: benh@kernel.crashing.org, paulus@samba.org, mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org,
"Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
Subject: [PATCH V3 02/10] powerpc/mm/slice: Fix off-by-1 error when computing slice mask
Date: Tue, 21 Mar 2017 22:59:52 +0530 [thread overview]
Message-ID: <1490117400-9891-2-git-send-email-aneesh.kumar@linux.vnet.ibm.com> (raw)
In-Reply-To: <1490117400-9891-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
For low slice, max addr should be less than 4G. Without limiting this correctly
we will end up with a low slice mask which has 17th bit set. This is not
a problem with the current code because our low slice mask is of type u16. But
in later patch I am switching low slice mask to u64 type and having the 17bit
set result in wrong slice mask which in turn results in mmap failures.
Reviewed-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
---
arch/powerpc/mm/slice.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 2b27458902ee..bf150557dba8 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -83,11 +83,10 @@ static struct slice_mask slice_range_to_mask(unsigned long start,
struct slice_mask ret = { 0, 0 };
if (start < SLICE_LOW_TOP) {
- unsigned long mend = min(end, SLICE_LOW_TOP);
- unsigned long mstart = min(start, SLICE_LOW_TOP);
+ unsigned long mend = min(end, (SLICE_LOW_TOP - 1));
ret.low_slices = (1u << (GET_LOW_SLICE_INDEX(mend) + 1))
- - (1u << GET_LOW_SLICE_INDEX(mstart));
+ - (1u << GET_LOW_SLICE_INDEX(start));
}
if ((start + len) > SLICE_LOW_TOP)
--
2.7.4
next prev parent reply other threads:[~2017-03-21 17:30 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-21 17:29 [PATCH V3 01/10] powerpc/mm/nohash: MM_SLICE is only used by book3s 64 Aneesh Kumar K.V
2017-03-21 17:29 ` Aneesh Kumar K.V [this message]
2017-03-21 17:29 ` [PATCH V3 03/10] powerpc/mm: Cleanup bits definition between hash and radix Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 04/10] powerpc/mm/radix: rename _PAGE_LARGE to R_PAGE_LARGE Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 05/10] powerpc/mm: Add translation mode information in /proc/cpuinfo Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 06/10] powerpc/mm/hugetlb: Filter out hugepage size not supported by page table layout Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 07/10] powerpc/mm: Define _PAGE_SOFT_DIRTY unconditionally Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 08/10] powerpc/mm: Define all PTE bits based on radix definitions Aneesh Kumar K.V
2017-03-21 17:29 ` [PATCH V3 09/10] powerpc/mm: Lower the max real address to 53 bits Aneesh Kumar K.V
2017-03-28 5:32 ` Paul Mackerras
2017-03-21 17:30 ` [PATCH V3 10/10] powerpc/mm: Move hash specific pte bits to be top bits of RPN Aneesh Kumar K.V
2017-03-28 5:33 ` Paul Mackerras
2017-04-03 10:13 ` [V3,01/10] powerpc/mm/nohash: MM_SLICE is only used by book3s 64 Michael Ellerman
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