From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3w3S6v6HVfzDq7g for ; Thu, 13 Apr 2017 14:12:23 +1000 (AEST) Message-ID: <1492056725.7236.95.camel@kernel.crashing.org> Subject: Re: [PATCH 3/3] powernv:idle: Set LPCR_UPRT on wakeup from deep-stop From: Benjamin Herrenschmidt To: "Aneesh Kumar K.V" , "Gautham R. Shenoy" , Michael Ellerman , Michael Neuling , "Shreyas B. Prabhu" , Shilpasri G Bhat , Vaidyanathan Srinivasan , Anton Blanchard , Balbir Singh , Akshay Adiga , Nicholas Piggin , Mahesh J Salgaonkar Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org Date: Thu, 13 Apr 2017 14:12:05 +1000 In-Reply-To: <8737ddq7py.fsf@skywalker.in.ibm.com> References: <9be8410e0abe5ae1afa16a6f987c53046ef51757.1491996797.git.ego@linux.vnet.ibm.com> <8737ddq7py.fsf@skywalker.in.ibm.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Thu, 2017-04-13 at 09:28 +0530, Aneesh Kumar K.V wrote: > >   #endif > >        mtctr   r12 > >        bctrl > > +/* > > + * cur_cpu_spec->cpu_restore would restore LPCR to a > > + * sane value that is set at early boot time, > > + * thereby clearing LPCR_UPRT. > > + * LPCR_UPRT is required if we are running in Radix mode. > > + * Set it here if that be the case. > > + */ > > +BEGIN_MMU_FTR_SECTION > > +     mfspr   r3, SPRN_LPCR > > +     LOAD_REG_IMMEDIATE(r4, LPCR_UPRT) > > +     or      r3, r3, r4 > > +     mtspr   SPRN_LPCR, r3 > > +END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_RADIX) We are probably better off saving the value somewhere during boot and just "blasting" it whole back. Cheers Ben.