From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org,
anton@samba.org, Greg Johnson <gwj@google.com>
Subject: Re: [PATCH] powerpc: Fix booting P9 hash with CONFIG_PPC_RADIX_MMU=N
Date: Thu, 25 May 2017 10:13:49 +1000 [thread overview]
Message-ID: <1495671229.18002.1.camel@neuling.org> (raw)
In-Reply-To: <87bmqir5tl.fsf@skywalker.in.ibm.com>
On Wed, 2017-05-24 at 14:26 +0530, Aneesh Kumar K.V wrote:
> Michael Neuling <mikey@neuling.org> writes:
>=20
> > Currently if you disable CONFIG_PPC_RADIX_MMU you'll crash on boot on
> > a P9. This is because we still set MMU_FTR_TYPE_RADIX via
> > ibm,pa-features and MMU_FTR_TYPE_RADIX is what's used for code patching
> > in much of the asm code (ie. slb_miss_realmode)
> >=20
> > This patch fixes the problem by stopping MMU_FTR_TYPE_RADIX from being
> > set from ibm.pa-features.
> >=20
> > We may eventually end up removing the CONFIG_PPC_RADIX_MMU option
> > completely but until then this fixes the issue.
> >=20
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
> > ---
> > =C2=A0arch/powerpc/kernel/prom.c | 2 ++
> > =C2=A01 file changed, 2 insertions(+)
> >=20
> > diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
> > index 40c4887c27..f830562974 100644
> > --- a/arch/powerpc/kernel/prom.c
> > +++ b/arch/powerpc/kernel/prom.c
> > @@ -161,7 +161,9 @@ static struct ibm_pa_feature {
> > =C2=A0 { .pabyte =3D 0,=C2=A0=C2=A0.pabit =3D 3, .cpu_features=C2=A0=C2=
=A0=3D CPU_FTR_CTRL },
> > =C2=A0 { .pabyte =3D 0,=C2=A0=C2=A0.pabit =3D 6, .cpu_features=C2=A0=C2=
=A0=3D CPU_FTR_NOEXECUTE },
> > =C2=A0 { .pabyte =3D 1,=C2=A0=C2=A0.pabit =3D 2, .mmu_features=C2=A0=C2=
=A0=3D MMU_FTR_CI_LARGE_PAGE
> > },
> > +#ifdef CONFIG_PPC_RADIX_MMU
> > =C2=A0 { .pabyte =3D 40, .pabit =3D 0, .mmu_features=C2=A0=C2=A0=3D MMU=
_FTR_TYPE_RADIX },
> > +#endif
> > =C2=A0 { .pabyte =3D 1,=C2=A0=C2=A0.pabit =3D 1, .invert =3D 1, .cpu_fe=
atures =3D
> > CPU_FTR_NODSISRALIGN },
> > =C2=A0 { .pabyte =3D 5,=C2=A0=C2=A0.pabit =3D 0, .cpu_features=C2=A0=C2=
=A0=3D CPU_FTR_REAL_LE,
> > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0.cpu_user_ftrs =3D PPC_FEATURE_TRUE_L=
E },
> > --=C2=A0
> > 2.11.0
>=20
> Instead can we do that feature removal in mmu_early_init_devtree. ie,
> something like
It looks like mmu_early_init_devtree() gets called after parsing ibm,pa_fea=
tures
so that should work.
> diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
> index 8f6f2a173e47..8f43f3827bac 100644
> --- a/arch/powerpc/mm/init_64.c
> +++ b/arch/powerpc/mm/init_64.c
> @@ -394,7 +394,7 @@ void __init mmu_early_init_devtree(v
> oid)
> =C2=A0{
> =C2=A0 /* Disable radix mode based on kernel command line. */
> =C2=A0 /* We don't yet have the machinery to do radix as a guest. */
> - if (disable_radix || !(mfmsr() & MSR_HV))
> > + if (!IS_ENABLED(CONFIG_PPC_RADIX_MMU) || disable_radix || !(mfmsr() &=
MSR_HV))
What tree is this patch against? Linus' tree doesn't look like that.
Mikey
> =C2=A0 cur_cpu_spec->mmu_features &=3D ~MMU_FTR_TYPE_RADIX;
> =C2=A0
> =C2=A0 /*
>=20
next prev parent reply other threads:[~2017-05-25 0:13 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-24 7:03 [PATCH] powerpc: Fix booting P9 hash with CONFIG_PPC_RADIX_MMU=N Michael Neuling
2017-05-24 8:56 ` Aneesh Kumar K.V
2017-05-25 0:13 ` Michael Neuling [this message]
2017-05-25 2:53 ` Aneesh Kumar K.V
2017-05-25 7:12 ` Michael Neuling
2017-05-25 6:16 ` Michael Ellerman
2017-05-25 6:22 ` Aneesh Kumar K.V
2017-05-25 13:22 ` Michael Ellerman
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