From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xfFt53TqrzDrTM for ; Sat, 26 Aug 2017 08:18:21 +1000 (AEST) Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7PMDwm3073371 for ; Fri, 25 Aug 2017 18:18:19 -0400 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0a-001b2d01.pphosted.com with ESMTP id 2cjp41megc-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Fri, 25 Aug 2017 18:18:19 -0400 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 25 Aug 2017 18:18:18 -0400 From: Uma Krishnan To: linux-scsi@vger.kernel.org, James Bottomley , "Martin K. Petersen" , "Matthew R. Ochs" , "Manoj N. Kumar" Cc: linuxppc-dev@lists.ozlabs.org, Andrew Donnellan , Frederic Barrat , Christophe Lombard Subject: [PATCH 3/3] cxlflash: Fix vlun resize failure in the shrink path Date: Fri, 25 Aug 2017 17:18:12 -0500 In-Reply-To: <1503699440-61464-1-git-send-email-ukrishn@linux.vnet.ibm.com> References: <1503699440-61464-1-git-send-email-ukrishn@linux.vnet.ibm.com> Message-Id: <1503699492-61577-1-git-send-email-ukrishn@linux.vnet.ibm.com> List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , The ioctl DK_CAPI_VLUN_RESIZE can fail if the allocated vlun size is reduced from almost maximum capacity and then increased again. The shrink_lxt() routine is currently using the SISL_ASTATUS_MASK to mask the higher 48 bits of the lxt entry. This is unnecessary and incorrect as it uses a mask designed for the asynchronous interrupt status register. When the 4 port support was added to cxlflash, the SISL_ASTATUS_MASK was updated to reflect the status bits for all 4 ports. This change indirectly affected the shrink_lxt() code path. To extract the base, simply shift the bits without masking. Fixes: 565180723294 ("scsi: cxlflash: SISlite updates to support 4 ports") Signed-off-by: Uma Krishnan --- drivers/scsi/cxlflash/vlun.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/scsi/cxlflash/vlun.c b/drivers/scsi/cxlflash/vlun.c index bdfb930..703bf1e 100644 --- a/drivers/scsi/cxlflash/vlun.c +++ b/drivers/scsi/cxlflash/vlun.c @@ -694,11 +694,7 @@ static int shrink_lxt(struct afu *afu, /* Free LBAs allocated to freed chunks */ mutex_lock(&blka->mutex); for (i = delta - 1; i >= 0; i--) { - /* Mask the higher 48 bits before shifting, even though - * it is a noop - */ - aun = (lxt_old[my_new_size + i].rlba_base & SISL_ASTATUS_MASK); - aun = (aun >> MC_CHUNK_SHIFT); + aun = lxt_old[my_new_size + i].rlba_base >> MC_CHUNK_SHIFT; if (needs_ws) write_same16(sdev, aun, MC_CHUNK_SIZE); ba_free(&blka->ba_lun, aun); -- 2.1.0