* [PATCH V3] cxl: Fix timebase synchronization status on P9
@ 2018-02-16 15:27 Christophe Lombard
2018-02-19 6:10 ` Vaibhav Jain
0 siblings, 1 reply; 3+ messages in thread
From: Christophe Lombard @ 2018-02-16 15:27 UTC (permalink / raw)
To: linuxppc-dev, fbarrat, vaibhav, andrew.donnellan
The PSL Timebase register is updated by the PSL to maintain the
timebase.
On P9, the Timebase value is only provided by the CAPP as received
the last time a timebase request was performed.
The timebase requests are initiated through the adapter configuration or
application registers.
The specific sysfs entry "/sys/class/cxl/cardxx/psl_timebase_synced" is
now dynamically updated according the content of the PSL Timebase
register.
Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
---
This patch applies on top of this patch:
http://patchwork.ozlabs.org/patch/873663/
Changelog[v3]
- Rebased to latest upstream.
- Dynamic update is now applied to P8.
Changelog[v2]
- Missing Signed-off-by.
- Spaces required around the ':'.
---
drivers/misc/cxl/pci.c | 17 -----------------
drivers/misc/cxl/sysfs.c | 10 ++++++++++
2 files changed, 10 insertions(+), 17 deletions(-)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 66eed6a..3247eaf 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -606,9 +606,6 @@ static u64 timebase_read_xsl(struct cxl *adapter)
static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
{
- u64 psl_tb;
- int delta;
- unsigned int retry = 0;
struct device_node *np;
adapter->psl_timebase_synced = false;
@@ -636,20 +633,6 @@ static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
cxl_p1_write(adapter, CXL_PSL_Control, 0x0000000000000000);
cxl_p1_write(adapter, CXL_PSL_Control, CXL_PSL_Control_tb);
- /* Wait until CORE TB and PSL TB difference <= 16usecs */
- do {
- msleep(1);
- if (retry++ > 5) {
- dev_info(&dev->dev, "PSL timebase can't synchronize\n");
- return;
- }
- psl_tb = adapter->native->sl_ops->timebase_read(adapter);
- delta = mftb() - psl_tb;
- if (delta < 0)
- delta = -delta;
- } while (tb_to_ns(delta) > 16000);
-
- adapter->psl_timebase_synced = true;
return;
}
diff --git a/drivers/misc/cxl/sysfs.c b/drivers/misc/cxl/sysfs.c
index a8b6d6a..3f758d9 100644
--- a/drivers/misc/cxl/sysfs.c
+++ b/drivers/misc/cxl/sysfs.c
@@ -62,6 +62,16 @@ static ssize_t psl_timebase_synced_show(struct device *device,
char *buf)
{
struct cxl *adapter = to_cxl_adapter(device);
+ u64 psl_tb;
+ int delta;
+
+ psl_tb = adapter->native->sl_ops->timebase_read(adapter);
+ delta = mftb() - psl_tb;
+ if (delta < 0)
+ delta = -delta;
+
+ /* CORE TB and PSL TB difference <= 16usecs ? */
+ adapter->psl_timebase_synced = (tb_to_ns(delta) < 16000) ? true : false;
return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
}
--
2.7.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH V3] cxl: Fix timebase synchronization status on P9
2018-02-16 15:27 [PATCH V3] cxl: Fix timebase synchronization status on P9 Christophe Lombard
@ 2018-02-19 6:10 ` Vaibhav Jain
2018-02-19 10:15 ` christophe lombard
0 siblings, 1 reply; 3+ messages in thread
From: Vaibhav Jain @ 2018-02-19 6:10 UTC (permalink / raw)
To: Christophe Lombard, linuxppc-dev, fbarrat, andrew.donnellan
Hi Christophe,
Mostly ok with this patch. Some very minor review comments:
Christophe Lombard <clombard@linux.vnet.ibm.com> writes:
> --- a/drivers/misc/cxl/sysfs.c
> +++ b/drivers/misc/cxl/sysfs.c
> @@ -62,6 +62,16 @@ static ssize_t psl_timebase_synced_show(struct device *device,
> char *buf)
> {
> struct cxl *adapter = to_cxl_adapter(device);
> + u64 psl_tb;
> + int delta;
> +
> + psl_tb = adapter->native->sl_ops->timebase_read(adapter);
> + delta = mftb() - psl_tb;
> + if (delta < 0)
> + delta = -delta;
Can just use abs().
> +
> + /* CORE TB and PSL TB difference <= 16usecs ? */
> + adapter->psl_timebase_synced = (tb_to_ns(delta) < 16000) ? true : false;
Can be re-written as
'adapter->psl_timebase_synced = (tb_to_ns(abs(delta)) < 16000);'
>
> return scnprintf(buf, PAGE_SIZE, "%i\n",
> adapter->psl_timebase_synced);
Might be a good idea to debug print/print_once the delta.
--
Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Linux Technology Center, IBM India Pvt. Ltd.
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH V3] cxl: Fix timebase synchronization status on P9
2018-02-19 6:10 ` Vaibhav Jain
@ 2018-02-19 10:15 ` christophe lombard
0 siblings, 0 replies; 3+ messages in thread
From: christophe lombard @ 2018-02-19 10:15 UTC (permalink / raw)
To: Vaibhav Jain, linuxppc-dev, fbarrat, andrew.donnellan
Le 19/02/2018 à 07:10, Vaibhav Jain a écrit :
>
> Hi Christophe,
>
> Mostly ok with this patch. Some very minor review comments:
>
> Christophe Lombard <clombard@linux.vnet.ibm.com> writes:
>> --- a/drivers/misc/cxl/sysfs.c
>> +++ b/drivers/misc/cxl/sysfs.c
>> @@ -62,6 +62,16 @@ static ssize_t psl_timebase_synced_show(struct device *device,
>> char *buf)
>> {
>> struct cxl *adapter = to_cxl_adapter(device);
>> + u64 psl_tb;
>> + int delta;
>> +
>> + psl_tb = adapter->native->sl_ops->timebase_read(adapter);
>> + delta = mftb() - psl_tb;
>> + if (delta < 0)
>> + delta = -delta;
> Can just use abs().
okay, I can.
>> +
>> + /* CORE TB and PSL TB difference <= 16usecs ? */
>> + adapter->psl_timebase_synced = (tb_to_ns(delta) < 16000) ? true : false;
> Can be re-written as
> 'adapter->psl_timebase_synced = (tb_to_ns(abs(delta)) < 16000);'
I prefer to keep the original version for easier reading.
>
>>
>> return scnprintf(buf, PAGE_SIZE, "%i\n",
>> adapter->psl_timebase_synced);
> Might be a good idea to debug print/print_once the delta.
sounds good.
>
^ permalink raw reply [flat|nested] 3+ messages in thread
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