From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 406tsv45J9zF23b for ; Fri, 23 Mar 2018 17:29:07 +1100 (AEDT) Message-ID: <1521786531.16434.335.camel@kernel.crashing.org> Subject: Re: [PATCH 3/3] powerpc/mm: Fixup tlbie vs store ordering issue on POWER9 From: Benjamin Herrenschmidt To: "Aneesh Kumar K.V" , paulus@samba.org, mpe@ellerman.id.au, mauricfo@linux.vnet.ibm.com Cc: linuxppc-dev@lists.ozlabs.org Date: Fri, 23 Mar 2018 17:28:51 +1100 In-Reply-To: <20180323045627.16800-3-aneesh.kumar@linux.vnet.ibm.com> References: <20180323045627.16800-1-aneesh.kumar@linux.vnet.ibm.com> <20180323045627.16800-3-aneesh.kumar@linux.vnet.ibm.com> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Fri, 2018-03-23 at 10:26 +0530, Aneesh Kumar K.V wrote: > +#define CPU_FTR_TLBIE_BUG LONG_ASM_CONST(0x2000000000000000) I did ask you to make this CPU_FTR_POWER9_TLBIE_BUG... Cheers, Ben