From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 409kcz27CnzF2D9 for ; Wed, 28 Mar 2018 08:27:47 +1100 (AEDT) Message-ID: <1522186032.7364.57.camel@kernel.crashing.org> Subject: Re: RFC on writel and writel_relaxed From: Benjamin Herrenschmidt To: Jason Gunthorpe , okaya@codeaurora.org Cc: Arnd Bergmann , David Laight , Oliver , "open list:LINUX FOR POWERPC (32-BIT AND 64-BIT)" , linux-rdma@vger.kernel.org, Alexander Duyck , Will Deacon , "Paul E. McKenney" Date: Wed, 28 Mar 2018 08:27:12 +1100 In-Reply-To: <20180327141215.GA12318@ziepe.ca> References: <20180326210951.GD15554@ziepe.ca> <1522101717.7364.14.camel@kernel.crashing.org> <20180326222756.GJ15554@ziepe.ca> <1522141019.7364.43.camel@kernel.crashing.org> <1522149801.7364.49.camel@kernel.crashing.org> <4f27ac42a6953589157f4d7f18051366@codeaurora.org> <20180327141215.GA12318@ziepe.ca> Content-Type: text/plain; charset="UTF-8" Mime-Version: 1.0 List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , On Tue, 2018-03-27 at 08:12 -0600, Jason Gunthorpe wrote: > > I have been converting wmb+writel to wmb+writel_relaxed. (About 30 patches) > > > > I will have to just remove the wmb and keep writel, then repost. > > Okay, but before you do that, can we get a statement how this works > for WC? > > Some of these writels are to WC memory, do they need the wmb()?!? This is an issue as we don't have well defined semantics for WC. At this point, I would suggest staying away from that (ie, not changing them). We need to look into it. I know for example that on powerpc I cannot give you any weaker semantic on WC for writel (I have to put a full sync in there), but I am trying to see if I can make writel_relaxed both work with the existing semantics and provide combining. But it's not yet a given (our weaker IO barrier, eieio, isn't architecturally defined to do anything on G=0 space, looking with the HW guys at what the HW actually does). Cheers, Ben.