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From: Haren Myneni <haren@linux.vnet.ibm.com>
To: mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] powerpc: paste - Mask XERSO bit in CR
Date: Wed, 25 Apr 2018 23:48:39 -0700	[thread overview]
Message-ID: <1524725319.26204.4.camel@hbabu-laptop> (raw)

    
NX can set 3rd bit in CR register for XER[SO] (Summation overflow)
which is not used for paste return value. So. mask this bit to get
proper return status.
    
Signed-off-by: Haren Myneni <haren@us.ibm.com>

diff --git a/arch/powerpc/platforms/powernv/copy-paste.h b/arch/powerpc/platforms/powernv/copy-paste.h
index c9a5036..82392e3 100644
--- a/arch/powerpc/platforms/powernv/copy-paste.h
+++ b/arch/powerpc/platforms/powernv/copy-paste.h
@@ -9,7 +9,8 @@
 #include <asm/ppc-opcode.h>
 
 #define CR0_SHIFT	28
-#define CR0_MASK	0xF
+#define CR0_MASK	0xE /* 3rd bit undefined or set for XER[SO] */
+
 /*
  * Copy/paste instructions:
  *

             reply	other threads:[~2018-04-26  6:48 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-04-26  6:48 Haren Myneni [this message]
2018-04-27  6:27 ` [PATCH] powerpc: paste - Mask XERSO bit in CR Michael Ellerman
2018-04-27  7:46   ` Haren Myneni

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