From: Michael Neuling <mikey@neuling.org>
To: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Akshay Adiga <akshay.adiga@linux.vnet.ibm.com>,
Shilpasri G Bhat <shilpa.bhat@linux.vnet.ibm.com>,
Balbir Singh <bsingharora@gmail.com>,
Oliver O'Halloran <oohall@gmail.com>,
Nicholas Piggin <npiggin@gmail.com>
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] powerpc: Enable ASYM_SMT on interleaved big-core systems
Date: Mon, 14 May 2018 13:22:07 +1000 [thread overview]
Message-ID: <1526268127.30369.21.camel@neuling.org> (raw)
In-Reply-To: <1526037444-22876-3-git-send-email-ego@linux.vnet.ibm.com>
On Fri, 2018-05-11 at 16:47 +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy" <ego@linux.vnet.ibm.com>
>=20
> Each of the SMT4 cores forming a fused-core are more or less
> independent units. Thus when multiple tasks are scheduled to run on
> the fused core, we get the best performance when the tasks are spread
> across the pair of SMT4 cores.
>=20
> Since the threads in the pair of SMT4 cores of an interleaved big-core
> are numbered {0,2,4,6} and {1,3,5,7} respectively, enable ASYM_SMT on
> such interleaved big-cores that will bias the load-balancing of tasks
> on smaller numbered threads, which will automatically result in
> spreading the tasks uniformly across the associated pair of SMT4
> cores.
>=20
> Signed-off-by: Gautham R. Shenoy <ego@linux.vnet.ibm.com>
> ---
> arch/powerpc/kernel/smp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>=20
> diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> index 9ca7148..0153f01 100644
> --- a/arch/powerpc/kernel/smp.c
> +++ b/arch/powerpc/kernel/smp.c
> @@ -1082,7 +1082,7 @@ static int powerpc_smt_flags(void)
> {
> int flags =3D SD_SHARE_CPUCAPACITY | SD_SHARE_PKG_RESOURCES;
> =20
> - if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
> + if (cpu_has_feature(CPU_FTR_ASYM_SMT) || has_interleaved_big_core) {
Shouldn't we just set CPU_FTR_ASYM_SMT and leave this code unchanged?
> printk_once(KERN_INFO "Enabling Asymmetric SMT
> scheduling\n");
> flags |=3D SD_ASYM_PACKING;
> }
next prev parent reply other threads:[~2018-05-14 3:22 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-05-11 11:17 [PATCH 0/2] powerpc: Scheduler optimization for POWER9 bigcores Gautham R. Shenoy
2018-05-11 11:17 ` [PATCH 1/2] powerpc: Detect the presence of big-core with interleaved threads Gautham R. Shenoy
2018-05-14 3:21 ` Michael Neuling
2018-05-16 4:35 ` Gautham R Shenoy
2018-05-18 13:14 ` Michael Ellerman
2018-05-22 4:31 ` Gautham R Shenoy
2018-05-18 13:21 ` Michael Ellerman
2018-05-22 4:34 ` Gautham R Shenoy
2018-05-11 11:17 ` [PATCH 2/2] powerpc: Enable ASYM_SMT on interleaved big-core systems Gautham R. Shenoy
2018-05-14 3:22 ` Michael Neuling [this message]
2018-05-16 5:05 ` Gautham R Shenoy
2018-05-18 13:05 ` Michael Ellerman
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