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From: Haren Myneni <haren@linux.vnet.ibm.com>
To: mpe@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org, sukadev@linux.vnet.ibm.com
Subject: powerpc/powernv: copy/paste - Mask XERS0 bit in CR
Date: Wed, 30 May 2018 21:29:16 -0700	[thread overview]
Message-ID: <1527740956.5945.12.camel@hbabu-laptop> (raw)

    
NX can set 3rd bit in CR register for XER[SO] (Summation overflow)
which is not related to paste request. The current paste function
returns failure for the successful request when this bit is set.
So mask this bit and check the proper return status.

Fixes: 2392c8c8c045 ("powerpc/powernv/vas: Define copy/paste interfaces")
Cc: stable@vger.kernel.org # v4.14+    
Signed-off-by: Haren Myneni <haren@us.ibm.com>

diff --git a/arch/powerpc/platforms/powernv/copy-paste.h b/arch/powerpc/platforms/powernv/copy-paste.h
index c9a5036..82392e3 100644
--- a/arch/powerpc/platforms/powernv/copy-paste.h
+++ b/arch/powerpc/platforms/powernv/copy-paste.h
@@ -9,7 +9,8 @@
 #include <asm/ppc-opcode.h>
 
 #define CR0_SHIFT	28
-#define CR0_MASK	0xF
+#define CR0_MASK	0xE /* 3rd bit undefined or set for XER[SO] */
+
 /*
  * Copy/paste instructions:
  *

             reply	other threads:[~2018-05-31  9:16 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-31  4:29 Haren Myneni [this message]
2018-06-03 10:48 ` powerpc/powernv: copy/paste - Mask XERS0 bit in CR Michael Ellerman
2018-06-04  2:15   ` Haren Myneni
2018-06-04  9:11     ` Michael Ellerman

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