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[193.116.103.101]) by smtp.gmail.com with ESMTPSA id v11sm1240723pfa.49.2019.02.06.21.08.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 06 Feb 2019 21:08:53 -0800 (PST) Date: Thu, 07 Feb 2019 15:08:47 +1000 From: Nicholas Piggin Subject: Re: [PATCH] powerpc/powernv/idle: Restore IAMR after idle To: linuxppc-dev@lists.ozlabs.org, Russell Currey References: <20190206062837.26917-1-ruscur@russell.cc> In-Reply-To: <20190206062837.26917-1-ruscur@russell.cc> MIME-Version: 1.0 User-Agent: astroid/0.14.0 (https://github.com/astroidmail/astroid) Message-Id: <1549515373.con208q1rq.astroid@bobo.none> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Russell Currey's on February 6, 2019 4:28 pm: > Without restoring the IAMR after idle, execution prevention on POWER9 > with Radix MMU is overwritten and the kernel can freely execute userspace= without > faulting. >=20 > This is necessary when returning from any stop state that modifies user > state, as well as hypervisor state. >=20 > To test how this fails without this patch, load the lkdtm driver and > do the following: >=20 > echo EXEC_USERSPACE > /sys/kernel/debug/provoke-crash/DIRECT >=20 > which won't fault, then boot the kernel with powersave=3Doff, where it > will fault. Applying this patch will fix this. >=20 > Fixes: 3b10d0095a1e ("powerpc/mm/radix: Prevent kernel execution of user > space") > Cc: > Signed-off-by: Russell Currey Good catch and debugging. This really should be a quirk, we don't want=20 to have to restore this thing on a thread switch. Can we put it under a CONFIG option if we're not using IAMR? > --- > arch/powerpc/include/asm/cpuidle.h | 1 + > arch/powerpc/kernel/asm-offsets.c | 1 + > arch/powerpc/kernel/idle_book3s.S | 20 ++++++++++++++++++++ > 3 files changed, 22 insertions(+) >=20 > diff --git a/arch/powerpc/include/asm/cpuidle.h b/arch/powerpc/include/as= m/cpuidle.h > index 43e5f31fe64d..ad67dbe59498 100644 > --- a/arch/powerpc/include/asm/cpuidle.h > +++ b/arch/powerpc/include/asm/cpuidle.h > @@ -77,6 +77,7 @@ struct stop_sprs { > u64 mmcr1; > u64 mmcr2; > u64 mmcra; > + u64 iamr; > }; > =20 > #define PNV_IDLE_NAME_LEN 16 > diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-= offsets.c > index 9ffc72ded73a..10e0314c2b0d 100644 > --- a/arch/powerpc/kernel/asm-offsets.c > +++ b/arch/powerpc/kernel/asm-offsets.c > @@ -774,6 +774,7 @@ int main(void) > STOP_SPR(STOP_MMCR1, mmcr1); > STOP_SPR(STOP_MMCR2, mmcr2); > STOP_SPR(STOP_MMCRA, mmcra); > + STOP_SPR(STOP_IAMR, iamr); > #endif > =20 > DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER); > diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle= _book3s.S > index 7f5ac2e8581b..bb4f552f6c7e 100644 > --- a/arch/powerpc/kernel/idle_book3s.S > +++ b/arch/powerpc/kernel/idle_book3s.S > @@ -200,6 +200,12 @@ pnv_powersave_common: > /* Continue saving state */ > SAVE_GPR(2, r1) > SAVE_NVGPRS(r1) > + > +BEGIN_FTR_SECTION > + mfspr r5, SPRN_IAMR > + std r5, STOP_IAMR(r13) > +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) > + > mfcr r5 > std r5,_CCR(r1) > std r1,PACAR1(r13) > @@ -924,6 +930,13 @@ BEGIN_FTR_SECTION > END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) > REST_NVGPRS(r1) > REST_GPR(2, r1) > + > +BEGIN_FTR_SECTION > + ld r4, STOP_IAMR(r13) > + mtspr SPRN_IAMR, r4 > + isync > +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) Sigh, good old isync. Suspect you'll get away without it, mtmsrd L=3D0=20 just below is architecturally guaranteeing a CSI, so just add a comment=20 there, might save a flush. > + > ld r4,PACAKMSR(r13) > ld r5,_LINK(r1) > ld r6,_CCR(r1) > @@ -946,6 +959,13 @@ pnv_wakeup_noloss: > BEGIN_FTR_SECTION > CHECK_HMI_INTERRUPT > END_FTR_SECTION_IFSET(CPU_FTR_HVMODE) > + > +BEGIN_FTR_SECTION > + ld r4, STOP_IAMR(r13) > + mtspr SPRN_IAMR, r4 > + isync > +END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S) For the noloss part, it should mean really nothing lost including GPRs,=20 so I think IAMR *should* be okay here. Thanks, Nick =