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[115.64.237.195]) by smtp.gmail.com with ESMTPSA id v82sm98170065pfa.170.2019.04.12.22.59.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 12 Apr 2019 22:59:50 -0700 (PDT) Date: Sat, 13 Apr 2019 15:59:43 +1000 From: Nicholas Piggin Subject: Re: powerpc/64s/radix: Fix radix segment exception handling To: linuxppc-dev@lists.ozlabs.org, Michael Ellerman , Michael Ellerman References: <44fRrx4BVsz9s70@ozlabs.org> <1555040097.sqg9j51don.astroid@bobo.none> <875zrivaip.fsf@concordia.ellerman.id.au> In-Reply-To: <875zrivaip.fsf@concordia.ellerman.id.au> MIME-Version: 1.0 User-Agent: astroid/0.14.0 (https://github.com/astroidmail/astroid) Message-Id: <1555134809.jkd67z5287.astroid@bobo.none> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Aneesh Kumar K . V" , Anton Blanchard Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Michael Ellerman's on April 13, 2019 1:39 pm: > Nicholas Piggin writes: >> Michael Ellerman's on April 11, 2019 12:49 am: >>> On Fri, 2019-03-29 at 07:42:57 UTC, Nicholas Piggin wrote: >>>> Commit 48e7b76957 ("powerpc/64s/hash: Convert SLB miss handlers to C") >>>> broke the radix-mode segment exception handler. In radix mode, this is >>>> exception is not an SLB miss, rather it signals that the EA is outside >>>> the range translated by any page table. >>>>=20 >>>> The commit lost the radix feature alternate code patch, which can >>>> cause faults to some EAs to kernel BUG at arch/powerpc/mm/slb.c:639! >>>>=20 >>>> The original radix code would send faults to slb_miss_large_addr, >>>> which would end up faulting due to slb_addr_limit being 0. This patch >>>> sends radix directly to do_bad_slb_fault, which is a bit clearer. >>>>=20 >>>> Fixes: 48e7b76957 ("powerpc/64s/hash: Convert SLB miss handlers to C") >>>> Cc: Aneesh Kumar K.V >>>> Reported-by: Anton Blanchard >>>> Signed-off-by: Nicholas Piggin >>>> Reviewed-by: Aneesh Kumar K.V >>>=20 >>> Applied to powerpc fixes, thanks. >>>=20 >>> https://git.kernel.org/powerpc/c/7100e8704b61247649c50551b965e71d >> >> I sent a v2 with a selftests that triggers the crash if you want it. >> Code was unchanged to no big deal there. >=20 > Yeah I checked the kernel part was unchanged so stuck with v1. >=20 > I also sent a self test, which is similar but slightly different to > yours, though yours is better in general. I'll try and merge them into > one test. If you don't mind that would be good. The siglongjmp handler is cleaner though, and should make it simpler to test ifetch accesses. We just need to get the sig info into yours, and an array of interesting addresses. Thanks, Nick =