From: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
To: mpe@ellerman.id.au
Cc: maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] powerpc/perf: Use SIER_USER_MASK while updating SPRN_SIER for EBB events
Date: Fri, 28 Feb 2020 01:48:35 -0500 [thread overview]
Message-ID: <1582872515-1747-1-git-send-email-atrajeev@linux.vnet.ibm.com> (raw)
commit 330a1eb7775b ("powerpc/perf: Core EBB support for 64-bit book3s")
defines user mask for SIER. But this is not used in ebb_switch_out while
saving SPR's. Patch fixes this by updating SPRN_SIER with the user mask.
Fixes: 330a1eb7775b ("powerpc/perf: Core EBB support for 64-bit book3s")
Signed-off-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
---
arch/powerpc/perf/core-book3s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 3086055..48b61cc 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -579,7 +579,7 @@ static void ebb_switch_out(unsigned long mmcr0)
return;
current->thread.siar = mfspr(SPRN_SIAR);
- current->thread.sier = mfspr(SPRN_SIER);
+ current->thread.sier = mfspr(SPRN_SIER) & SIER_USER_MASK;
current->thread.sdar = mfspr(SPRN_SDAR);
current->thread.mmcr0 = mmcr0 & MMCR0_USER_MASK;
current->thread.mmcr2 = mfspr(SPRN_MMCR2) & MMCR2_USER_MASK;
--
1.8.3.1
reply other threads:[~2020-02-28 6:53 UTC|newest]
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