[RFC PATCH 0/4] consolidate PowerPC instruction encoding macros

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* [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros
@ 2020-03-20  8:18 Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 1/4] powerpc ppc-opcode: introduce PPC_ENCODE_* macros for base instruction encoding Balamuruhan S
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: Balamuruhan S @ 2020-03-20  8:18 UTC (permalink / raw)
  To: mpe
  Cc: ravi.bangoria, jniethe5, Balamuruhan S, paulus, sandipan,
	naveen.n.rao, linuxppc-dev

ppc-opcode.h have base instruction encoding wrapped with stringify_in_c()
for raw encoding to have compatibility. But there are redundant macros for
base instruction encodings in bpf, instruction emulation test infrastructure
and powerpc selftests.

Currently PPC_INST_* macros are used for encoding instruction opcode and PPC_*
for raw instuction encoding, this rfc patchset introduces PPC_ENCODE_* macros
for base instruction encoding and reuse it from elsewhere. With this change we
can avoid redundant macro definitions in multiple files and start adding new
instructions in ppc-opcode.h in future.

TODO:
----
We can still improve further by moving all the instruction encoding
from bpf_jit.h to ppc-opcode.h and reuse them from bpf source. It can be
implemented based on the thoughts and feedback on this RFC.

This patchset is based on mpe's merge branch of linuxppc tree with a
fix patch on top of it,
https://patchwork.ozlabs.org/patch/1252760/

Thanks to Naveen and Sandipan on overall suggestions/improvements.

Tested it by compiling vmlinux with and without the changes and the
objdump of them remains to be same,

# diff vmlinux_objdump vmlinux_rfc_objdump 
2c2
< vmlinux:     file format elf64-powerpcle
---
> vmlinux_rfc:     file format elf64-powerpcle


I would request for your review and suggestions to make it better.

Balamuruhan S (4):
  powerpc ppc-opcode: consolidate PowerPC instruction macros
  powerpc selftest: reuse ppc-opcode macros to avoid redundancy
  powerpc ppc-opcode: move ppc instuction encoding from
    test_emulate_step
  powerpc kvm_asm: rename PPC_LD and PPC_STD macros to avoid
    redefinition

 arch/powerpc/include/asm/kvm_asm.h            |   8 +-
 arch/powerpc/include/asm/ppc-opcode.h         | 364 ++++++++++++------
 arch/powerpc/kvm/booke_interrupts.S           |   8 +-
 arch/powerpc/kvm/bookehv_interrupts.S         |  28 +-
 arch/powerpc/lib/test_emulate_step.c          | 155 +++-----
 arch/powerpc/net/bpf_jit.h                    |   8 -
 arch/powerpc/net/bpf_jit32.h                  |  10 +-
 arch/powerpc/net/bpf_jit64.h                  |   4 +-
 arch/powerpc/net/bpf_jit_comp.c               |   2 +-
 arch/powerpc/net/bpf_jit_comp64.c             |  14 +-
 .../selftests/powerpc/stringloops/Makefile    |  15 +-
 .../powerpc/stringloops/asm/asm-const.h       |   1 +
 .../powerpc/stringloops/asm/ppc-opcode.h      |  36 +-
 13 files changed, 361 insertions(+), 292 deletions(-)
 create mode 120000 tools/testing/selftests/powerpc/stringloops/asm/asm-const.h
 mode change 100644 => 120000 tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h


base-commit: 8a445cbcb9f5090cb07ec6cbb89a8a1fc99a0ff7
prerequisite-patch-id: c271d8516dd39526e848dfa95ae38c9205002d2c
-- 
2.24.1


^ permalink raw reply	[flat|nested] 9+ messages in thread

* [RFC PATCH 1/4] powerpc ppc-opcode: introduce PPC_ENCODE_* macros for base instruction encoding
  2020-03-20  8:18 [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros Balamuruhan S
@ 2020-03-20  8:18 ` Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 2/4] powerpc selftest: reuse ppc-opcode macros to avoid redundancy Balamuruhan S
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 9+ messages in thread
From: Balamuruhan S @ 2020-03-20  8:18 UTC (permalink / raw)
  To: mpe
  Cc: ravi.bangoria, jniethe5, Balamuruhan S, paulus, sandipan,
	naveen.n.rao, linuxppc-dev

Introduce PPC_ENCODE* macros to have all the bare encoding of ppc
instructions and use it wrapped with stringify_in_c() for raw
encoding in ppc-opcode.h.

Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
---
 arch/powerpc/include/asm/ppc-opcode.h | 330 +++++++++++++++++---------
 1 file changed, 220 insertions(+), 110 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index c1df75edde44..ea5e0f864b20 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -429,105 +429,105 @@
 #endif
 
 /* Deal with instructions that older assemblers aren't aware of */
-#define	PPC_CP_ABORT		stringify_in_c(.long PPC_INST_CP_ABORT)
-#define	PPC_COPY(a, b)		stringify_in_c(.long PPC_INST_COPY | \
-					___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_DARN(t, l)		stringify_in_c(.long PPC_INST_DARN |  \
-						___PPC_RT(t)	   |  \
-						(((l) & 0x3) << 16))
-#define	PPC_DCBAL(a, b)		stringify_in_c(.long PPC_INST_DCBAL | \
-					__PPC_RA(a) | __PPC_RB(b))
-#define	PPC_DCBZL(a, b)		stringify_in_c(.long PPC_INST_DCBZL | \
-					__PPC_RA(a) | __PPC_RB(b))
-#define PPC_LQARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LQARX | \
-					___PPC_RT(t) | ___PPC_RA(a) | \
+#define	PPC_ENCODE_CP_ABORT		(PPC_INST_CP_ABORT)
+#define	PPC_ENCODE_COPY(a, b)		(PPC_INST_COPY | ___PPC_RA(a) | \
+					___PPC_RB(b))
+#define PPC_ENCODE_DARN(t, l)		(PPC_INST_DARN | ___PPC_RT(t) |	\
+					(((l) & 0x3) << 16))
+#define	PPC_ENCODE_DCBAL(a, b)		(PPC_INST_DCBAL | __PPC_RA(a) | \
+					__PPC_RB(b))
+#define	PPC_ENCODE_DCBZL(a, b)		(PPC_INST_DCBZL | __PPC_RA(a) | \
+					__PPC_RB(b))
+#define PPC_ENCODE_LQARX(t, a, b, eh)	(PPC_INST_LQARX | ___PPC_RT(t) | \
+					___PPC_RA(a) | \
 					___PPC_RB(b) | __PPC_EH(eh))
-#define PPC_LDARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LDARX | \
-					___PPC_RT(t) | ___PPC_RA(a) | \
+#define PPC_ENCODE_LDARX(t, a, b, eh)	(PPC_INST_LDARX | ___PPC_RT(t) | \
+					___PPC_RA(a) | \
 					___PPC_RB(b) | __PPC_EH(eh))
-#define PPC_LWARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LWARX | \
+#define PPC_ENCODE_LWARX(t, a, b, eh)	(PPC_INST_LWARX | \
 					___PPC_RT(t) | ___PPC_RA(a) | \
 					___PPC_RB(b) | __PPC_EH(eh))
-#define PPC_STQCX(t, a, b)	stringify_in_c(.long PPC_INST_STQCX | \
+#define PPC_ENCODE_STQCX(t, a, b)	(PPC_INST_STQCX | \
 					___PPC_RT(t) | ___PPC_RA(a) | \
 					___PPC_RB(b))
-#define PPC_MADDHD(t, a, b, c)	stringify_in_c(.long PPC_INST_MADDHD | \
+#define PPC_ENCODE_MADDHD(t, a, b, c)	(PPC_INST_MADDHD | \
 					___PPC_RT(t) | ___PPC_RA(a)  | \
 					___PPC_RB(b) | ___PPC_RC(c))
-#define PPC_MADDHDU(t, a, b, c)	stringify_in_c(.long PPC_INST_MADDHDU | \
+#define PPC_ENCODE_MADDHDU(t, a, b, c)	(PPC_INST_MADDHDU | \
 					___PPC_RT(t) | ___PPC_RA(a)   | \
 					___PPC_RB(b) | ___PPC_RC(c))
-#define PPC_MADDLD(t, a, b, c)	stringify_in_c(.long PPC_INST_MADDLD | \
+#define PPC_ENCODE_MADDLD(t, a, b, c)	(PPC_INST_MADDLD | \
 					___PPC_RT(t) | ___PPC_RA(a)  | \
 					___PPC_RB(b) | ___PPC_RC(c))
-#define PPC_MSGSND(b)		stringify_in_c(.long PPC_INST_MSGSND | \
-					___PPC_RB(b))
-#define PPC_MSGSYNC		stringify_in_c(.long PPC_INST_MSGSYNC)
-#define PPC_MSGCLR(b)		stringify_in_c(.long PPC_INST_MSGCLR | \
-					___PPC_RB(b))
-#define PPC_MSGSNDP(b)		stringify_in_c(.long PPC_INST_MSGSNDP | \
-					___PPC_RB(b))
-#define PPC_MSGCLRP(b)		stringify_in_c(.long PPC_INST_MSGCLRP | \
+#define PPC_ENCODE_MSGSND(b)		(PPC_INST_MSGSND | ___PPC_RB(b))
+#define PPC_ENCODE_MSGSYNC		(PPC_INST_MSGSYNC)
+#define PPC_ENCODE_MSGCLR(b)		(PPC_INST_MSGCLR | ___PPC_RB(b))
+#define PPC_ENCODE_MSGSNDP(b)		(PPC_INST_MSGSNDP | ___PPC_RB(b))
+#define PPC_ENCODE_MSGCLRP(b)		(PPC_INST_MSGCLRP | ___PPC_RB(b))
+#define PPC_ENCODE_PASTE(a, b)		(PPC_INST_PASTE | ___PPC_RA(a) | \
 					___PPC_RB(b))
-#define PPC_PASTE(a, b)		stringify_in_c(.long PPC_INST_PASTE | \
-					___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_POPCNTB(a, s)	stringify_in_c(.long PPC_INST_POPCNTB | \
-					__PPC_RA(a) | __PPC_RS(s))
-#define PPC_POPCNTD(a, s)	stringify_in_c(.long PPC_INST_POPCNTD | \
-					__PPC_RA(a) | __PPC_RS(s))
-#define PPC_POPCNTW(a, s)	stringify_in_c(.long PPC_INST_POPCNTW | \
-					__PPC_RA(a) | __PPC_RS(s))
-#define PPC_RFCI		stringify_in_c(.long PPC_INST_RFCI)
-#define PPC_RFDI		stringify_in_c(.long PPC_INST_RFDI)
-#define PPC_RFMCI		stringify_in_c(.long PPC_INST_RFMCI)
-#define PPC_TLBILX(t, a, b)	stringify_in_c(.long PPC_INST_TLBILX | \
-					__PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b))
-#define PPC_TLBILX_ALL(a, b)	PPC_TLBILX(0, a, b)
-#define PPC_TLBILX_PID(a, b)	PPC_TLBILX(1, a, b)
-#define PPC_TLBILX_VA(a, b)	PPC_TLBILX(3, a, b)
-#define PPC_WAIT(w)		stringify_in_c(.long PPC_INST_WAIT | \
-					__PPC_WC(w))
-#define PPC_TLBIE(lp,a) 	stringify_in_c(.long PPC_INST_TLBIE | \
-					       ___PPC_RB(a) | ___PPC_RS(lp))
-#define	PPC_TLBIE_5(rb,rs,ric,prs,r) \
-				stringify_in_c(.long PPC_INST_TLBIE | \
+#define PPC_ENCODE_POPCNTB(a, s)	(PPC_INST_POPCNTB | __PPC_RA(a) | \
+					__PPC_RS(s))
+#define PPC_ENCODE_POPCNTD(a, s)	(PPC_INST_POPCNTD | __PPC_RA(a) | \
+					__PPC_RS(s))
+#define PPC_ENCODE_POPCNTW(a, s)	(PPC_INST_POPCNTW | __PPC_RA(a) | \
+					__PPC_RS(s))
+#define PPC_ENCODE_RFCI			(PPC_INST_RFCI)
+#define PPC_ENCODE_RFDI			(PPC_INST_RFDI)
+#define PPC_ENCODE_RFMCI		(PPC_INST_RFMCI)
+#define PPC_ENCODE_TLBILX(t, a, b)	(PPC_INST_TLBILX | \
+					__PPC_T_TLB(t) | __PPC_RA0(a) | \
+					__PPC_RB(b))
+#define PPC_ENCODE_WAIT(w)		(PPC_INST_WAIT | __PPC_WC(w))
+#define PPC_ENCODE_TLBIE(lp, a)		(PPC_INST_TLBIE | ___PPC_RB(a) | \
+					___PPC_RS(lp))
+#define	PPC_ENCODE_TLBIE_5(rb, rs, ric, prs, r) \
+					(PPC_INST_TLBIE | \
 					___PPC_RB(rb) | ___PPC_RS(rs) | \
 					___PPC_RIC(ric) | ___PPC_PRS(prs) | \
 					___PPC_R(r))
-#define	PPC_TLBIEL(rb,rs,ric,prs,r) \
-				stringify_in_c(.long PPC_INST_TLBIEL | \
+#define	PPC_ENCODE_TLBIEL(rb, rs, ric, prs, r) \
+					(PPC_INST_TLBIEL | \
 					___PPC_RB(rb) | ___PPC_RS(rs) | \
 					___PPC_RIC(ric) | ___PPC_PRS(prs) | \
 					___PPC_R(r))
-#define PPC_TLBSRX_DOT(a,b)	stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
+#define PPC_ENCODE_TLBSRX_DOT(a, b)	(PPC_INST_TLBSRX_DOT | \
 					__PPC_RA0(a) | __PPC_RB(b))
-#define PPC_TLBIVAX(a,b)	stringify_in_c(.long PPC_INST_TLBIVAX | \
+#define PPC_ENCODE_TLBIVAX(a, b)	(PPC_INST_TLBIVAX | \
 					__PPC_RA0(a) | __PPC_RB(b))
 
-#define PPC_ERATWE(s, a, w)	stringify_in_c(.long PPC_INST_ERATWE | \
-					__PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
-#define PPC_ERATRE(s, a, w)	stringify_in_c(.long PPC_INST_ERATRE | \
-					__PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
-#define PPC_ERATILX(t, a, b)	stringify_in_c(.long PPC_INST_ERATILX | \
+#define PPC_ENCODE_ERATWE(s, a, w)	(PPC_INST_ERATWE | \
+					__PPC_RS(s) | __PPC_RA(a) | \
+					__PPC_WS(w))
+#define PPC_ENCODE_ERATRE(s, a, w)	(PPC_INST_ERATRE | \
+					__PPC_RS(s) | __PPC_RA(a) | \
+					__PPC_WS(w))
+#define PPC_ENCODE_ERATILX(t, a, b)	(PPC_INST_ERATILX | \
 					__PPC_T_TLB(t) | __PPC_RA0(a) | \
 					__PPC_RB(b))
-#define PPC_ERATIVAX(s, a, b)	stringify_in_c(.long PPC_INST_ERATIVAX | \
-					__PPC_RS(s) | __PPC_RA0(a) | __PPC_RB(b))
-#define PPC_ERATSX(t, a, w)	stringify_in_c(.long PPC_INST_ERATSX | \
-					__PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
-#define PPC_ERATSX_DOT(t, a, w)	stringify_in_c(.long PPC_INST_ERATSX_DOT | \
-					__PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
-#define PPC_SLBFEE_DOT(t, b)	stringify_in_c(.long PPC_INST_SLBFEE | \
+#define PPC_ENCODE_ERATIVAX(s, a, b)	(PPC_INST_ERATIVAX | \
+					__PPC_RS(s) | __PPC_RA0(a) | \
+					__PPC_RB(b))
+#define PPC_ENCODE_ERATSX(t, a, w)	(PPC_INST_ERATSX | \
+					__PPC_RS(t) | __PPC_RA0(a) | \
+					__PPC_RB(b))
+#define PPC_ENCODE_ERATSX_DOT(t, a, w)	(PPC_INST_ERATSX_DOT | \
+					__PPC_RS(t) | __PPC_RA0(a) | \
+					__PPC_RB(b))
+#define PPC_ENCODE_SLBFEE_DOT(t, b)	(PPC_INST_SLBFEE | \
 					__PPC_RT(t) | __PPC_RB(b))
-#define __PPC_SLBFEE_DOT(t, b)	stringify_in_c(.long PPC_INST_SLBFEE |	\
-					       ___PPC_RT(t) | ___PPC_RB(b))
-#define PPC_ICBT(c,a,b)		stringify_in_c(.long PPC_INST_ICBT | \
-				       __PPC_CT(c) | __PPC_RA0(a) | __PPC_RB(b))
+#define __PPC_ENCODE_SLBFEE_DOT(t, b)	(PPC_INST_SLBFEE |	\
+					___PPC_RT(t) | ___PPC_RB(b))
+#define PPC_ENCODE_ICBT(c, a, b)	(PPC_INST_ICBT | \
+				       __PPC_CT(c) | __PPC_RA0(a) | \
+				       __PPC_RB(b))
 /* PASemi instructions */
-#define LBZCIX(t,a,b)		stringify_in_c(.long PPC_INST_LBZCIX | \
-				       __PPC_RT(t) | __PPC_RA(a) | __PPC_RB(b))
-#define STBCIX(s,a,b)		stringify_in_c(.long PPC_INST_STBCIX | \
-				       __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
+#define PPC_ENCODE_LBZCIX(t, a, b)	(PPC_INST_LBZCIX | \
+				       __PPC_RT(t) | __PPC_RA(a) | \
+				       __PPC_RB(b))
+#define PPC_ENCODE_STBCIX(s, a, b)	(PPC_INST_STBCIX | \
+				       __PPC_RS(s) | __PPC_RA(a) | \
+				       __PPC_RB(b))
 
 /*
  * Define what the VSX XX1 form instructions will look like, then add
@@ -535,68 +535,68 @@
  */
 #define VSX_XX1(s, a, b)	(__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
 #define VSX_XX3(t, a, b)	(__PPC_XT(t) | __PPC_XA(a) | __PPC_XB(b))
-#define STXVD2X(s, a, b)	stringify_in_c(.long PPC_INST_STXVD2X | \
+#define PPC_ENCODE_STXVD2X(s, a, b)	(PPC_INST_STXVD2X | \
 					       VSX_XX1((s), a, b))
-#define LXVD2X(s, a, b)		stringify_in_c(.long PPC_INST_LXVD2X | \
+#define PPC_ENCODE_LXVD2X(s, a, b)	(PPC_INST_LXVD2X | \
 					       VSX_XX1((s), a, b))
-#define MFVRD(a, t)		stringify_in_c(.long PPC_INST_MFVSRD | \
+#define PPC_ENCODE_MFVRD(a, t)		(PPC_INST_MFVSRD | \
 					       VSX_XX1((t)+32, a, R0))
-#define MTVRD(t, a)		stringify_in_c(.long PPC_INST_MTVSRD | \
+#define PPC_ENCODE_MTVRD(t, a)		(PPC_INST_MTVSRD | \
 					       VSX_XX1((t)+32, a, R0))
-#define VPMSUMW(t, a, b)	stringify_in_c(.long PPC_INST_VPMSUMW | \
+#define PPC_ENCODE_VPMSUMW(t, a, b)	(PPC_INST_VPMSUMW | \
 					       VSX_XX3((t), a, b))
-#define VPMSUMD(t, a, b)	stringify_in_c(.long PPC_INST_VPMSUMD | \
+#define PPC_ENCODE_VPMSUMD(t, a, b)	(PPC_INST_VPMSUMD | \
 					       VSX_XX3((t), a, b))
-#define XXLOR(t, a, b)		stringify_in_c(.long PPC_INST_XXLOR | \
+#define PPC_ENCODE_XXLOR(t, a, b)	(PPC_INST_XXLOR | \
 					       VSX_XX3((t), a, b))
-#define XXSWAPD(t, a)		stringify_in_c(.long PPC_INST_XXSWAPD | \
+#define PPC_ENCODE_XXSWAPD(t, a)	(PPC_INST_XXSWAPD | \
 					       VSX_XX3((t), a, a))
-#define XVCPSGNDP(t, a, b)	stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
+#define PPC_ENCODE_XVCPSGNDP(t, a, b)	((PPC_INST_XVCPSGNDP | \
 					       VSX_XX3((t), (a), (b))))
 
-#define VPERMXOR(vrt, vra, vrb, vrc)				\
-	stringify_in_c(.long (PPC_INST_VPERMXOR |		\
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
-			      ___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
+#define PPC_ENCODE_VPERMXOR(vrt, vra, vrb, vrc)				\
+					((PPC_INST_VPERMXOR |		\
+					___PPC_RT(vrt) | ___PPC_RA(vra) | \
+					___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
 
-#define PPC_NAP			stringify_in_c(.long PPC_INST_NAP)
-#define PPC_SLEEP		stringify_in_c(.long PPC_INST_SLEEP)
-#define PPC_WINKLE		stringify_in_c(.long PPC_INST_WINKLE)
+#define PPC_ENCODE_NAP			(PPC_INST_NAP)
+#define PPC_ENCODE_SLEEP		(PPC_INST_SLEEP)
+#define PPC_ENCODE_WINKLE		(PPC_INST_WINKLE)
 
-#define PPC_STOP		stringify_in_c(.long PPC_INST_STOP)
+#define PPC_ENCODE_STOP			(PPC_INST_STOP)
 
 /* BHRB instructions */
-#define PPC_CLRBHRB		stringify_in_c(.long PPC_INST_CLRBHRB)
-#define PPC_MFBHRBE(r, n)	stringify_in_c(.long PPC_INST_BHRBE | \
+#define PPC_ENCODE_CLRBHRB		(PPC_INST_CLRBHRB)
+#define PPC_ENCODE_MFBHRBE(r, n)	(PPC_INST_BHRBE | \
 						__PPC_RT(r) | \
 							(((n) & 0x3ff) << 11))
 
 /* Transactional memory instructions */
-#define TRECHKPT		stringify_in_c(.long PPC_INST_TRECHKPT)
-#define TRECLAIM(r)		stringify_in_c(.long PPC_INST_TRECLAIM \
+#define PPC_ENCODE_TRECHKPT		(PPC_INST_TRECHKPT)
+#define PPC_ENCODE_TRECLAIM(r)		(PPC_INST_TRECLAIM \
 					       | __PPC_RA(r))
-#define TABORT(r)		stringify_in_c(.long PPC_INST_TABORT \
+#define PPC_ENCODE_TABORT(r)		(PPC_INST_TABORT \
 					       | __PPC_RA(r))
 
 /* book3e thread control instructions */
 #define TMRN(x)			((((x) & 0x1f) << 16) | (((x) & 0x3e0) << 6))
-#define MTTMR(tmr, r)		stringify_in_c(.long PPC_INST_MTTMR | \
+#define PPC_ENCODE_MTTMR(tmr, r)	(PPC_INST_MTTMR | \
 					       TMRN(tmr) | ___PPC_RS(r))
-#define MFTMR(tmr, r)		stringify_in_c(.long PPC_INST_MFTMR | \
+#define PPC_ENCODE_MFTMR(tmr, r)	(PPC_INST_MFTMR | \
 					       TMRN(tmr) | ___PPC_RT(r))
 
 /* Coprocessor instructions */
-#define PPC_ICSWX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWX |	\
+#define PPC_ENCODE_ICSWX(s, a, b)	(PPC_INST_ICSWX |	\
 					       ___PPC_RS(s) |		\
 					       ___PPC_RA(a) |		\
 					       ___PPC_RB(b))
-#define PPC_ICSWEPX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWEPX | \
+#define PPC_ENCODE_ICSWEPX(s, a, b)	(PPC_INST_ICSWEPX | \
 					       ___PPC_RS(s) |		\
 					       ___PPC_RA(a) |		\
 					       ___PPC_RB(b))
 
-#define PPC_SLBIA(IH)	stringify_in_c(.long PPC_INST_SLBIA | \
-				       ((IH & 0x7) << 21))
+#define PPC_ENCODE_SLBIA(IH)	(PPC_INST_SLBIA | \
+				       (((IH) & 0x7) << 21))
 
 /*
  * These may only be used on ISA v3.0 or later (aka. CPU_FTR_ARCH_300, radix
@@ -604,16 +604,126 @@
  * mode (on HPT these would also invalidate various SLBEs which may not be
  * desired).
  */
-#define PPC_ISA_3_0_INVALIDATE_ERAT	PPC_SLBIA(7)
-#define PPC_RADIX_INVALIDATE_ERAT_USER	PPC_SLBIA(3)
-#define PPC_RADIX_INVALIDATE_ERAT_GUEST	PPC_SLBIA(6)
+#define PPC_ENCODE_VCMPEQUD_RC(vrt, vra, vrb)	(PPC_INST_VCMPEQUD | \
+						___PPC_RT(vrt) | \
+						___PPC_RA(vra) | \
+						___PPC_RB(vrb) | __PPC_RC21)
+
+#define PPC_ENCODE_VCMPEQUB_RC(vrt, vra, vrb)	(PPC_INST_VCMPEQUB | \
+						___PPC_RT(vrt) | \
+						___PPC_RA(vra) | \
+						___PPC_RB(vrb) | __PPC_RC21)
+
+#define PPC_CP_ABORT        stringify_in_c(.long PPC_ENCODE_CP_ABORT)
+#define PPC_COPY(a, b)      stringify_in_c(.long PPC_ENCODE_COPY(a, b))
+#define PPC_DARN(t, l)      stringify_in_c(.long PPC_ENCODE_DARN(t, l))
+#define PPC_DCBAL(a, b)     stringify_in_c(.long PPC_ENCODE_DCBAL(a, b))
+#define PPC_DCBZL(a, b)     stringify_in_c(.long PPC_ENCODE_DCBZL(a, b))
+#define PPC_LQARX(t, a, b, eh) \
+			stringify_in_c(.long PPC_ENCODE_LQARX(t, a, b, eh))
+#define PPC_LDARX(t, a, b, eh) \
+			stringify_in_c(.long PPC_ENCODE_LDARX(t, a, b, eh))
+#define PPC_LWARX(t, a, b, eh) \
+			stringify_in_c(.long PPC_ENCODE_LWARX(t, a, b, eh))
+#define PPC_STQCX(t, a, b)  stringify_in_c(.long PPC_ENCODE_STQCX(t, a, b))
+#define PPC_MADDHD(t, a, b, c) \
+			stringify_in_c(.long PPC_ENCODE_MADDHD(t, a, b, c))
+#define PPC_MADDHDU(t, a, b, c) \
+			stringify_in_c(.long PPC_ENCODE_MADDHDU(t, a, b, c))
+#define PPC_MADDLD(t, a, b, c) \
+			stringify_in_c(.long PPC_ENCODE_MADDLD(t, a, b, c))
+#define PPC_MSGSND(b)       stringify_in_c(.long PPC_ENCODE_MSGSND(b))
+#define PPC_MSGSYNC         stringify_in_c(.long PPC_ENCODE_MSGSYNC)
+#define PPC_MSGCLR(b)       stringify_in_c(.long PPC_ENCODE_MSGCLR(b))
+#define PPC_MSGSNDP(b)      stringify_in_c(.long PPC_ENCODE_MSGSNDP(b))
+#define PPC_MSGCLRP(b)      stringify_in_c(.long PPC_ENCODE_MSGCLRP(b))
+#define PPC_PASTE(a, b)     stringify_in_c(.long PPC_ENCODE_PASTE(a, b))
+#define PPC_POPCNTB(a, s)   stringify_in_c(.long PPC_ENCODE_POPCNTB(a, s))
+#define PPC_POPCNTD(a, s)   stringify_in_c(.long PPC_ENCODE_POPCNTD(a, s))
+#define PPC_POPCNTW(a, s)   stringify_in_c(.long PPC_ENCODE_POPCNTW(a, s))
+#define PPC_RFCI            stringify_in_c(.long PPC_ENCODE_RFCI)
+#define PPC_RFDI            stringify_in_c(.long PPC_ENCODE_RFDI)
+#define PPC_RFMCI           stringify_in_c(.long PPC_ENCODE_RFMCI)
+#define PPC_TLBILX(t, a, b) stringify_in_c(.long PPC_ENCODE_TLBILX(t, a, b))
+#define PPC_TLBILX_ALL(a, b)	PPC_TLBILX(0, a, b)
+#define PPC_TLBILX_PID(a, b)	PPC_TLBILX(1, a, b)
+#define PPC_TLBILX_VA(a, b)	PPC_TLBILX(3, a, b)
+#define PPC_WAIT(w)         stringify_in_c(.long PPC_ENCODE_WAIT(w))
+#define PPC_TLBIE(lp, a)    stringify_in_c(.long PPC_ENCODE_TLBIE(lp, a))
+#define PPC_TLBIE_5(rb, rs, ric, prs, r) \
+			stringify_in_c(.long PPC_ENCODE_TLBIE_5(rb, \
+					rs, ric, prs, r))
+#define PPC_TLBIEL(rb, rs, ric, prs, r) \
+			stringify_in_c(.long PPC_ENCODE_TLBIEL(rb, rs, \
+					ric, prs, r))
+#define PPC_TLBSRX_DOT(a, b)stringify_in_c(.long PPC_ENCODE_TLBSRX_DOT(a, b))
+#define PPC_TLBIVAX(a, b)   stringify_in_c(.long PPC_ENCODE_TLBIVAX(a, b))
+
+#define PPC_ERATWE(s, a, w) stringify_in_c(.long PPC_ENCODE_ERATWE(s, a, w))
+#define PPC_ERATRE(s, a, w) stringify_in_c(.long PPC_ENCODE_ERATRE(s, a, w))
+#define PPC_ERATILX(t, a, b)stringify_in_c(.long PPC_ENCODE_ERATILX(t, a, b))
+#define PPC_ERATIVAX(s, a, b) \
+			stringify_in_c(.long PPC_ENCODE_ERATIVAX(s, a, b))
+#define PPC_ERATSX(t, a, w) stringify_in_c(.long PPC_ENCODE_ERATSX(t, a, w))
+#define PPC_ERATSX_DOT(t, a, w) \
+			stringify_in_c(.long PPC_ENCODE_ERATSX_DOT(t, a, w))
+#define PPC_SLBFEE_DOT(t, b)stringify_in_c(.long PPC_ENCODE_SLBFEE_DOT(t, b))
+#define __PPC_SLBFEE_DOT(t, b) \
+			stringify_in_c(.long __PPC_ENCODE_SLBFEE_DOT(t, b))
+#define PPC_ICBT(c, a, b)   stringify_in_c(.long PPC_ENCODE_ICBT(c, a, b))
+#define LBZCIX(t, a, b) stringify_in_c(.long PPC_ENCODE_LBZCIX(t, a, b))
+#define STBCIX(s, a, b) stringify_in_c(.long PPC_ENCODE_STBCIX(s, a, b))
+
+#define STXVD2X(s, a, b)stringify_in_c(.long PPC_ENCODE_STXVD2X(s, a, b))
+#define LXVD2X(s, a, b) stringify_in_c(.long PPC_ENCODE_LXVD2X(s, a, b))
+#define MFVRD(a, t)     stringify_in_c(.long PPC_ENCODE_MFVRD(a, t))
+#define MTVRD(t, a)     stringify_in_c(.long PPC_ENCODE_MTVRD(t, a))
+#define VPMSUMW(t, a, b)stringify_in_c(.long PPC_ENCODE_VPMSUMW(t, a, b))
+#define VPMSUMD(t, a, b)stringify_in_c(.long PPC_ENCODE_VPMSUMD(t, a, b))
+#define XXLOR(t, a, b)  stringify_in_c(.long PPC_ENCODE_XXLOR(t, a, b))
+#define XXSWAPD(t, a)   stringify_in_c(.long PPC_ENCODE_XXSWAPD(t, a))
+#define XVCPSGNDP(t, a, b) \
+			stringify_in_c(.long PPC_ENCODE_XVCPSGNDP(t, a, b))
+
+#define VPERMXOR(vrt, vra, vrb, vrc) \
+			stringify_in_c(.long PPC_ENCODE_VPERMXOR(vrt, vra, \
+					vrb, vrc))
+
+#define PPC_NAP             stringify_in_c(.long PPC_ENCODE_NAP)
+#define PPC_SLEEP           stringify_in_c(.long PPC_ENCODE_SLEEP)
+#define PPC_WINKLE          stringify_in_c(.long PPC_ENCODE_WINKLE)
+
+#define PPC_STOP            stringify_in_c(.long PPC_ENCODE_STOP)
+
+/* BHRB instructions */
+#define PPC_CLRBHRB         stringify_in_c(.long PPC_ENCODE_CLRBHRB)
+#define PPC_MFBHRBE(r, n)   stringify_in_c(.long PPC_ENCODE_MFBHRBE(r, n))
+
+/* Transactional memory instructions */
+#define TRECHKPT        stringify_in_c(.long PPC_ENCODE_TRECHKPT)
+#define TRECLAIM(r)     stringify_in_c(.long PPC_ENCODE_TRECLAIM(r))
+#define TABORT(r)       stringify_in_c(.long PPC_ENCODE_TABORT(r))
+
+/* book3e thread control instructions */
+#define MTTMR(tmr, r)   stringify_in_c(.long PPC_ENCODE_MTTMR(tmr, r))
+#define MFTMR(tmr, r)   stringify_in_c(.long PPC_ENCODE_MFTMR(tmr, r))
+
+/* Coprocessor instructions */
+#define PPC_ICSWX(s, a, b)  stringify_in_c(.long PPC_ENCODE_ICSWX(s, a, b))
+#define PPC_ICSWEPX(s, a, b)stringify_in_c(.long PPC_ENCODE_ICSWEPX(s, a, b))
+
+#define PPC_SLBIA(IH)       stringify_in_c(.long PPC_ENCODE_SLBIA(IH))
+
+#define PPC_ISA_3_0_INVALIDATE_ERAT     PPC_SLBIA(7)
+#define PPC_RADIX_INVALIDATE_ERAT_USER  PPC_SLBIA(3)
+#define PPC_RADIX_INVALIDATE_ERAT_GUEST PPC_SLBIA(6)
 
-#define VCMPEQUD_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUD | \
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
-			      ___PPC_RB(vrb) | __PPC_RC21)
+#define VCMPEQUD_RC(vrt, vra, vrb) \
+			stringify_in_c(.long PPC_ENCODE_VCMPEQUD_RC(vrt, \
+					vra, vrb))
 
-#define VCMPEQUB_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUB | \
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
-			      ___PPC_RB(vrb) | __PPC_RC21)
+#define VCMPEQUB_RC(vrt, vra, vrb) \
+			stringify_in_c(.long PPC_ENCODE_VCMPEQUB_RC(vrt, \
+					vra, vrb))
 
 #endif /* _ASM_POWERPC_PPC_OPCODE_H */
-- 
2.24.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [RFC PATCH 2/4] powerpc selftest: reuse ppc-opcode macros to avoid redundancy
  2020-03-20  8:18 [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 1/4] powerpc ppc-opcode: introduce PPC_ENCODE_* macros for base instruction encoding Balamuruhan S
@ 2020-03-20  8:18 ` Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 4/4] powerpc kvm_asm: rename PPC_LD and PPC_STD macros to avoid redefinition Balamuruhan S
  3 siblings, 0 replies; 9+ messages in thread
From: Balamuruhan S @ 2020-03-20  8:18 UTC (permalink / raw)
  To: mpe
  Cc: ravi.bangoria, jniethe5, Balamuruhan S, paulus, sandipan,
	naveen.n.rao, linuxppc-dev

Avoid redefining macros to encode ppc instructions instead reuse it from
ppc-opcode.h, Makefile changes are necessary to compile memcmp_64.S with
__ASSEMBLY__ defined from selftests.

Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
---
 .../selftests/powerpc/stringloops/Makefile    | 15 ++++++--
 .../powerpc/stringloops/asm/asm-const.h       |  1 +
 .../powerpc/stringloops/asm/ppc-opcode.h      | 36 +------------------
 3 files changed, 14 insertions(+), 38 deletions(-)
 create mode 120000 tools/testing/selftests/powerpc/stringloops/asm/asm-const.h
 mode change 100644 => 120000 tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h

diff --git a/tools/testing/selftests/powerpc/stringloops/Makefile b/tools/testing/selftests/powerpc/stringloops/Makefile
index 7fc0623d85c3..43eb14bfbe3a 100644
--- a/tools/testing/selftests/powerpc/stringloops/Makefile
+++ b/tools/testing/selftests/powerpc/stringloops/Makefile
@@ -6,10 +6,19 @@ EXTRA_SOURCES := ../harness.c
 
 build_32bit = $(shell if ($(CC) $(CFLAGS) -m32 -o /dev/null memcmp.c >/dev/null 2>&1) then echo "1"; fi)
 
-TEST_GEN_PROGS := memcmp_64 strlen
+TEST_GEN_PROGS := memcmp_64 memcmp harness memcmp64 strlen
 
-$(OUTPUT)/memcmp_64: memcmp.c
-$(OUTPUT)/memcmp_64: CFLAGS += -m64 -maltivec
+$(OUTPUT)/memcmp64: memcmp_64.o memcmp.o ../harness.o
+	$(CC) $(CFLAGS) -m64 -maltivec memcmp.o memcmp_64.o ../harness.o -o memcmp_64
+
+$(OUTPUT)/memcmp_64: memcmp_64.S
+	$(CC) $(CFLAGS) -m64 -maltivec -D__ASSEMBLY__ -o memcmp_64.o -c memcmp_64.S
+
+$(OUTPUT)/memcmp: memcmp.c
+	$(CC) $(CFLAGS) -m64 -maltivec -o memcmp.o -c memcmp.c
+
+$(OUTPUT)/harness: $(EXTRA_SOURCES)
+	$(CC) $(CFLAGS) -m64 -maltivec -o ../harness.o -c $(EXTRA_SOURCES)
 
 ifeq ($(build_32bit),1)
 $(OUTPUT)/memcmp_32: memcmp.c
diff --git a/tools/testing/selftests/powerpc/stringloops/asm/asm-const.h b/tools/testing/selftests/powerpc/stringloops/asm/asm-const.h
new file mode 120000
index 000000000000..18d8be13e67f
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/asm/asm-const.h
@@ -0,0 +1 @@
+../../../../../../arch/powerpc/include/asm/asm-const.h
\ No newline at end of file
diff --git a/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h b/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h
deleted file mode 100644
index 3edd1a1d9128..000000000000
--- a/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h
+++ /dev/null
@@ -1,35 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-or-later */
-/*
- * Copyright 2009 Freescale Semiconductor, Inc.
- *
- * provides masks and opcode images for use by code generation, emulation
- * and for instructions that older assemblers might not know about
- */
-#ifndef _ASM_POWERPC_PPC_OPCODE_H
-#define _ASM_POWERPC_PPC_OPCODE_H
-
-
-#  define stringify_in_c(...)	__VA_ARGS__
-#  define ASM_CONST(x)		x
-
-
-#define PPC_INST_VCMPEQUD_RC		0x100000c7
-#define PPC_INST_VCMPEQUB_RC		0x10000006
-
-#define __PPC_RC21     (0x1 << 10)
-
-/* macros to insert fields into opcodes */
-#define ___PPC_RA(a)	(((a) & 0x1f) << 16)
-#define ___PPC_RB(b)	(((b) & 0x1f) << 11)
-#define ___PPC_RS(s)	(((s) & 0x1f) << 21)
-#define ___PPC_RT(t)	___PPC_RS(t)
-
-#define VCMPEQUD_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUD_RC | \
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
-			      ___PPC_RB(vrb) | __PPC_RC21)
-
-#define VCMPEQUB_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUB_RC | \
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
-			      ___PPC_RB(vrb) | __PPC_RC21)
-
-#endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h b/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h
new file mode 120000
index 000000000000..f9b1f27ac335
--- /dev/null
+++ b/tools/testing/selftests/powerpc/stringloops/asm/ppc-opcode.h
@@ -0,0 +1 @@
+../../../../../../arch/powerpc/include/asm/ppc-opcode.h
\ No newline at end of file
-- 
2.24.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step
  2020-03-20  8:18 [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 1/4] powerpc ppc-opcode: introduce PPC_ENCODE_* macros for base instruction encoding Balamuruhan S
  2020-03-20  8:18 ` [RFC PATCH 2/4] powerpc selftest: reuse ppc-opcode macros to avoid redundancy Balamuruhan S
@ 2020-03-20  8:18 ` Balamuruhan S
  2020-04-01 16:51   ` Naveen N. Rao
  2020-03-20  8:18 ` [RFC PATCH 4/4] powerpc kvm_asm: rename PPC_LD and PPC_STD macros to avoid redefinition Balamuruhan S
  3 siblings, 1 reply; 9+ messages in thread
From: Balamuruhan S @ 2020-03-20  8:18 UTC (permalink / raw)
  To: mpe
  Cc: ravi.bangoria, jniethe5, Balamuruhan S, paulus, sandipan,
	naveen.n.rao, linuxppc-dev

Few ppc instructions are encoded in test_emulate_step.c, consolidate them to
ppc-opcode.h, fix redefintion errors in bpf_jit caused due to this consolidation.
Reuse the macros from ppc-opcode.h

Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
---
 arch/powerpc/include/asm/ppc-opcode.h |  34 ++++++
 arch/powerpc/lib/test_emulate_step.c  | 155 ++++++++++----------------
 arch/powerpc/net/bpf_jit.h            |   8 --
 arch/powerpc/net/bpf_jit32.h          |  10 +-
 arch/powerpc/net/bpf_jit64.h          |   4 +-
 arch/powerpc/net/bpf_jit_comp.c       |   2 +-
 arch/powerpc/net/bpf_jit_comp64.c     |  14 +--
 7 files changed, 105 insertions(+), 122 deletions(-)

diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index ea5e0f864b20..2ed8a285f1ec 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -76,6 +76,9 @@
 #define	__REGA0_R30	30
 #define	__REGA0_R31	31
 
+#define IMM_L(i)               ((uintptr_t)(i) & 0xffff)
+#define IMM_DS(i)              ((uintptr_t)(i) & 0xfffc)
+
 /* opcode and xopcode for instructions */
 #define OP_TRAP 3
 #define OP_TRAP_64 2
@@ -614,6 +617,37 @@
 						___PPC_RA(vra) | \
 						___PPC_RB(vrb) | __PPC_RC21)
 
+#define PPC_ENCODE_LD(r, base, i)     (PPC_INST_LD | ___PPC_RT(r) |           \
+				___PPC_RA(base) | IMM_DS(i))
+#define PPC_ENCODE_LWZ(r, base, i)    (PPC_INST_LWZ | ___PPC_RT(r) |          \
+				___PPC_RA(base) | IMM_L(i))
+#define PPC_ENCODE_LWZX(t, a, b)      (PPC_INST_LWZX | ___PPC_RT(t) |         \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_STD(r, base, i)    (PPC_INST_STD | ___PPC_RS(r) |          \
+				___PPC_RA(base) | IMM_DS(i))
+#define PPC_ENCODE_STDCX(s, a, b)     (PPC_INST_STDCX | ___PPC_RS(s) |        \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_LFSX(t, a, b)      (PPC_INST_LFSX | ___PPC_RT(t) |         \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_STFSX(s, a, b)     (PPC_INST_STFSX | ___PPC_RS(s) |        \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_LFDX(t, a, b)      (PPC_INST_LFDX | ___PPC_RT(t) |         \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_STFDX(s, a, b)     (PPC_INST_STFDX | ___PPC_RS(s) |        \
+				 ___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_LVX(t, a, b)       (PPC_INST_LVX | ___PPC_RT(t) |          \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_STVX(s, a, b)      (PPC_INST_STVX | ___PPC_RS(s) |         \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_ADD(t, a, b)       (PPC_INST_ADD | ___PPC_RT(t) |          \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_ADD_DOT(t, a, b)   (PPC_INST_ADD | ___PPC_RT(t) |          \
+				___PPC_RA(a) | ___PPC_RB(b) | 0x1)
+#define PPC_ENCODE_ADDC(t, a, b)      (PPC_INST_ADDC | ___PPC_RT(t) |         \
+				___PPC_RA(a) | ___PPC_RB(b))
+#define PPC_ENCODE_ADDC_DOT(t, a, b)  (PPC_INST_ADDC | ___PPC_RT(t) |         \
+				___PPC_RA(a) | ___PPC_RB(b) | 0x1)
+
 #define PPC_CP_ABORT        stringify_in_c(.long PPC_ENCODE_CP_ABORT)
 #define PPC_COPY(a, b)      stringify_in_c(.long PPC_ENCODE_COPY(a, b))
 #define PPC_DARN(t, l)      stringify_in_c(.long PPC_ENCODE_DARN(t, l))
diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c
index 53df4146dd32..45b485edfee1 100644
--- a/arch/powerpc/lib/test_emulate_step.c
+++ b/arch/powerpc/lib/test_emulate_step.c
@@ -12,49 +12,6 @@
 #include <asm/ppc-opcode.h>
 #include <asm/code-patching.h>
 
-#define IMM_L(i)		((uintptr_t)(i) & 0xffff)
-#define IMM_DS(i)		((uintptr_t)(i) & 0xfffc)
-
-/*
- * Defined with TEST_ prefix so it does not conflict with other
- * definitions.
- */
-#define TEST_LD(r, base, i)	(PPC_INST_LD | ___PPC_RT(r) |		\
-					___PPC_RA(base) | IMM_DS(i))
-#define TEST_LWZ(r, base, i)	(PPC_INST_LWZ | ___PPC_RT(r) |		\
-					___PPC_RA(base) | IMM_L(i))
-#define TEST_LWZX(t, a, b)	(PPC_INST_LWZX | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_STD(r, base, i)	(PPC_INST_STD | ___PPC_RS(r) |		\
-					___PPC_RA(base) | IMM_DS(i))
-#define TEST_LDARX(t, a, b, eh)	(PPC_INST_LDARX | ___PPC_RT(t) |	\
-					___PPC_RA(a) | ___PPC_RB(b) |	\
-					__PPC_EH(eh))
-#define TEST_STDCX(s, a, b)	(PPC_INST_STDCX | ___PPC_RS(s) |	\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_LFSX(t, a, b)	(PPC_INST_LFSX | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_STFSX(s, a, b)	(PPC_INST_STFSX | ___PPC_RS(s) |	\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_LFDX(t, a, b)	(PPC_INST_LFDX | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_STFDX(s, a, b)	(PPC_INST_STFDX | ___PPC_RS(s) |	\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_LVX(t, a, b)	(PPC_INST_LVX | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_STVX(s, a, b)	(PPC_INST_STVX | ___PPC_RS(s) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_LXVD2X(s, a, b)	(PPC_INST_LXVD2X | VSX_XX1((s), R##a, R##b))
-#define TEST_STXVD2X(s, a, b)	(PPC_INST_STXVD2X | VSX_XX1((s), R##a, R##b))
-#define TEST_ADD(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_ADD_DOT(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b) | 0x1)
-#define TEST_ADDC(t, a, b)	(PPC_INST_ADDC | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b))
-#define TEST_ADDC_DOT(t, a, b)	(PPC_INST_ADDC | ___PPC_RT(t) |		\
-					___PPC_RA(a) | ___PPC_RB(b) | 0x1)
-
 #define MAX_SUBTESTS	16
 
 #define IGNORE_GPR(n)	(0x1UL << (n))
@@ -104,7 +61,7 @@ static void __init test_ld(void)
 	regs.gpr[3] = (unsigned long) &a;
 
 	/* ld r5, 0(r3) */
-	stepped = emulate_step(&regs, TEST_LD(5, 3, 0));
+	stepped = emulate_step(&regs, PPC_ENCODE_LD(5, 3, 0));
 
 	if (stepped == 1 && regs.gpr[5] == a)
 		show_result("ld", "PASS");
@@ -122,7 +79,7 @@ static void __init test_lwz(void)
 	regs.gpr[3] = (unsigned long) &a;
 
 	/* lwz r5, 0(r3) */
-	stepped = emulate_step(&regs, TEST_LWZ(5, 3, 0));
+	stepped = emulate_step(&regs, PPC_ENCODE_LWZ(5, 3, 0));
 
 	if (stepped == 1 && regs.gpr[5] == a)
 		show_result("lwz", "PASS");
@@ -142,7 +99,7 @@ static void __init test_lwzx(void)
 	regs.gpr[5] = 0x8765;
 
 	/* lwzx r5, r3, r4 */
-	stepped = emulate_step(&regs, TEST_LWZX(5, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_LWZX(5, 3, 4));
 	if (stepped == 1 && regs.gpr[5] == a[2])
 		show_result("lwzx", "PASS");
 	else
@@ -160,7 +117,7 @@ static void __init test_std(void)
 	regs.gpr[5] = 0x5678;
 
 	/* std r5, 0(r3) */
-	stepped = emulate_step(&regs, TEST_STD(5, 3, 0));
+	stepped = emulate_step(&regs, PPC_ENCODE_STD(5, 3, 0));
 	if (stepped == 1 && regs.gpr[5] == a)
 		show_result("std", "PASS");
 	else
@@ -185,7 +142,7 @@ static void __init test_ldarx_stdcx(void)
 	regs.gpr[5] = 0x5678;
 
 	/* ldarx r5, r3, r4, 0 */
-	stepped = emulate_step(&regs, TEST_LDARX(5, 3, 4, 0));
+	stepped = emulate_step(&regs, PPC_ENCODE_LDARX(5, 3, 4, 0));
 
 	/*
 	 * Don't touch 'a' here. Touching 'a' can do Load/store
@@ -203,7 +160,7 @@ static void __init test_ldarx_stdcx(void)
 	regs.gpr[5] = 0x9ABC;
 
 	/* stdcx. r5, r3, r4 */
-	stepped = emulate_step(&regs, TEST_STDCX(5, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_STDCX(5, 3, 4));
 
 	/*
 	 * Two possible scenarios that indicates successful emulation
@@ -243,7 +200,7 @@ static void __init test_lfsx_stfsx(void)
 	regs.gpr[4] = 0;
 
 	/* lfsx frt10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_LFSX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_LFSX(10, 3, 4));
 
 	if (stepped == 1)
 		show_result("lfsx", "PASS");
@@ -256,7 +213,7 @@ static void __init test_lfsx_stfsx(void)
 	c.a = 678.91;
 
 	/* stfsx frs10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_STFSX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_STFSX(10, 3, 4));
 
 	if (stepped == 1 && c.b == cached_b)
 		show_result("stfsx", "PASS");
@@ -286,7 +243,7 @@ static void __init test_lfdx_stfdx(void)
 	regs.gpr[4] = 0;
 
 	/* lfdx frt10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_LFDX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_LFDX(10, 3, 4));
 
 	if (stepped == 1)
 		show_result("lfdx", "PASS");
@@ -299,7 +256,7 @@ static void __init test_lfdx_stfdx(void)
 	c.a = 987654.32;
 
 	/* stfdx frs10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_STFDX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_STFDX(10, 3, 4));
 
 	if (stepped == 1 && c.b == cached_b)
 		show_result("stfdx", "PASS");
@@ -345,7 +302,7 @@ static void __init test_lvx_stvx(void)
 	regs.gpr[4] = 0;
 
 	/* lvx vrt10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_LVX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_LVX(10, 3, 4));
 
 	if (stepped == 1)
 		show_result("lvx", "PASS");
@@ -361,7 +318,7 @@ static void __init test_lvx_stvx(void)
 	c.b[3] = 498532;
 
 	/* stvx vrs10, r3, r4 */
-	stepped = emulate_step(&regs, TEST_STVX(10, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_STVX(10, 3, 4));
 
 	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
 	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3])
@@ -402,7 +359,7 @@ static void __init test_lxvd2x_stxvd2x(void)
 	regs.gpr[4] = 0;
 
 	/* lxvd2x vsr39, r3, r4 */
-	stepped = emulate_step(&regs, TEST_LXVD2X(39, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_LXVD2X(39, R3, R4));
 
 	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {
 		show_result("lxvd2x", "PASS");
@@ -422,7 +379,7 @@ static void __init test_lxvd2x_stxvd2x(void)
 	c.b[3] = 4;
 
 	/* stxvd2x vsr39, r3, r4 */
-	stepped = emulate_step(&regs, TEST_STXVD2X(39, 3, 4));
+	stepped = emulate_step(&regs, PPC_ENCODE_STXVD2X(39, R3, R4));
 
 	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
 	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3] &&
@@ -484,7 +441,7 @@ static struct compute_test compute_tests[] = {
 		.subtests = {
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MIN",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MIN,
@@ -492,7 +449,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MAX,
@@ -500,7 +457,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MAX, RB = LONG_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MAX,
 					.gpr[22] = LONG_MAX,
@@ -508,7 +465,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = ULONG_MAX,
@@ -516,7 +473,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = 0x1",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = 0x1,
@@ -524,7 +481,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MIN",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MIN,
@@ -532,7 +489,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MAX,
@@ -540,7 +497,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MAX, RB = INT_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MAX,
 					.gpr[22] = INT_MAX,
@@ -548,7 +505,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = UINT_MAX",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = UINT_MAX,
@@ -556,7 +513,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = 0x1",
-				.instr = TEST_ADD(20, 21, 22),
+				.instr = PPC_ENCODE_ADD(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = 0x1,
@@ -570,7 +527,7 @@ static struct compute_test compute_tests[] = {
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MIN",
 				.flags = IGNORE_CCR,
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MIN,
@@ -578,7 +535,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MAX",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MAX,
@@ -587,7 +544,7 @@ static struct compute_test compute_tests[] = {
 			{
 				.descr = "RA = LONG_MAX, RB = LONG_MAX",
 				.flags = IGNORE_CCR,
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MAX,
 					.gpr[22] = LONG_MAX,
@@ -595,7 +552,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = ULONG_MAX,
@@ -603,7 +560,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = 0x1",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = 0x1,
@@ -611,7 +568,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MIN",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MIN,
@@ -619,7 +576,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MAX",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MAX,
@@ -627,7 +584,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MAX, RB = INT_MAX",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MAX,
 					.gpr[22] = INT_MAX,
@@ -635,7 +592,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = UINT_MAX",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = UINT_MAX,
@@ -643,7 +600,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = 0x1",
-				.instr = TEST_ADD_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = 0x1,
@@ -656,7 +613,7 @@ static struct compute_test compute_tests[] = {
 		.subtests = {
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MIN",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MIN,
@@ -664,7 +621,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MAX,
@@ -672,7 +629,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MAX, RB = LONG_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MAX,
 					.gpr[22] = LONG_MAX,
@@ -680,7 +637,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = ULONG_MAX,
@@ -688,7 +645,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = 0x1",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = 0x1,
@@ -696,7 +653,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MIN",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MIN,
@@ -704,7 +661,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MAX,
@@ -712,7 +669,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MAX, RB = INT_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MAX,
 					.gpr[22] = INT_MAX,
@@ -720,7 +677,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = UINT_MAX",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = UINT_MAX,
@@ -728,7 +685,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = 0x1",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = 0x1,
@@ -736,7 +693,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN | INT_MIN, RB = LONG_MIN | INT_MIN",
-				.instr = TEST_ADDC(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN | (uint)INT_MIN,
 					.gpr[22] = LONG_MIN | (uint)INT_MIN,
@@ -750,7 +707,7 @@ static struct compute_test compute_tests[] = {
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MIN",
 				.flags = IGNORE_CCR,
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MIN,
@@ -758,7 +715,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN, RB = LONG_MAX",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN,
 					.gpr[22] = LONG_MAX,
@@ -767,7 +724,7 @@ static struct compute_test compute_tests[] = {
 			{
 				.descr = "RA = LONG_MAX, RB = LONG_MAX",
 				.flags = IGNORE_CCR,
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MAX,
 					.gpr[22] = LONG_MAX,
@@ -775,7 +732,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = ULONG_MAX,
@@ -783,7 +740,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = ULONG_MAX, RB = 0x1",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = ULONG_MAX,
 					.gpr[22] = 0x1,
@@ -791,7 +748,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MIN",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MIN,
@@ -799,7 +756,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MIN, RB = INT_MAX",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MIN,
 					.gpr[22] = INT_MAX,
@@ -807,7 +764,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = INT_MAX, RB = INT_MAX",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = INT_MAX,
 					.gpr[22] = INT_MAX,
@@ -815,7 +772,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = UINT_MAX",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = UINT_MAX,
@@ -823,7 +780,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = UINT_MAX, RB = 0x1",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = UINT_MAX,
 					.gpr[22] = 0x1,
@@ -831,7 +788,7 @@ static struct compute_test compute_tests[] = {
 			},
 			{
 				.descr = "RA = LONG_MIN | INT_MIN, RB = LONG_MIN | INT_MIN",
-				.instr = TEST_ADDC_DOT(20, 21, 22),
+				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
 				.regs = {
 					.gpr[21] = LONG_MIN | (uint)INT_MIN,
 					.gpr[22] = LONG_MIN | (uint)INT_MIN,
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 55d4377ccfae..fdb09e0e16c0 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -45,8 +45,6 @@
 #define PPC_ADDIS(d, a, i)	EMIT(PPC_INST_ADDIS |			      \
 				     ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
 #define PPC_LIS(r, i)		PPC_ADDIS(r, 0, i)
-#define PPC_STD(r, base, i)	EMIT(PPC_INST_STD | ___PPC_RS(r) |	      \
-				     ___PPC_RA(base) | ((i) & 0xfffc))
 #define PPC_STDX(r, base, b)	EMIT(PPC_INST_STDX | ___PPC_RS(r) |	      \
 				     ___PPC_RA(base) | ___PPC_RB(b))
 #define PPC_STDU(r, base, i)	EMIT(PPC_INST_STDU | ___PPC_RS(r) |	      \
@@ -62,12 +60,8 @@
 
 #define PPC_LBZ(r, base, i)	EMIT(PPC_INST_LBZ | ___PPC_RT(r) |	      \
 				     ___PPC_RA(base) | IMM_L(i))
-#define PPC_LD(r, base, i)	EMIT(PPC_INST_LD | ___PPC_RT(r) |	      \
-				     ___PPC_RA(base) | ((i) & 0xfffc))
 #define PPC_LDX(r, base, b)	EMIT(PPC_INST_LDX | ___PPC_RT(r) |	      \
 				     ___PPC_RA(base) | ___PPC_RB(b))
-#define PPC_LWZ(r, base, i)	EMIT(PPC_INST_LWZ | ___PPC_RT(r) |	      \
-				     ___PPC_RA(base) | IMM_L(i))
 #define PPC_LHZ(r, base, i)	EMIT(PPC_INST_LHZ | ___PPC_RT(r) |	      \
 				     ___PPC_RA(base) | IMM_L(i))
 #define PPC_LHBRX(r, base, b)	EMIT(PPC_INST_LHBRX | ___PPC_RT(r) |	      \
@@ -100,8 +94,6 @@
 
 #define PPC_SUB(d, a, b)	EMIT(PPC_INST_SUB | ___PPC_RT(d) |	      \
 				     ___PPC_RB(a) | ___PPC_RA(b))
-#define PPC_ADD(d, a, b)	EMIT(PPC_INST_ADD | ___PPC_RT(d) |	      \
-				     ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_MULD(d, a, b)	EMIT(PPC_INST_MULLD | ___PPC_RT(d) |	      \
 				     ___PPC_RA(a) | ___PPC_RB(b))
 #define PPC_MULW(d, a, b)	EMIT(PPC_INST_MULLW | ___PPC_RT(d) |	      \
diff --git a/arch/powerpc/net/bpf_jit32.h b/arch/powerpc/net/bpf_jit32.h
index 4ec2a9f14f84..8a9f16a7262e 100644
--- a/arch/powerpc/net/bpf_jit32.h
+++ b/arch/powerpc/net/bpf_jit32.h
@@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
 			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
 
-#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
+#define _OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LD(r, base, i));     \
 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
-			PPC_LD(r, r, IMM_L(i)); } } while(0)
+			EMIT((r, r, IMM_L(i))); } } while(0)
 
-#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LWZ(r, base, i);   \
+#define PPC_LWZ_OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LWZ(r, base, i));   \
 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
-			PPC_LWZ(r, r, IMM_L(i)); } } while(0)
+			EMIT(PPC_ENCODE_LWZ(r, r, IMM_L(i))); } } while(0)
 
 #define PPC_LHZ_OFFS(r, base, i) do { if ((i) < 32768) PPC_LHZ(r, base, i);   \
 		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
@@ -118,7 +118,7 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
 #define PPC_NTOHS_OFFS(r, base, i)	PPC_LHZ_OFFS(r, base, i)
 #endif
 
-#define PPC_BPF_LL(r, base, i) do { PPC_LWZ(r, base, i); } while(0)
+#define PPC_BPF_LL(r, base, i) do { EMIT(PPC_ENCODE_LWZ(r, base, i)); } while(0)
 #define PPC_BPF_STL(r, base, i) do { PPC_STW(r, base, i); } while(0)
 #define PPC_BPF_STLU(r, base, i) do { PPC_STWU(r, base, i); } while(0)
 
diff --git a/arch/powerpc/net/bpf_jit64.h b/arch/powerpc/net/bpf_jit64.h
index cf3a7e337f02..d6946c0d3625 100644
--- a/arch/powerpc/net/bpf_jit64.h
+++ b/arch/powerpc/net/bpf_jit64.h
@@ -73,14 +73,14 @@ static const int b2p[] = {
 					PPC_LI(b2p[TMP_REG_2], (i));	      \
 					PPC_LDX(r, base, b2p[TMP_REG_2]);     \
 				} else					      \
-					PPC_LD(r, base, i);		      \
+					EMIT(PPC_ENCODE_LD(r, base, i));	      \
 				} while(0)
 #define PPC_BPF_STL(r, base, i) do {					      \
 				if ((i) % 4) {				      \
 					PPC_LI(b2p[TMP_REG_2], (i));	      \
 					PPC_STDX(r, base, b2p[TMP_REG_2]);    \
 				} else					      \
-					PPC_STD(r, base, i);		      \
+					EMIT(PPC_ENCODE_STD(r, base, i));	      \
 				} while(0)
 #define PPC_BPF_STLU(r, base, i) do { PPC_STDU(r, base, i); } while(0)
 
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 0acc9d5fb19e..ffda0ea28d91 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -134,7 +134,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 			/*** ALU ops ***/
 		case BPF_ALU | BPF_ADD | BPF_X: /* A += X; */
 			ctx->seen |= SEEN_XREG;
-			PPC_ADD(r_A, r_A, r_X);
+			EMIT(PPC_ENCODE_ADD(r_A, r_A, r_X));
 			break;
 		case BPF_ALU | BPF_ADD | BPF_K: /* A += K; */
 			if (!K)
diff --git a/arch/powerpc/net/bpf_jit_comp64.c b/arch/powerpc/net/bpf_jit_comp64.c
index be3517ef0574..3d6d5ec8f450 100644
--- a/arch/powerpc/net/bpf_jit_comp64.c
+++ b/arch/powerpc/net/bpf_jit_comp64.c
@@ -239,7 +239,7 @@ static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32
 	 * if (index >= array->map.max_entries)
 	 *   goto out;
 	 */
-	PPC_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries));
+	EMIT(PPC_ENCODE_LWZ(b2p[TMP_REG_1], b2p_bpf_array, offsetof(struct bpf_array, map.max_entries)));
 	PPC_RLWINM(b2p_index, b2p_index, 0, 0, 31);
 	PPC_CMPLW(b2p_index, b2p[TMP_REG_1]);
 	PPC_BCC(COND_GE, out);
@@ -260,7 +260,7 @@ static void bpf_jit_emit_tail_call(u32 *image, struct codegen_context *ctx, u32
 
 	/* prog = array->ptrs[index]; */
 	PPC_MULI(b2p[TMP_REG_1], b2p_index, 8);
-	PPC_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array);
+	EMIT(PPC_ENCODE_ADD(b2p[TMP_REG_1], b2p[TMP_REG_1], b2p_bpf_array));
 	PPC_BPF_LL(b2p[TMP_REG_1], b2p[TMP_REG_1], offsetof(struct bpf_array, ptrs));
 
 	/*
@@ -340,7 +340,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 		 */
 		case BPF_ALU | BPF_ADD | BPF_X: /* (u32) dst += (u32) src */
 		case BPF_ALU64 | BPF_ADD | BPF_X: /* dst += src */
-			PPC_ADD(dst_reg, dst_reg, src_reg);
+			EMIT(PPC_ENCODE_ADD(dst_reg, dst_reg, src_reg));
 			goto bpf_alu32_trunc;
 		case BPF_ALU | BPF_SUB | BPF_X: /* (u32) dst -= (u32) src */
 		case BPF_ALU64 | BPF_SUB | BPF_X: /* dst -= src */
@@ -357,7 +357,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 					PPC_ADDI(dst_reg, dst_reg, IMM_L(imm));
 				else {
 					PPC_LI32(b2p[TMP_REG_1], imm);
-					PPC_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]);
+					EMIT(PPC_ENCODE_ADD(dst_reg, dst_reg, b2p[TMP_REG_1]));
 				}
 			}
 			goto bpf_alu32_trunc;
@@ -691,7 +691,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 			/* load value from memory into TMP_REG_2 */
 			PPC_BPF_LWARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
 			/* add value from src_reg into this */
-			PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
+			EMIT(PPC_ENCODE_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg));
 			/* store result back */
 			PPC_BPF_STWCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
 			/* we're done if this succeeded */
@@ -702,7 +702,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 			PPC_ADDI(b2p[TMP_REG_1], dst_reg, off);
 			tmp_idx = ctx->idx * 4;
 			PPC_BPF_LDARX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1], 0);
-			PPC_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg);
+			EMIT(PPC_ENCODE_ADD(b2p[TMP_REG_2], b2p[TMP_REG_2], src_reg));
 			PPC_BPF_STDCX(b2p[TMP_REG_2], 0, b2p[TMP_REG_1]);
 			PPC_BCC_SHORT(COND_NE, tmp_idx);
 			break;
@@ -724,7 +724,7 @@ static int bpf_jit_build_body(struct bpf_prog *fp, u32 *image,
 			break;
 		/* dst = *(u32 *)(ul) (src + off) */
 		case BPF_LDX | BPF_MEM | BPF_W:
-			PPC_LWZ(dst_reg, src_reg, off);
+			EMIT(PPC_ENCODE_LWZ(dst_reg, src_reg, off));
 			if (insn_is_zext(&insn[i + 1]))
 				addrs[++i] = ctx->idx * 4;
 			break;
-- 
2.24.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [RFC PATCH 4/4] powerpc kvm_asm: rename PPC_LD and PPC_STD macros to avoid redefinition
  2020-03-20  8:18 [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros Balamuruhan S
                   ` (2 preceding siblings ...)
  2020-03-20  8:18 ` [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step Balamuruhan S
@ 2020-03-20  8:18 ` Balamuruhan S
  3 siblings, 0 replies; 9+ messages in thread
From: Balamuruhan S @ 2020-03-20  8:18 UTC (permalink / raw)
  To: mpe
  Cc: ravi.bangoria, jniethe5, Balamuruhan S, paulus, sandipan,
	naveen.n.rao, linuxppc-dev

use PPC_KVM_LD and PPC_KVM_STD to fix gcc warnings on redefinition as
we consolidate all ppc instruction encoding in ppc-opcode.h

Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
---
 arch/powerpc/include/asm/kvm_asm.h    |  8 ++++----
 arch/powerpc/kvm/booke_interrupts.S   |  8 ++++----
 arch/powerpc/kvm/bookehv_interrupts.S | 28 +++++++++++++--------------
 3 files changed, 22 insertions(+), 22 deletions(-)

diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 635fb154b33f..d3f607c57856 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -11,11 +11,11 @@
 
 #ifdef __ASSEMBLY__
 #ifdef CONFIG_64BIT
-#define PPC_STD(sreg, offset, areg)  std sreg, (offset)(areg)
-#define PPC_LD(treg, offset, areg)   ld treg, (offset)(areg)
+#define PPC_KVM_STD(sreg, offset, areg)  (std sreg, (offset)(areg))
+#define PPC_KVM_LD(treg, offset, areg)   (ld treg, (offset)(areg))
 #else
-#define PPC_STD(sreg, offset, areg)  stw sreg, (offset+4)(areg)
-#define PPC_LD(treg, offset, areg)   lwz treg, (offset+4)(areg)
+#define PPC_KVM_STD(sreg, offset, areg)  (stw sreg, ((offset) + 4)(areg))
+#define PPC_KVM_LD(treg, offset, areg)   (lwz treg, ((offset) + 4)(areg))
 #endif
 #endif
 
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 2e56ab5a5f55..3a343da95ea5 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -443,13 +443,13 @@ lightweight_exit:
 	 * written directly to the shared area, so we
 	 * need to reload them here with the guest's values.
 	 */
-	PPC_LD(r3, VCPU_SHARED_SPRG4, r5)
+	PPC_KVM_LD(r3, VCPU_SHARED_SPRG4, r5)
 	mtspr	SPRN_SPRG4W, r3
-	PPC_LD(r3, VCPU_SHARED_SPRG5, r5)
+	PPC_KVM_LD(r3, VCPU_SHARED_SPRG5, r5)
 	mtspr	SPRN_SPRG5W, r3
-	PPC_LD(r3, VCPU_SHARED_SPRG6, r5)
+	PPC_KVM_LD(r3, VCPU_SHARED_SPRG6, r5)
 	mtspr	SPRN_SPRG6W, r3
-	PPC_LD(r3, VCPU_SHARED_SPRG7, r5)
+	PPC_KVM_LD(r3, VCPU_SHARED_SPRG7, r5)
 	mtspr	SPRN_SPRG7W, r3
 
 #ifdef CONFIG_KVM_EXIT_TIMING
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index c577ba4b3169..97e9b3289c7b 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -89,7 +89,7 @@ END_BTB_FLUSH_SECTION
 #endif
 
 	oris	r8, r6, MSR_CE@h
-	PPC_STD(r6, VCPU_SHARED_MSR, r11)
+	PPC_KVM_STD(r6, VCPU_SHARED_MSR, r11)
 	ori	r8, r8, MSR_ME | MSR_RI
 	PPC_STL	r5, VCPU_PC(r4)
 
@@ -386,17 +386,17 @@ _GLOBAL(kvmppc_resume_host)
 	PPC_LL	r3, PACA_SPRG_VDSO(r13)
 #endif
 	mfspr	r5, SPRN_SPRG9
-	PPC_STD(r6, VCPU_SHARED_SPRG4, r11)
+	PPC_KVM_STD(r6, VCPU_SHARED_SPRG4, r11)
 	mfspr	r8, SPRN_SPRG6
-	PPC_STD(r7, VCPU_SHARED_SPRG5, r11)
+	PPC_KVM_STD(r7, VCPU_SHARED_SPRG5, r11)
 	mfspr	r9, SPRN_SPRG7
 #ifdef CONFIG_64BIT
 	mtspr	SPRN_SPRG_VDSO_WRITE, r3
 #endif
-	PPC_STD(r5, VCPU_SPRG9, r4)
-	PPC_STD(r8, VCPU_SHARED_SPRG6, r11)
+	PPC_KVM_STD(r5, VCPU_SPRG9, r4)
+	PPC_KVM_STD(r8, VCPU_SHARED_SPRG6, r11)
 	mfxer	r3
-	PPC_STD(r9, VCPU_SHARED_SPRG7, r11)
+	PPC_KVM_STD(r9, VCPU_SHARED_SPRG7, r11)
 
 	/* save guest MAS registers and restore host mas4 & mas6 */
 	mfspr	r5, SPRN_MAS0
@@ -405,7 +405,7 @@ _GLOBAL(kvmppc_resume_host)
 	stw	r5, VCPU_SHARED_MAS0(r11)
 	mfspr	r7, SPRN_MAS2
 	stw	r6, VCPU_SHARED_MAS1(r11)
-	PPC_STD(r7, VCPU_SHARED_MAS2, r11)
+	PPC_KVM_STD(r7, VCPU_SHARED_MAS2, r11)
 	mfspr	r5, SPRN_MAS3
 	mfspr	r6, SPRN_MAS4
 	stw	r5, VCPU_SHARED_MAS7_3+4(r11)
@@ -602,7 +602,7 @@ lightweight_exit:
 	stw	r3, VCPU_HOST_MAS6(r4)
 	lwz	r3, VCPU_SHARED_MAS0(r11)
 	lwz	r5, VCPU_SHARED_MAS1(r11)
-	PPC_LD(r6, VCPU_SHARED_MAS2, r11)
+	PPC_KVM_LD(r6, VCPU_SHARED_MAS2, r11)
 	lwz	r7, VCPU_SHARED_MAS7_3+4(r11)
 	lwz	r8, VCPU_SHARED_MAS4(r11)
 	mtspr	SPRN_MAS0, r3
@@ -620,15 +620,15 @@ lightweight_exit:
 	 * SPRGs, so we need to reload them here with the guest's values.
 	 */
 	lwz	r3, VCPU_VRSAVE(r4)
-	PPC_LD(r5, VCPU_SHARED_SPRG4, r11)
+	PPC_KVM_LD(r5, VCPU_SHARED_SPRG4, r11)
 	mtspr	SPRN_VRSAVE, r3
-	PPC_LD(r6, VCPU_SHARED_SPRG5, r11)
+	PPC_KVM_LD(r6, VCPU_SHARED_SPRG5, r11)
 	mtspr	SPRN_SPRG4W, r5
-	PPC_LD(r7, VCPU_SHARED_SPRG6, r11)
+	PPC_KVM_LD(r7, VCPU_SHARED_SPRG6, r11)
 	mtspr	SPRN_SPRG5W, r6
-	PPC_LD(r8, VCPU_SHARED_SPRG7, r11)
+	PPC_KVM_LD(r8, VCPU_SHARED_SPRG7, r11)
 	mtspr	SPRN_SPRG6W, r7
-	PPC_LD(r5, VCPU_SPRG9, r4)
+	PPC_KVM_LD(r5, VCPU_SPRG9, r4)
 	mtspr	SPRN_SPRG7W, r8
 	mtspr	SPRN_SPRG9, r5
 
@@ -638,7 +638,7 @@ lightweight_exit:
 	PPC_LL	r6, VCPU_CTR(r4)
 	PPC_LL	r7, VCPU_CR(r4)
 	PPC_LL	r8, VCPU_PC(r4)
-	PPC_LD(r9, VCPU_SHARED_MSR, r11)
+	PPC_KVM_LD(r9, VCPU_SHARED_MSR, r11)
 	PPC_LL	r0, VCPU_GPR(R0)(r4)
 	PPC_LL	r1, VCPU_GPR(R1)(r4)
 	PPC_LL	r2, VCPU_GPR(R2)(r4)
-- 
2.24.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step
  2020-03-20  8:18 ` [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step Balamuruhan S
@ 2020-04-01 16:51   ` Naveen N. Rao
  2020-04-02  4:25     ` Michael Ellerman
  0 siblings, 1 reply; 9+ messages in thread
From: Naveen N. Rao @ 2020-04-01 16:51 UTC (permalink / raw)
  To: Balamuruhan S, mpe
  Cc: jniethe5, linuxppc-dev, sandipan, paulus, ravi.bangoria

Balamuruhan S wrote:
> Few ppc instructions are encoded in test_emulate_step.c, consolidate them to
> ppc-opcode.h, fix redefintion errors in bpf_jit caused due to this consolidation.
> Reuse the macros from ppc-opcode.h
> 
> Signed-off-by: Balamuruhan S <bala24@linux.ibm.com>
> ---
>  arch/powerpc/include/asm/ppc-opcode.h |  34 ++++++
>  arch/powerpc/lib/test_emulate_step.c  | 155 ++++++++++----------------
>  arch/powerpc/net/bpf_jit.h            |   8 --
>  arch/powerpc/net/bpf_jit32.h          |  10 +-
>  arch/powerpc/net/bpf_jit64.h          |   4 +-
>  arch/powerpc/net/bpf_jit_comp.c       |   2 +-
>  arch/powerpc/net/bpf_jit_comp64.c     |  14 +--
>  7 files changed, 105 insertions(+), 122 deletions(-)
> 
> diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
> index ea5e0f864b20..2ed8a285f1ec 100644
> --- a/arch/powerpc/include/asm/ppc-opcode.h
> +++ b/arch/powerpc/include/asm/ppc-opcode.h
> @@ -76,6 +76,9 @@
>  #define	__REGA0_R30	30
>  #define	__REGA0_R31	31
> 
> +#define IMM_L(i)               ((uintptr_t)(i) & 0xffff)
> +#define IMM_DS(i)              ((uintptr_t)(i) & 0xfffc)
> +
>  /* opcode and xopcode for instructions */
>  #define OP_TRAP 3
>  #define OP_TRAP_64 2
> @@ -614,6 +617,37 @@
>  						___PPC_RA(vra) | \
>  						___PPC_RB(vrb) | __PPC_RC21)
> 
> +#define PPC_ENCODE_LD(r, base, i)     (PPC_INST_LD | ___PPC_RT(r) |           \
> +				___PPC_RA(base) | IMM_DS(i))
> +#define PPC_ENCODE_LWZ(r, base, i)    (PPC_INST_LWZ | ___PPC_RT(r) |          \
> +				___PPC_RA(base) | IMM_L(i))
> +#define PPC_ENCODE_LWZX(t, a, b)      (PPC_INST_LWZX | ___PPC_RT(t) |         \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_STD(r, base, i)    (PPC_INST_STD | ___PPC_RS(r) |          \
> +				___PPC_RA(base) | IMM_DS(i))
> +#define PPC_ENCODE_STDCX(s, a, b)     (PPC_INST_STDCX | ___PPC_RS(s) |        \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_LFSX(t, a, b)      (PPC_INST_LFSX | ___PPC_RT(t) |         \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_STFSX(s, a, b)     (PPC_INST_STFSX | ___PPC_RS(s) |        \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_LFDX(t, a, b)      (PPC_INST_LFDX | ___PPC_RT(t) |         \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_STFDX(s, a, b)     (PPC_INST_STFDX | ___PPC_RS(s) |        \
> +				 ___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_LVX(t, a, b)       (PPC_INST_LVX | ___PPC_RT(t) |          \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_STVX(s, a, b)      (PPC_INST_STVX | ___PPC_RS(s) |         \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_ADD(t, a, b)       (PPC_INST_ADD | ___PPC_RT(t) |          \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_ADD_DOT(t, a, b)   (PPC_INST_ADD | ___PPC_RT(t) |          \
> +				___PPC_RA(a) | ___PPC_RB(b) | 0x1)
> +#define PPC_ENCODE_ADDC(t, a, b)      (PPC_INST_ADDC | ___PPC_RT(t) |         \
> +				___PPC_RA(a) | ___PPC_RB(b))
> +#define PPC_ENCODE_ADDC_DOT(t, a, b)  (PPC_INST_ADDC | ___PPC_RT(t) |         \
> +				___PPC_RA(a) | ___PPC_RB(b) | 0x1)
> +
>  #define PPC_CP_ABORT        stringify_in_c(.long PPC_ENCODE_CP_ABORT)
>  #define PPC_COPY(a, b)      stringify_in_c(.long PPC_ENCODE_COPY(a, b))
>  #define PPC_DARN(t, l)      stringify_in_c(.long PPC_ENCODE_DARN(t, l))
> diff --git a/arch/powerpc/lib/test_emulate_step.c b/arch/powerpc/lib/test_emulate_step.c
> index 53df4146dd32..45b485edfee1 100644
> --- a/arch/powerpc/lib/test_emulate_step.c
> +++ b/arch/powerpc/lib/test_emulate_step.c
> @@ -12,49 +12,6 @@
>  #include <asm/ppc-opcode.h>
>  #include <asm/code-patching.h>
> 
> -#define IMM_L(i)		((uintptr_t)(i) & 0xffff)
> -#define IMM_DS(i)		((uintptr_t)(i) & 0xfffc)
> -
> -/*
> - * Defined with TEST_ prefix so it does not conflict with other
> - * definitions.
> - */
> -#define TEST_LD(r, base, i)	(PPC_INST_LD | ___PPC_RT(r) |		\
> -					___PPC_RA(base) | IMM_DS(i))
> -#define TEST_LWZ(r, base, i)	(PPC_INST_LWZ | ___PPC_RT(r) |		\
> -					___PPC_RA(base) | IMM_L(i))
> -#define TEST_LWZX(t, a, b)	(PPC_INST_LWZX | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_STD(r, base, i)	(PPC_INST_STD | ___PPC_RS(r) |		\
> -					___PPC_RA(base) | IMM_DS(i))
> -#define TEST_LDARX(t, a, b, eh)	(PPC_INST_LDARX | ___PPC_RT(t) |	\
> -					___PPC_RA(a) | ___PPC_RB(b) |	\
> -					__PPC_EH(eh))
> -#define TEST_STDCX(s, a, b)	(PPC_INST_STDCX | ___PPC_RS(s) |	\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_LFSX(t, a, b)	(PPC_INST_LFSX | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_STFSX(s, a, b)	(PPC_INST_STFSX | ___PPC_RS(s) |	\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_LFDX(t, a, b)	(PPC_INST_LFDX | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_STFDX(s, a, b)	(PPC_INST_STFDX | ___PPC_RS(s) |	\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_LVX(t, a, b)	(PPC_INST_LVX | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_STVX(s, a, b)	(PPC_INST_STVX | ___PPC_RS(s) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_LXVD2X(s, a, b)	(PPC_INST_LXVD2X | VSX_XX1((s), R##a, R##b))
> -#define TEST_STXVD2X(s, a, b)	(PPC_INST_STXVD2X | VSX_XX1((s), R##a, R##b))
> -#define TEST_ADD(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_ADD_DOT(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b) | 0x1)
> -#define TEST_ADDC(t, a, b)	(PPC_INST_ADDC | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b))
> -#define TEST_ADDC_DOT(t, a, b)	(PPC_INST_ADDC | ___PPC_RT(t) |		\
> -					___PPC_RA(a) | ___PPC_RB(b) | 0x1)
> -
>  #define MAX_SUBTESTS	16
> 
>  #define IGNORE_GPR(n)	(0x1UL << (n))
> @@ -104,7 +61,7 @@ static void __init test_ld(void)
>  	regs.gpr[3] = (unsigned long) &a;
> 
>  	/* ld r5, 0(r3) */
> -	stepped = emulate_step(&regs, TEST_LD(5, 3, 0));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LD(5, 3, 0));
> 
>  	if (stepped == 1 && regs.gpr[5] == a)
>  		show_result("ld", "PASS");
> @@ -122,7 +79,7 @@ static void __init test_lwz(void)
>  	regs.gpr[3] = (unsigned long) &a;
> 
>  	/* lwz r5, 0(r3) */
> -	stepped = emulate_step(&regs, TEST_LWZ(5, 3, 0));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LWZ(5, 3, 0));
> 
>  	if (stepped == 1 && regs.gpr[5] == a)
>  		show_result("lwz", "PASS");
> @@ -142,7 +99,7 @@ static void __init test_lwzx(void)
>  	regs.gpr[5] = 0x8765;
> 
>  	/* lwzx r5, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_LWZX(5, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LWZX(5, 3, 4));
>  	if (stepped == 1 && regs.gpr[5] == a[2])
>  		show_result("lwzx", "PASS");
>  	else
> @@ -160,7 +117,7 @@ static void __init test_std(void)
>  	regs.gpr[5] = 0x5678;
> 
>  	/* std r5, 0(r3) */
> -	stepped = emulate_step(&regs, TEST_STD(5, 3, 0));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STD(5, 3, 0));
>  	if (stepped == 1 && regs.gpr[5] == a)
>  		show_result("std", "PASS");
>  	else
> @@ -185,7 +142,7 @@ static void __init test_ldarx_stdcx(void)
>  	regs.gpr[5] = 0x5678;
> 
>  	/* ldarx r5, r3, r4, 0 */
> -	stepped = emulate_step(&regs, TEST_LDARX(5, 3, 4, 0));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LDARX(5, 3, 4, 0));
> 
>  	/*
>  	 * Don't touch 'a' here. Touching 'a' can do Load/store
> @@ -203,7 +160,7 @@ static void __init test_ldarx_stdcx(void)
>  	regs.gpr[5] = 0x9ABC;
> 
>  	/* stdcx. r5, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_STDCX(5, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STDCX(5, 3, 4));
> 
>  	/*
>  	 * Two possible scenarios that indicates successful emulation
> @@ -243,7 +200,7 @@ static void __init test_lfsx_stfsx(void)
>  	regs.gpr[4] = 0;
> 
>  	/* lfsx frt10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_LFSX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LFSX(10, 3, 4));
> 
>  	if (stepped == 1)
>  		show_result("lfsx", "PASS");
> @@ -256,7 +213,7 @@ static void __init test_lfsx_stfsx(void)
>  	c.a = 678.91;
> 
>  	/* stfsx frs10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_STFSX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STFSX(10, 3, 4));
> 
>  	if (stepped == 1 && c.b == cached_b)
>  		show_result("stfsx", "PASS");
> @@ -286,7 +243,7 @@ static void __init test_lfdx_stfdx(void)
>  	regs.gpr[4] = 0;
> 
>  	/* lfdx frt10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_LFDX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LFDX(10, 3, 4));
> 
>  	if (stepped == 1)
>  		show_result("lfdx", "PASS");
> @@ -299,7 +256,7 @@ static void __init test_lfdx_stfdx(void)
>  	c.a = 987654.32;
> 
>  	/* stfdx frs10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_STFDX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STFDX(10, 3, 4));
> 
>  	if (stepped == 1 && c.b == cached_b)
>  		show_result("stfdx", "PASS");
> @@ -345,7 +302,7 @@ static void __init test_lvx_stvx(void)
>  	regs.gpr[4] = 0;
> 
>  	/* lvx vrt10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_LVX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LVX(10, 3, 4));
> 
>  	if (stepped == 1)
>  		show_result("lvx", "PASS");
> @@ -361,7 +318,7 @@ static void __init test_lvx_stvx(void)
>  	c.b[3] = 498532;
> 
>  	/* stvx vrs10, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_STVX(10, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STVX(10, 3, 4));
> 
>  	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
>  	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3])
> @@ -402,7 +359,7 @@ static void __init test_lxvd2x_stxvd2x(void)
>  	regs.gpr[4] = 0;
> 
>  	/* lxvd2x vsr39, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_LXVD2X(39, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_LXVD2X(39, R3, R4));
> 
>  	if (stepped == 1 && cpu_has_feature(CPU_FTR_VSX)) {
>  		show_result("lxvd2x", "PASS");
> @@ -422,7 +379,7 @@ static void __init test_lxvd2x_stxvd2x(void)
>  	c.b[3] = 4;
> 
>  	/* stxvd2x vsr39, r3, r4 */
> -	stepped = emulate_step(&regs, TEST_STXVD2X(39, 3, 4));
> +	stepped = emulate_step(&regs, PPC_ENCODE_STXVD2X(39, R3, R4));
> 
>  	if (stepped == 1 && cached_b[0] == c.b[0] && cached_b[1] == c.b[1] &&
>  	    cached_b[2] == c.b[2] && cached_b[3] == c.b[3] &&
> @@ -484,7 +441,7 @@ static struct compute_test compute_tests[] = {
>  		.subtests = {
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MIN",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MIN,
> @@ -492,7 +449,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MAX,
> @@ -500,7 +457,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MAX, RB = LONG_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MAX,
>  					.gpr[22] = LONG_MAX,
> @@ -508,7 +465,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = ULONG_MAX,
> @@ -516,7 +473,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = 0x1",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = 0x1,
> @@ -524,7 +481,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MIN",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MIN,
> @@ -532,7 +489,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MAX,
> @@ -540,7 +497,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MAX, RB = INT_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MAX,
>  					.gpr[22] = INT_MAX,
> @@ -548,7 +505,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = UINT_MAX",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = UINT_MAX,
> @@ -556,7 +513,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = 0x1",
> -				.instr = TEST_ADD(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = 0x1,
> @@ -570,7 +527,7 @@ static struct compute_test compute_tests[] = {
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MIN",
>  				.flags = IGNORE_CCR,
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MIN,
> @@ -578,7 +535,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MAX",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MAX,
> @@ -587,7 +544,7 @@ static struct compute_test compute_tests[] = {
>  			{
>  				.descr = "RA = LONG_MAX, RB = LONG_MAX",
>  				.flags = IGNORE_CCR,
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MAX,
>  					.gpr[22] = LONG_MAX,
> @@ -595,7 +552,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = ULONG_MAX,
> @@ -603,7 +560,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = 0x1",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = 0x1,
> @@ -611,7 +568,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MIN",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MIN,
> @@ -619,7 +576,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MAX",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MAX,
> @@ -627,7 +584,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MAX, RB = INT_MAX",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MAX,
>  					.gpr[22] = INT_MAX,
> @@ -635,7 +592,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = UINT_MAX",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = UINT_MAX,
> @@ -643,7 +600,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = 0x1",
> -				.instr = TEST_ADD_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADD_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = 0x1,
> @@ -656,7 +613,7 @@ static struct compute_test compute_tests[] = {
>  		.subtests = {
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MIN",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MIN,
> @@ -664,7 +621,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MAX,
> @@ -672,7 +629,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MAX, RB = LONG_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MAX,
>  					.gpr[22] = LONG_MAX,
> @@ -680,7 +637,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = ULONG_MAX,
> @@ -688,7 +645,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = 0x1",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = 0x1,
> @@ -696,7 +653,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MIN",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MIN,
> @@ -704,7 +661,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MAX,
> @@ -712,7 +669,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MAX, RB = INT_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MAX,
>  					.gpr[22] = INT_MAX,
> @@ -720,7 +677,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = UINT_MAX",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = UINT_MAX,
> @@ -728,7 +685,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = 0x1",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = 0x1,
> @@ -736,7 +693,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN | INT_MIN, RB = LONG_MIN | INT_MIN",
> -				.instr = TEST_ADDC(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN | (uint)INT_MIN,
>  					.gpr[22] = LONG_MIN | (uint)INT_MIN,
> @@ -750,7 +707,7 @@ static struct compute_test compute_tests[] = {
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MIN",
>  				.flags = IGNORE_CCR,
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MIN,
> @@ -758,7 +715,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN, RB = LONG_MAX",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN,
>  					.gpr[22] = LONG_MAX,
> @@ -767,7 +724,7 @@ static struct compute_test compute_tests[] = {
>  			{
>  				.descr = "RA = LONG_MAX, RB = LONG_MAX",
>  				.flags = IGNORE_CCR,
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MAX,
>  					.gpr[22] = LONG_MAX,
> @@ -775,7 +732,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = ULONG_MAX",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = ULONG_MAX,
> @@ -783,7 +740,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = ULONG_MAX, RB = 0x1",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = ULONG_MAX,
>  					.gpr[22] = 0x1,
> @@ -791,7 +748,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MIN",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MIN,
> @@ -799,7 +756,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MIN, RB = INT_MAX",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MIN,
>  					.gpr[22] = INT_MAX,
> @@ -807,7 +764,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = INT_MAX, RB = INT_MAX",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = INT_MAX,
>  					.gpr[22] = INT_MAX,
> @@ -815,7 +772,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = UINT_MAX",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = UINT_MAX,
> @@ -823,7 +780,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = UINT_MAX, RB = 0x1",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = UINT_MAX,
>  					.gpr[22] = 0x1,
> @@ -831,7 +788,7 @@ static struct compute_test compute_tests[] = {
>  			},
>  			{
>  				.descr = "RA = LONG_MIN | INT_MIN, RB = LONG_MIN | INT_MIN",
> -				.instr = TEST_ADDC_DOT(20, 21, 22),
> +				.instr = PPC_ENCODE_ADDC_DOT(20, 21, 22),
>  				.regs = {
>  					.gpr[21] = LONG_MIN | (uint)INT_MIN,
>  					.gpr[22] = LONG_MIN | (uint)INT_MIN,
> diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
> index 55d4377ccfae..fdb09e0e16c0 100644
> --- a/arch/powerpc/net/bpf_jit.h
> +++ b/arch/powerpc/net/bpf_jit.h
> @@ -45,8 +45,6 @@
>  #define PPC_ADDIS(d, a, i)	EMIT(PPC_INST_ADDIS |			      \
>  				     ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
>  #define PPC_LIS(r, i)		PPC_ADDIS(r, 0, i)
> -#define PPC_STD(r, base, i)	EMIT(PPC_INST_STD | ___PPC_RS(r) |	      \
> -				     ___PPC_RA(base) | ((i) & 0xfffc))
>  #define PPC_STDX(r, base, b)	EMIT(PPC_INST_STDX | ___PPC_RS(r) |	      \
>  				     ___PPC_RA(base) | ___PPC_RB(b))
>  #define PPC_STDU(r, base, i)	EMIT(PPC_INST_STDU | ___PPC_RS(r) |	      \
> @@ -62,12 +60,8 @@
> 
>  #define PPC_LBZ(r, base, i)	EMIT(PPC_INST_LBZ | ___PPC_RT(r) |	      \
>  				     ___PPC_RA(base) | IMM_L(i))
> -#define PPC_LD(r, base, i)	EMIT(PPC_INST_LD | ___PPC_RT(r) |	      \
> -				     ___PPC_RA(base) | ((i) & 0xfffc))
>  #define PPC_LDX(r, base, b)	EMIT(PPC_INST_LDX | ___PPC_RT(r) |	      \
>  				     ___PPC_RA(base) | ___PPC_RB(b))
> -#define PPC_LWZ(r, base, i)	EMIT(PPC_INST_LWZ | ___PPC_RT(r) |	      \
> -				     ___PPC_RA(base) | IMM_L(i))
>  #define PPC_LHZ(r, base, i)	EMIT(PPC_INST_LHZ | ___PPC_RT(r) |	      \
>  				     ___PPC_RA(base) | IMM_L(i))
>  #define PPC_LHBRX(r, base, b)	EMIT(PPC_INST_LHBRX | ___PPC_RT(r) |	      \
> @@ -100,8 +94,6 @@
> 
>  #define PPC_SUB(d, a, b)	EMIT(PPC_INST_SUB | ___PPC_RT(d) |	      \
>  				     ___PPC_RB(a) | ___PPC_RA(b))
> -#define PPC_ADD(d, a, b)	EMIT(PPC_INST_ADD | ___PPC_RT(d) |	      \
> -				     ___PPC_RA(a) | ___PPC_RB(b))
>  #define PPC_MULD(d, a, b)	EMIT(PPC_INST_MULLD | ___PPC_RT(d) |	      \
>  				     ___PPC_RA(a) | ___PPC_RB(b))
>  #define PPC_MULW(d, a, b)	EMIT(PPC_INST_MULLW | ___PPC_RT(d) |	      \
> diff --git a/arch/powerpc/net/bpf_jit32.h b/arch/powerpc/net/bpf_jit32.h
> index 4ec2a9f14f84..8a9f16a7262e 100644
> --- a/arch/powerpc/net/bpf_jit32.h
> +++ b/arch/powerpc/net/bpf_jit32.h
> @@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
>  		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
>  			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
> 
> -#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
> +#define _OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LD(r, base, i));     \
	   ^^^^^
Should be PPC_LD_OFFS. For the next version, please also build ppc32 and 
booke codebase to confirm that your changes in those areas are fine.

PPC_ENCODE_* also looks quite verbose, so perhaps PPC_ENC_* might be 
better. Otherwise, this patchset looks good to me and should help reuse 
some of those macros, especially from the eBPF codebase.

Michael,
Can you let us know if this looks ok to you? Based on your feedback, we 
will also update the eBPF codebase.


Thanks,
Naveen


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step
  2020-04-01 16:51   ` Naveen N. Rao
@ 2020-04-02  4:25     ` Michael Ellerman
  2020-04-02  7:04       ` Naveen N. Rao
  0 siblings, 1 reply; 9+ messages in thread
From: Michael Ellerman @ 2020-04-02  4:25 UTC (permalink / raw)
  To: Naveen N. Rao, Balamuruhan S
  Cc: jniethe5, linuxppc-dev, sandipan, paulus, ravi.bangoria

"Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com> writes:
> Balamuruhan S wrote:
>> Few ppc instructions are encoded in test_emulate_step.c, consolidate them to
>> ppc-opcode.h, fix redefintion errors in bpf_jit caused due to this consolidation.
>> Reuse the macros from ppc-opcode.h
...
>> diff --git a/arch/powerpc/net/bpf_jit32.h b/arch/powerpc/net/bpf_jit32.h
>> index 4ec2a9f14f84..8a9f16a7262e 100644
>> --- a/arch/powerpc/net/bpf_jit32.h
>> +++ b/arch/powerpc/net/bpf_jit32.h
>> @@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
>>  		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
>>  			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
>> 
>> -#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
>> +#define _OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LD(r, base, i));     \
> 	   ^^^^^
> Should be PPC_LD_OFFS. For the next version, please also build ppc32 and 
> booke codebase to confirm that your changes in those areas are fine.
>
> PPC_ENCODE_* also looks quite verbose, so perhaps PPC_ENC_* might be 
> better. Otherwise, this patchset looks good to me and should help reuse 
> some of those macros, especially from the eBPF codebase.
>
> Michael,
> Can you let us know if this looks ok to you? Based on your feedback, we 
> will also update the eBPF codebase.

I didn't really like the first patch which does the mass renaming. It
creates a huge amount of churn.

I think I'd be happier if this series just did what it needs, and then
maybe at the end there's a patch to update all the existing names, which
I may or may not take.

As far as the naming, currently we have:

PPC_INST_FOO - just the opcode

PPC_FOO(x) - macro to encode the opcode with x and (usually) also emit a
            .long and stringify.

And you need an in-between that gives you the full instruction but
without the .long and stringify, right?

So how about PPC_RAW_FOO() for just the numeric value, without the .long
and stringify.

We also seem to have a lot of PPC_INST_FOO's that are only ever used in
the PPC_INST macro. I'm inclined to fold those into the PPC_INST macro,
to avoid people accidentally using the PPC_INST version when they don't
mean to. But that's a separate issue.

cheers

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step
  2020-04-02  4:25     ` Michael Ellerman
@ 2020-04-02  7:04       ` Naveen N. Rao
  2020-04-03  7:14         ` Balamuruhan S
  0 siblings, 1 reply; 9+ messages in thread
From: Naveen N. Rao @ 2020-04-02  7:04 UTC (permalink / raw)
  To: Balamuruhan S, Michael Ellerman
  Cc: jniethe5, linuxppc-dev, sandipan, paulus, ravi.bangoria

Michael Ellerman wrote:
> "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com> writes:
>> Balamuruhan S wrote:
>>> Few ppc instructions are encoded in test_emulate_step.c, consolidate them to
>>> ppc-opcode.h, fix redefintion errors in bpf_jit caused due to this consolidation.
>>> Reuse the macros from ppc-opcode.h
> ...
>>> diff --git a/arch/powerpc/net/bpf_jit32.h b/arch/powerpc/net/bpf_jit32.h
>>> index 4ec2a9f14f84..8a9f16a7262e 100644
>>> --- a/arch/powerpc/net/bpf_jit32.h
>>> +++ b/arch/powerpc/net/bpf_jit32.h
>>> @@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
>>>  		else {	PPC_ADDIS(r, base, IMM_HA(i));			      \
>>>  			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
>>> 
>>> -#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
>>> +#define _OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LD(r, base, i));     \
>> 	   ^^^^^
>> Should be PPC_LD_OFFS. For the next version, please also build ppc32 and 
>> booke codebase to confirm that your changes in those areas are fine.
>>
>> PPC_ENCODE_* also looks quite verbose, so perhaps PPC_ENC_* might be 
>> better. Otherwise, this patchset looks good to me and should help reuse 
>> some of those macros, especially from the eBPF codebase.
>>
>> Michael,
>> Can you let us know if this looks ok to you? Based on your feedback, we 
>> will also update the eBPF codebase.
> 
> I didn't really like the first patch which does the mass renaming. It
> creates a huge amount of churn.
> 
> I think I'd be happier if this series just did what it needs, and then
> maybe at the end there's a patch to update all the existing names, which
> I may or may not take.

Ok.

> 
> As far as the naming, currently we have:
> 
> PPC_INST_FOO - just the opcode
> 
> PPC_FOO(x) - macro to encode the opcode with x and (usually) also emit a
>             .long and stringify.
> 
> And you need an in-between that gives you the full instruction but
> without the .long and stringify, right?

Yes.

> 
> So how about PPC_RAW_FOO() for just the numeric value, without the .long
> and stringify.

Sure, thanks for the feedback -- that makes sense.

> 
> We also seem to have a lot of PPC_INST_FOO's that are only ever used in
> the PPC_INST macro. I'm inclined to fold those into the PPC_INST macro,
> to avoid people accidentally using the PPC_INST version when they don't
> mean to. But that's a separate issue.

Good point -- I do see many uses of PPC_INST_FOO that can be replaced 
with PPC_RAW_FOO once we introduce that. We will take a stab at doing 
this cleanup as a separate patch at the end.


Thanks,
Naveen


^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step
  2020-04-02  7:04       ` Naveen N. Rao
@ 2020-04-03  7:14         ` Balamuruhan S
  0 siblings, 0 replies; 9+ messages in thread
From: Balamuruhan S @ 2020-04-03  7:14 UTC (permalink / raw)
  To: Naveen N. Rao, Michael Ellerman
  Cc: jniethe5, linuxppc-dev, sandipan, paulus, ravi.bangoria

On Thu, 2020-04-02 at 12:34 +0530, Naveen N. Rao wrote:
> Michael Ellerman wrote:
> > "Naveen N. Rao" <naveen.n.rao@linux.vnet.ibm.com> writes:
> > > Balamuruhan S wrote:
> > > > Few ppc instructions are encoded in test_emulate_step.c, consolidate
> > > > them to
> > > > ppc-opcode.h, fix redefintion errors in bpf_jit caused due to this
> > > > consolidation.
> > > > Reuse the macros from ppc-opcode.h
> > ...
> > > > diff --git a/arch/powerpc/net/bpf_jit32.h
> > > > b/arch/powerpc/net/bpf_jit32.h
> > > > index 4ec2a9f14f84..8a9f16a7262e 100644
> > > > --- a/arch/powerpc/net/bpf_jit32.h
> > > > +++ b/arch/powerpc/net/bpf_jit32.h
> > > > @@ -76,13 +76,13 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
> > > >  		else {	PPC_ADDIS(r, base, IMM_HA(i));			
> > > >       \
> > > >  			PPC_LBZ(r, r, IMM_L(i)); } } while(0)
> > > > 
> > > > -#define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base,
> > > > i);     \
> > > > +#define _OFFS(r, base, i) do { if ((i) < 32768) EMIT(PPC_ENCODE_LD(r,
> > > > base, i));     \
> > > 	   ^^^^^
> > > Should be PPC_LD_OFFS. For the next version, please also build ppc32 and 
> > > booke codebase to confirm that your changes in those areas are fine.
> > > 
> > > PPC_ENCODE_* also looks quite verbose, so perhaps PPC_ENC_* might be 
> > > better. Otherwise, this patchset looks good to me and should help reuse 
> > > some of those macros, especially from the eBPF codebase.
> > > 
> > > Michael,
> > > Can you let us know if this looks ok to you? Based on your feedback, we 
> > > will also update the eBPF codebase.
> > 
> > I didn't really like the first patch which does the mass renaming. It
> > creates a huge amount of churn.

sorry for that.

> > 
> > I think I'd be happier if this series just did what it needs, and then
> > maybe at the end there's a patch to update all the existing names, which
> > I may or may not take.
> 
> Ok.

I will work on it.

> 
> > As far as the naming, currently we have:
> > 
> > PPC_INST_FOO - just the opcode
> > 
> > PPC_FOO(x) - macro to encode the opcode with x and (usually) also emit a
> >             .long and stringify.
> > 
> > And you need an in-between that gives you the full instruction but
> > without the .long and stringify, right?
> 
> Yes.
> 
> > So how about PPC_RAW_FOO() for just the numeric value, without the .long
> > and stringify.
> 
> Sure, thanks for the feedback -- that makes sense.

Thanks for the feedback.

> 
> > We also seem to have a lot of PPC_INST_FOO's that are only ever used in
> > the PPC_INST macro. I'm inclined to fold those into the PPC_INST macro,
> > to avoid people accidentally using the PPC_INST version when they don't
> > mean to. But that's a separate issue.
> 
> Good point -- I do see many uses of PPC_INST_FOO that can be replaced 
> with PPC_RAW_FOO once we introduce that. We will take a stab at doing 
> this cleanup as a separate patch at the end.

Will make the changes as suggested.

-- Bala
> 
> 
> Thanks,
> Naveen
> 


^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2020-04-03  7:19 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-03-20  8:18 [RFC PATCH 0/4] consolidate PowerPC instruction encoding macros Balamuruhan S
2020-03-20  8:18 ` [RFC PATCH 1/4] powerpc ppc-opcode: introduce PPC_ENCODE_* macros for base instruction encoding Balamuruhan S
2020-03-20  8:18 ` [RFC PATCH 2/4] powerpc selftest: reuse ppc-opcode macros to avoid redundancy Balamuruhan S
2020-03-20  8:18 ` [RFC PATCH 3/4] powerpc ppc-opcode: move ppc instuction encoding from test_emulate_step Balamuruhan S
2020-04-01 16:51   ` Naveen N. Rao
2020-04-02  4:25     ` Michael Ellerman
2020-04-02  7:04       ` Naveen N. Rao
2020-04-03  7:14         ` Balamuruhan S
2020-03-20  8:18 ` [RFC PATCH 4/4] powerpc kvm_asm: rename PPC_LD and PPC_STD macros to avoid redefinition Balamuruhan S

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