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[61.68.186.125]) by smtp.gmail.com with ESMTPSA id c14sm20858247pfj.82.2020.07.06.22.51.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Jul 2020 22:51:02 -0700 (PDT) Date: Tue, 07 Jul 2020 15:50:57 +1000 From: Nicholas Piggin Subject: Re: [PATCH] powerpc: select ARCH_HAS_MEMBARRIER_SYNC_CORE To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org References: <20200706021822.1515189-1-npiggin@gmail.com> In-Reply-To: MIME-Version: 1.0 Message-Id: <1594098302.nadnq2txti.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, Mathieu Desnoyers Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Christophe Leroy's message of July 6, 2020 7:53 pm: >=20 >=20 > Le 06/07/2020 =C3=A0 04:18, Nicholas Piggin a =C3=A9crit=C2=A0: >> diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/inc= lude/asm/exception-64s.h >> index 47bd4ea0837d..b88cb3a989b6 100644 >> --- a/arch/powerpc/include/asm/exception-64s.h >> +++ b/arch/powerpc/include/asm/exception-64s.h >> @@ -68,6 +68,10 @@ >> * >> * The nop instructions allow us to insert one or more instructions to= flush the >> * L1-D cache when returning to userspace or a guest. >> + * >> + * powerpc relies on return from interrupt/syscall being context synchr= onising >> + * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SY= NC_CORE >> + * without additional additional synchronisation instructions. >=20 > This file is dedicated to BOOK3S/64. What about other ones ? >=20 > On 32 bits, this is also valid as 'rfi' is also context synchronising,=20 > but then why just add some comment in exception-64s.h and only there ? Yeah you're right, I basically wanted to keep a note there just in case, because it's possible we would get a less synchronising return (maybe unlikely with meltdown) or even return from a kernel interrupt using a something faster (e.g., bctar if we don't use tar register in the kernel anywhere). So I wonder where to add the note, entry_32.S and 64e.h as well? I should actually change the comment for 64-bit because soft masked=20 interrupt replay is an interesting case. I thought it was okay (because=20 the IPI would cause a hard interrupt which does do the rfi) but that=20 should at least be written. The context synchronisation happens before the Linux IPI function is called, but for the purpose of membarrier I=20 think that is okay (the membarrier just needs to have caused a memory barrier + context synchronistaion by the time it has done). Thanks, Nick