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From: Shengjiu Wang <shengjiu.wang@nxp.com>
To: timur@kernel.org, nicoleotsuka@gmail.com, Xiubo.Lee@gmail.com,
	festevam@gmail.com, broonie@kernel.org, perex@perex.cz,
	tiwai@suse.com, alsa-devel@alsa-project.org
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: [PATCH 1/2] ASoC: fsl_spdif: Clear the validity bit for TX
Date: Tue,  7 Jul 2020 16:54:25 +0800	[thread overview]
Message-ID: <1594112066-31297-2-git-send-email-shengjiu.wang@nxp.com> (raw)
In-Reply-To: <1594112066-31297-1-git-send-email-shengjiu.wang@nxp.com>

In IEC958 spec, "The validity bit is logical "0" if the
information in the main data field is reliable, and it
is logical "1" if it is not".

The default value of "ValCtrl" is zero, which means
"Outgoing Validity always set", then all the data is not
reliable, then some spdif sink device will drop the data.

So set "ValCtrl" to 1, that is to clear "Outgoing Validity"
in default.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
---
 sound/soc/fsl/fsl_spdif.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 9fb95c6ee7ba..576370dc6e70 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -985,6 +985,10 @@ static int fsl_spdif_dai_probe(struct snd_soc_dai *dai)
 
 	snd_soc_add_dai_controls(dai, fsl_spdif_ctrls, ARRAY_SIZE(fsl_spdif_ctrls));
 
+	/*Clear the val bit for Tx*/
+	regmap_update_bits(spdif_private->regmap, REG_SPDIF_SCR,
+			   SCR_VAL_MASK, SCR_VAL_CLEAR);
+
 	return 0;
 }
 
-- 
2.21.0


  reply	other threads:[~2020-07-07  9:01 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-07  8:54 [PATCH 0/2] ASoC: fsl_spdif: Clear the validity bit for TX Shengjiu Wang
2020-07-07  8:54 ` Shengjiu Wang [this message]
2020-07-07  8:54 ` [PATCH 2/2] ASoC: fsl_spdif: Add kctl for configuring TX validity bit Shengjiu Wang
2020-07-10 15:39 ` [PATCH 0/2] ASoC: fsl_spdif: Clear the validity bit for TX Mark Brown

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