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[110.174.173.27]) by smtp.gmail.com with ESMTPSA id j4sm6295369wrp.51.2020.07.15.17.57.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2020 17:57:57 -0700 (PDT) Date: Thu, 16 Jul 2020 10:57:50 +1000 From: Nicholas Piggin Subject: Re: [PATCH v2] powerpc: select ARCH_HAS_MEMBARRIER_SYNC_CORE To: Mathieu Desnoyers References: <20200715094829.252208-1-npiggin@gmail.com> <849841781.14062.1594816035327.JavaMail.zimbra@efficios.com> In-Reply-To: <849841781.14062.1594816035327.JavaMail.zimbra@efficios.com> MIME-Version: 1.0 Message-Id: <1594860978.y7ksqnxc5n.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch , Peter Zijlstra , linuxppc-dev , Andy Lutomirski Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Mathieu Desnoyers's message of July 15, 2020 10:27 pm: > ----- On Jul 15, 2020, at 5:48 AM, Nicholas Piggin npiggin@gmail.com wrot= e: > [...] >> index 47bd4ea0837d..a4704f405e8d 100644 >> --- a/arch/powerpc/include/asm/exception-64s.h >> +++ b/arch/powerpc/include/asm/exception-64s.h >> @@ -68,6 +68,13 @@ >> * >> * The nop instructions allow us to insert one or more instructions to f= lush the >> * L1-D cache when returning to userspace or a guest. >> + * >> + * powerpc relies on return from interrupt/syscall being context synchr= onising >> + * (which hrfid, rfid, and rfscv are) to support ARCH_HAS_MEMBARRIER_SY= NC_CORE >> + * without additional additional synchronisation instructions. soft-mas= ked >> + * interrupt replay does not include a context-synchronising rfid, but = those >> + * always return to kernel, the context sync is only required for IPIs = which >> + * return to user. >> */ >> #define RFI_FLUSH_SLOT \ >> RFI_FLUSH_FIXUP_SECTION; \ >=20 > I suspect the statement "the context sync is only required for IPIs which= return to > user." is misleading. >=20 > As I recall that we need more than just context sync after IPI. We need c= ontext sync > in return path of any trap/interrupt/system call which returns to user-sp= ace, else > we'd need to add the proper core serializing barriers in the scheduler, a= s we had > to do for lazy tlb on x86. >=20 > Or am I missing something ? Maybe ambiguous wording. For IPIs, the context synch is only required=20 for those which return to user. Other things also require context sync. I will try to improve it. Thanks, Nick