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[110.174.173.27]) by smtp.gmail.com with ESMTPSA id b11sm14802158pfr.179.2020.07.19.16.57.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Jul 2020 16:57:47 -0700 (PDT) Date: Mon, 20 Jul 2020 09:57:41 +1000 From: Nicholas Piggin Subject: Re: [PATCH v3 2/3] powerpc/powernv/idle: Rename pnv_first_spr_loss_level variable To: benh@kernel.crashing.org, ego@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, mikey@neuling.org, mpe@ellerman.id.au, paulus@samba.org, pratik.r.sampat@gmail.com, Pratik Rajesh Sampat , svaidy@linux.ibm.com References: <20200717185306.60607-1-psampat@linux.ibm.com> <20200717185306.60607-3-psampat@linux.ibm.com> In-Reply-To: <20200717185306.60607-3-psampat@linux.ibm.com> MIME-Version: 1.0 Message-Id: <1595202681.bt4670u7q7.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Pratik Rajesh Sampat's message of July 18, 2020 4:53 am: > Replace the variable name from using "pnv_first_spr_loss_level" to > "pnv_first_fullstate_loss_level". >=20 > As pnv_first_spr_loss_level is supposed to be the earliest state that > has OPAL_PM_LOSE_FULL_CONTEXT set, however as shallow states too loose > SPR values, render an incorrect terminology. It also doesn't lose "full" state at this loss level though. From the=20 architecture it could be called "hv state loss level", but in POWER10=20 even that is not strictly true. >=20 > Signed-off-by: Pratik Rajesh Sampat > --- > arch/powerpc/platforms/powernv/idle.c | 18 +++++++++--------- > 1 file changed, 9 insertions(+), 9 deletions(-) >=20 > diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platfor= ms/powernv/idle.c > index f62904f70fc6..d439e11af101 100644 > --- a/arch/powerpc/platforms/powernv/idle.c > +++ b/arch/powerpc/platforms/powernv/idle.c > @@ -48,7 +48,7 @@ static bool default_stop_found; > * First stop state levels when SPR and TB loss can occur. > */ > static u64 pnv_first_tb_loss_level =3D MAX_STOP_STATE + 1; > -static u64 pnv_first_spr_loss_level =3D MAX_STOP_STATE + 1; > +static u64 pnv_first_fullstate_loss_level =3D MAX_STOP_STATE + 1; > =20 > /* > * psscr value and mask of the deepest stop idle state. > @@ -657,7 +657,7 @@ static unsigned long power9_idle_stop(unsigned long p= sscr, bool mmu_on) > */ > mmcr0 =3D mfspr(SPRN_MMCR0); > } > - if ((psscr & PSSCR_RL_MASK) >=3D pnv_first_spr_loss_level) { > + if ((psscr & PSSCR_RL_MASK) >=3D pnv_first_fullstate_loss_level) { > sprs.lpcr =3D mfspr(SPRN_LPCR); > sprs.hfscr =3D mfspr(SPRN_HFSCR); > sprs.fscr =3D mfspr(SPRN_FSCR); > @@ -741,7 +741,7 @@ static unsigned long power9_idle_stop(unsigned long p= sscr, bool mmu_on) > * just always test PSSCR for SPR/TB state loss. > */ > pls =3D (psscr & PSSCR_PLS) >> PSSCR_PLS_SHIFT; > - if (likely(pls < pnv_first_spr_loss_level)) { > + if (likely(pls < pnv_first_fullstate_loss_level)) { > if (sprs_saved) > atomic_stop_thread_idle(); > goto out; > @@ -1088,7 +1088,7 @@ static void __init pnv_power9_idle_init(void) > * the deepest loss-less (OPAL_PM_STOP_INST_FAST) stop state. > */ > pnv_first_tb_loss_level =3D MAX_STOP_STATE + 1; > - pnv_first_spr_loss_level =3D MAX_STOP_STATE + 1; > + pnv_first_fullstate_loss_level =3D MAX_STOP_STATE + 1; > for (i =3D 0; i < nr_pnv_idle_states; i++) { > int err; > struct pnv_idle_states_t *state =3D &pnv_idle_states[i]; > @@ -1099,8 +1099,8 @@ static void __init pnv_power9_idle_init(void) > pnv_first_tb_loss_level =3D psscr_rl; > =20 > if ((state->flags & OPAL_PM_LOSE_FULL_CONTEXT) && > - (pnv_first_spr_loss_level > psscr_rl)) > - pnv_first_spr_loss_level =3D psscr_rl; > + (pnv_first_fullstate_loss_level > psscr_rl)) > + pnv_first_fullstate_loss_level =3D psscr_rl; > =20 > /* > * The idle code does not deal with TB loss occurring > @@ -1111,8 +1111,8 @@ static void __init pnv_power9_idle_init(void) > * compatibility. > */ > if ((state->flags & OPAL_PM_TIMEBASE_STOP) && > - (pnv_first_spr_loss_level > psscr_rl)) > - pnv_first_spr_loss_level =3D psscr_rl; > + (pnv_first_fullstate_loss_level > psscr_rl)) > + pnv_first_fullstate_loss_level =3D psscr_rl; > =20 > err =3D validate_psscr_val_mask(&state->psscr_val, > &state->psscr_mask, > @@ -1158,7 +1158,7 @@ static void __init pnv_power9_idle_init(void) > } > =20 > pr_info("cpuidle-powernv: First stop level that may lose SPRs =3D 0x%ll= x\n", > - pnv_first_spr_loss_level); > + pnv_first_fullstate_loss_level); > =20 > pr_info("cpuidle-powernv: First stop level that may lose timebase =3D 0= x%llx\n", > pnv_first_tb_loss_level); > --=20 > 2.25.4 >=20 >=20