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Thu, 26 Nov 2020 16:54:50 +0000 (GMT) From: Athira Rajeev To: mpe@ellerman.id.au Subject: [PATCH V2 0/7] powerpc/perf: Fixes for power10 PMU Date: Thu, 26 Nov 2020 11:54:37 -0500 Message-Id: <1606409684-1589-1-git-send-email-atrajeev@linux.vnet.ibm.com> X-Mailer: git-send-email 1.8.3.1 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.312, 18.0.737 definitions=2020-11-26_06:2020-11-26, 2020-11-26 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 adultscore=0 impostorscore=0 spamscore=0 priorityscore=1501 lowpriorityscore=0 phishscore=0 mlxlogscore=999 suspectscore=1 bulkscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2009150000 definitions=main-2011260097 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: maddy@linux.ibm.com, linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Patchset contains PMU fixes for power10. This patchset contains 7 patches. Patch1 includes fix to update event code with radix_scope_qual bit in power10. Patch2 and Patch3 updates the event group constraints for L2/L3 and threshold events in power10. Patch4, patch5 and patch6 includes the event code changes for l2/l3 events and some of the generic events. Patch7 adds fixes for PMCCEXT bit in power10. Changelog: Changes from v1 -> v2 - Addressed Michael Ellerman's comments in the patchset. Split patch 2 to address l2l3 and threshold events group constraints fixes separately. Split Patch 3 also to address event code updates separately for generic and cache events. Fixed commit messages and also PMCCEXT bit setting during event enable. Athira Rajeev (7): powerpc/perf: Fix to update radix_scope_qual in power10 powerpc/perf: Update the PMU group constraints for l2l3 events in power10 powerpc/perf: Fix the PMU group constraints for threshold events in power10 powerpc/perf: Add generic and cache event list for power10 DD1 powerpc/perf: Fix to update generic event codes for power10 powerpc/perf: Fix to update cache events with l2l3 events in power10 powerpc/perf: MMCR0 control for PMU registers under PMCC=00 arch/powerpc/include/asm/reg.h | 1 + arch/powerpc/kernel/cpu_setup_power.c | 1 + arch/powerpc/kernel/dt_cpu_ftrs.c | 1 + arch/powerpc/perf/core-book3s.c | 4 + arch/powerpc/perf/isa207-common.c | 35 ++++++- arch/powerpc/perf/isa207-common.h | 16 ++- arch/powerpc/perf/power10-events-list.h | 9 ++ arch/powerpc/perf/power10-pmu.c | 178 ++++++++++++++++++++++++++++++-- 8 files changed, 231 insertions(+), 14 deletions(-) -- 1.8.3.1