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Tue, 01 Dec 2020 18:49:59 -0800 (PST) Received: from localhost ([1.132.177.56]) by smtp.gmail.com with ESMTPSA id h8sm223576pgg.79.2020.12.01.18.49.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Dec 2020 18:49:58 -0800 (PST) Date: Wed, 02 Dec 2020 12:49:51 +1000 From: Nicholas Piggin Subject: Re: [PATCH 5/8] lazy tlb: allow lazy tlb mm switching to be configurable To: Andy Lutomirski References: <20201128160141.1003903-1-npiggin@gmail.com> <20201128160141.1003903-6-npiggin@gmail.com> In-Reply-To: MIME-Version: 1.0 Message-Id: <1606876546.8oyicax8hw.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch , Arnd Bergmann , Peter Zijlstra , X86 ML , LKML , Linux-MM , Mathieu Desnoyers , linuxppc-dev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Andy Lutomirski's message of November 29, 2020 10:36 am: > On Sat, Nov 28, 2020 at 8:02 AM Nicholas Piggin wrote= : >> >> NOMMU systems could easily go without this and save a bit of code >> and the refcount atomics, because their mm switch is a no-op. I >> haven't flipped them over because haven't audited all arch code to >> convert over to using the _lazy_tlb refcounting. >> >> Signed-off-by: Nicholas Piggin >> --- >> arch/Kconfig | 11 +++++++ >> include/linux/sched/mm.h | 13 ++++++-- >> kernel/sched/core.c | 68 +++++++++++++++++++++++++++++----------- >> kernel/sched/sched.h | 4 ++- >> 4 files changed, 75 insertions(+), 21 deletions(-) >> >> diff --git a/arch/Kconfig b/arch/Kconfig >> index 56b6ccc0e32d..596bf589d74b 100644 >> --- a/arch/Kconfig >> +++ b/arch/Kconfig >> @@ -430,6 +430,17 @@ config ARCH_WANT_IRQS_OFF_ACTIVATE_MM >> irqs disabled over activate_mm. Architectures that do IPI base= d TLB >> shootdowns should enable this. >> >> +# Should make this depend on MMU, because there is little use for lazy = mm switching >> +# with NOMMU. Must audit NOMMU architecture code for lazy mm refcountin= g first. >> +config MMU_LAZY_TLB >> + def_bool y >> + help >> + Enable "lazy TLB" mmu context switching for kernel threads. >> + >> +config MMU_LAZY_TLB_REFCOUNT >> + def_bool y >> + depends on MMU_LAZY_TLB >> + >=20 > This could use some documentation as to what "no" means. Sure I can add a bit more. >=20 >> config ARCH_HAVE_NMI_SAFE_CMPXCHG >> bool >> >> diff --git a/include/linux/sched/mm.h b/include/linux/sched/mm.h >> index 7157c0f6fef8..bd0f27402d4b 100644 >> --- a/include/linux/sched/mm.h >> +++ b/include/linux/sched/mm.h >> @@ -51,12 +51,21 @@ static inline void mmdrop(struct mm_struct *mm) >> /* Helpers for lazy TLB mm refcounting */ >> static inline void mmgrab_lazy_tlb(struct mm_struct *mm) >> { >> - mmgrab(mm); >> + if (IS_ENABLED(CONFIG_MMU_LAZY_TLB_REFCOUNT)) >> + mmgrab(mm); >> } >> >> static inline void mmdrop_lazy_tlb(struct mm_struct *mm) >> { >> - mmdrop(mm); >> + if (IS_ENABLED(CONFIG_MMU_LAZY_TLB_REFCOUNT)) { >> + mmdrop(mm); >> + } else { >> + /* >> + * mmdrop_lazy_tlb must provide a full memory barrier, s= ee the >> + * membarrier comment finish_task_switch. >=20 > "membarrier comment in finish_task_switch()", perhaps? Sure. Thanks, Nick