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Mon, 18 Jan 2021 19:27:20 -0800 (PST) Received: from localhost ([124.170.13.62]) by smtp.gmail.com with ESMTPSA id b72sm16882132pfb.129.2021.01.18.19.27.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 18 Jan 2021 19:27:20 -0800 (PST) Date: Tue, 19 Jan 2021 13:27:15 +1000 From: Nicholas Piggin Subject: Re: [PATCH 1/4] KVM: PPC: Book3S HV: Remove support for running HPT guest on RPT host without mixed mode support To: Fabiano Rosas , kvm-ppc@vger.kernel.org References: <20210118062809.1430920-1-npiggin@gmail.com> <20210118062809.1430920-2-npiggin@gmail.com> <87czy1bsvz.fsf@linux.ibm.com> In-Reply-To: <87czy1bsvz.fsf@linux.ibm.com> MIME-Version: 1.0 Message-Id: <1611025782.s66bkxjtqz.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Fabiano Rosas's message of January 19, 2021 11:46 am: > Resending because the previous got spam-filtered: >=20 > Nicholas Piggin writes: >=20 >> This reverts much of commit c01015091a770 ("KVM: PPC: Book3S HV: Run HPT >> guests on POWER9 radix hosts"), which was required to run HPT guests on >> RPT hosts on early POWER9 CPUs without support for "mixed mode", which >> meant the host could not run with MMU on while guests were running. >> >> This code has some corner case bugs, e.g., when the guest hits a machine >> check or HMI the primary locks up waiting for secondaries to switch LPCR >> to host, which they never do. This could all be fixed in software, but >> most CPUs in production have mixed mode support, and those that don't >> are believed to be all in installations that don't use this capability. >> So simplify things and remove support. >=20 > With this patch in a DD2.1 machine + indep_threads_mode=3DN + > disable_radix, QEMU aborts and dumps registers, is that intended? Yes. That configuration is hanging handling MCEs in the guest with some=20 threads waiting forever to synchronize. Paul suggested it was never a supported configuration so we might just remove it. > Could we use the 'no_mixing_hpt_and_radix' logic in check_extension to > advertise only KVM_CAP_PPC_MMU_RADIX to the guest via OV5 so it doesn't > try to run hash? >=20 > For instance, if I hack QEMU's 'spapr_dt_ov5_platform_support' from > OV5_MMU_BOTH to OV5_MMU_RADIX_300 then it boots succesfuly, but the > guest turns into radix, due to this code in prom_init: >=20 > prom_parse_mmu_model: >=20 > case OV5_FEAT(OV5_MMU_RADIX): /* Only Radix */ > prom_debug("MMU - radix only\n"); > if (prom_radix_disable) { > /* > * If we __have__ to do radix, we're better off ignoring > * the command line rather than not booting. > */ > prom_printf("WARNING: Ignoring cmdline option disable_radix\n"); > } > support->radix_mmu =3D true; > break; >=20 > It seems we could explicitly say that the host does not support hash and > that would align with the above code. I'm not sure, sounds like you could, on the other hand these aborts seem=20 like the prefered failure mode for these kinds of configuration issues,=20 I don't know what the policy is, is reverting back to radix acceptable? Thanks, Nick