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[60.242.11.44]) by smtp.gmail.com with ESMTPSA id h12sm11407986pgs.7.2021.02.05.18.46.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Feb 2021 18:46:07 -0800 (PST) Date: Sat, 06 Feb 2021 12:46:01 +1000 From: Nicholas Piggin Subject: Re: [PATCH v7 39/42] powerpc: move NMI entry/exit code into wrapper To: linuxppc-dev@lists.ozlabs.org, Michael Ellerman References: <20210130130852.2952424-1-npiggin@gmail.com> <20210130130852.2952424-40-npiggin@gmail.com> <87k0rop29e.fsf@mpe.ellerman.id.au> <1612438069.44myr3nzfs.astroid@bobo.none> <875z36ozkq.fsf@mpe.ellerman.id.au> In-Reply-To: <875z36ozkq.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Message-Id: <1612579435.unncvipdys.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Athira Rajeev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Michael Ellerman's message of February 6, 2021 9:38 am: > Nicholas Piggin writes: >> Excerpts from Michael Ellerman's message of February 4, 2021 8:15 pm: >>> Nicholas Piggin writes: >>>> This moves the common NMI entry and exit code into the interrupt handl= er >>>> wrappers. >>>> >>>> This changes the behaviour of soft-NMI (watchdog) and HMI interrupts, = and >>>> also MCE interrupts on 64e, by adding missing parts of the NMI entry t= o >>>> them. >>>> >>>> Signed-off-by: Nicholas Piggin >>>> --- >>>> arch/powerpc/include/asm/interrupt.h | 28 ++++++++++++++++++++++ >>>> arch/powerpc/kernel/mce.c | 11 --------- >>>> arch/powerpc/kernel/traps.c | 35 +++++----------------------= - >>>> arch/powerpc/kernel/watchdog.c | 10 ++++---- >>>> 4 files changed, 38 insertions(+), 46 deletions(-) >>>=20 >>> This is unhappy when injecting SLB multi-hits: >>>=20 >>> root@p86-2:~# echo PPC_SLB_MULTIHIT > /sys/kernel/debug/provoke-crash= /DIRECT >>> [ 312.496026][ T1344] kernel BUG at arch/powerpc/include/asm/interru= pt.h:152! >>> [ 312.496037][ T1344] Oops: Exception in kernel mode, sig: 5 [#1] >>> [ 312.496045][ T1344] LE PAGE_SIZE=3D64K MMU=3DHash SMP NR_CPUS=3D20= 48 NUMA pSeries >> >> pseries hash. Blast! >=20 > The worst kind. >=20 >>> 147 static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs,= struct interrupt_nmi_state *state) >>> 148 { >>> 149 if (!IS_ENABLED(CONFIG_PPC_BOOK3S_64) || >>> 150 !firmware_has_feature(FW_FEATURE_LPAR) || >>> 151 radix_enabled() || (mfmsr() & MSR_DR)) >>> 152 nmi_exit(); >>>=20 >>>=20 >>> So presumably it's: >>>=20 >>> #define __nmi_exit() \ >>> do { \ >>> BUG_ON(!in_nmi()); \ >> >> Yes that would be it, pseries machine check enables MMU half way through= =20 >> so only one side of this triggers. >> >> The MSR_DR check is supposed to catch the other NMIs that run with MMU=20 >> on (perf, watchdog, etc). Suppose it could test TRAP(regs) explicitly >> although I wonder if we should also do this to keep things balanced >=20 > Yeah I think I like that. I'll give it a test. The msr restore? Looking closer, pseries_machine_check_realmode may have expected mce_handle_error to enable the MMU, because irq_work_queue uses some per-cpu variables I think. So the code might have to be rearranged a bit more than the patch below. Thanks, Nick >=20 > cheers >=20 >=20 >> diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platfor= ms/pseries/ras.c >> index 149cec2212e6..f57ca0c570be 100644 >> --- a/arch/powerpc/platforms/pseries/ras.c >> +++ b/arch/powerpc/platforms/pseries/ras.c >> @@ -719,6 +719,7 @@ static int mce_handle_err_virtmode(struct pt_regs *r= egs, >> =20 >> static int mce_handle_error(struct pt_regs *regs, struct rtas_error_log= *errp) >> { >> + unsigned long msr; >> struct pseries_errorlog *pseries_log; >> struct pseries_mc_errorlog *mce_log =3D NULL; >> int disposition =3D rtas_error_disposition(errp); >> @@ -747,9 +748,12 @@ static int mce_handle_error(struct pt_regs *regs, s= truct rtas_error_log *errp) >> * SLB multihit is done by now. >> */ >> out: >> - mtmsr(mfmsr() | MSR_IR | MSR_DR); >> + msr =3D mfmsr(); >> + mtmsr(msr | MSR_IR | MSR_DR); >> disposition =3D mce_handle_err_virtmode(regs, errp, mce_log, >> disposition); >> + mtmsr(msr); >> + >> return disposition; >> } >> =20 >=20