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[60.242.11.44]) by smtp.gmail.com with ESMTPSA id c188sm216726pfa.98.2021.02.07.04.58.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Feb 2021 04:58:15 -0800 (PST) Date: Sun, 07 Feb 2021 22:58:10 +1000 From: Nicholas Piggin Subject: Re: [PATCH v7 42/42] powerpc/64s: power4 nap fixup in C To: linuxppc-dev@lists.ozlabs.org, Michael Ellerman References: <20210130130852.2952424-1-npiggin@gmail.com> <20210130130852.2952424-43-npiggin@gmail.com> <878s86dals.fsf@mpe.ellerman.id.au> In-Reply-To: <878s86dals.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Message-Id: <1612702622.n8vaboy2dx.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Athira Rajeev Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Michael Ellerman's message of February 2, 2021 8:31 pm: > Nicholas Piggin writes: >> There is no need for this to be in asm, use the new intrrupt entry wrapp= er. >> >> Signed-off-by: Nicholas Piggin >> --- >> arch/powerpc/include/asm/interrupt.h | 15 +++++++++ >> arch/powerpc/include/asm/processor.h | 1 + >> arch/powerpc/include/asm/thread_info.h | 6 ++++ >> arch/powerpc/kernel/exceptions-64s.S | 45 -------------------------- >> arch/powerpc/kernel/idle_book3s.S | 4 +++ >> 5 files changed, 26 insertions(+), 45 deletions(-) >=20 > Something in here is making my G5 not boot. >=20 > I don't know what the problem is because that machine is in the office, > and I am not, and it has no serial console. >=20 > I tried turning on pstore but it doesn't record anything :/ Here is an incremental patch (hopefully) should fix it. Should be folded with this one. Thanks, Nick --- powerpc/64s: nap_adjust_return fix This is a fix for patch "powerpc/64s: power4 nap fixup in C". Non-maskable interrupts should not create any exit work, so there should be no reason to come out of idle. So take the nap fixup out of NMIs. The problem with having them here is that an interrupt can come in and then get interrupted by an NMI, the NMI will then set its return to the idle wakeup and never complete the regular interrupt handling. Before the "powerpc/64s: power4 nap fixup in C" patch, this wouldn't occur because the true NMIs didn't call FIXUP_NAP, and the other interrupts would call it before running their handler, so they would not have a chance to call may_hard_irq_enable and allow soft-NMIs (watchdog, perf) to come through. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/interrupt.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/as= m/interrupt.h index 25f2420b1965..afdf4aba2e6b 100644 --- a/arch/powerpc/include/asm/interrupt.h +++ b/arch/powerpc/include/asm/interrupt.h @@ -12,6 +12,7 @@ static inline void nap_adjust_return(struct pt_regs *regs= ) { #ifdef CONFIG_PPC_970_NAP if (unlikely(test_thread_local_flags(_TLF_NAPPING))) { + /* Can avoid a test-and-clear because NMIs do not call this */ clear_thread_local_flags(_TLF_NAPPING); regs->nip =3D (unsigned long)power4_idle_nap_return; } @@ -164,7 +165,10 @@ static inline void interrupt_nmi_exit_prepare(struct p= t_regs *regs, struct inter radix_enabled() || (mfmsr() & MSR_DR)) nmi_exit(); =20 - nap_adjust_return(regs); + /* + * nmi does not call nap_adjust_return because nmi should not create + * new work to do (must use irq_work for that). + */ =20 #ifdef CONFIG_PPC64 if (TRAP(regs) !=3D 0x900 && TRAP(regs) !=3D 0xf00 && TRAP(regs) !=3D 0x2= 60) --=20 2.23.0