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[58.6.239.121]) by smtp.gmail.com with ESMTPSA id y29sm15767379pfp.206.2021.03.16.00.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 16 Mar 2021 00:25:40 -0700 (PDT) Date: Tue, 16 Mar 2021 17:25:34 +1000 From: Nicholas Piggin Subject: Re: [PATCH 03/10] powerpc/64e/interrupt: use new interrupt return To: Christophe Leroy , linuxppc-dev@lists.ozlabs.org References: <20210315031716.3940350-1-npiggin@gmail.com> <20210315031716.3940350-4-npiggin@gmail.com> <1615878222.rk6eq5hjpl.astroid@bobo.none> In-Reply-To: <1615878222.rk6eq5hjpl.astroid@bobo.none> MIME-Version: 1.0 Message-Id: <1615879421.ckimzb9u3c.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Scott Wood Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Nicholas Piggin's message of March 16, 2021 5:04 pm: > Excerpts from Christophe Leroy's message of March 15, 2021 11:30 pm: >>=20 >>=20 >> Le 15/03/2021 =C3=A0 04:17, Nicholas Piggin a =C3=A9crit=C2=A0: >>> Update the new C and asm interrupt return code to account for 64e >>> specifics, switch over to use it. >>>=20 >>> The now-unused old ret_from_except code, that was moved to 64e after th= e >>> 64s conversion, is removed. >>>=20 >>> Signed-off-by: Nicholas Piggin >>> --- >>> arch/powerpc/include/asm/asm-prototypes.h | 2 - >>> arch/powerpc/kernel/entry_64.S | 9 +- >>> arch/powerpc/kernel/exceptions-64e.S | 321 ++-------------------= - >>> arch/powerpc/kernel/interrupt.c | 27 +- >>> arch/powerpc/kernel/irq.c | 76 ----- >>> 5 files changed, 56 insertions(+), 379 deletions(-) >>>=20 >>> diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/inte= rrupt.c >>> index fbabb49888d3..ae7b058b2970 100644 >>> --- a/arch/powerpc/kernel/interrupt.c >>> +++ b/arch/powerpc/kernel/interrupt.c >>> @@ -235,6 +235,10 @@ static notrace void booke_load_dbcr0(void) >>> #endif >>> } >>> =20 >>> +/* temporary hack for context tracking, removed in later patch */ >>> +#include >>> +asmlinkage __visible void __sched schedule_user(void); >>> + >>> /* >>> * This should be called after a syscall returns, with r3 the return = value >>> * from the syscall. If this function returns non-zero, the system ca= ll >>> @@ -292,7 +296,11 @@ notrace unsigned long syscall_exit_prepare(unsigne= d long r3, >>> while (unlikely(ti_flags & (_TIF_USER_WORK_MASK & ~_TIF_RESTORE_TM))= ) { >>> local_irq_enable(); >>> if (ti_flags & _TIF_NEED_RESCHED) { >>> +#ifdef CONFIG_PPC_BOOK3E_64 >>> + schedule_user(); >>> +#else >>> schedule(); >>> +#endif >>> } else { >>> /* >>> * SIGPENDING must restore signal handler function >>> @@ -360,7 +368,6 @@ notrace unsigned long syscall_exit_prepare(unsigned= long r3, >>> return ret; >>> } >>> =20 >>> -#ifndef CONFIG_PPC_BOOK3E_64 /* BOOK3E not yet using this */ >>> notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *reg= s, unsigned long msr) >>> { >>> unsigned long ti_flags; >>> @@ -372,7 +379,9 @@ notrace unsigned long interrupt_exit_user_prepare(s= truct pt_regs *regs, unsigned >>> BUG_ON(!(regs->msr & MSR_PR)); >>> BUG_ON(!FULL_REGS(regs)); >>> BUG_ON(arch_irq_disabled_regs(regs)); >>> +#ifdef CONFIG_PPC_BOOK3S_64 >>=20 >> Shouldn't this go away in patch 6 as well ? >> Or is that needed at all ? In syscall_exit_prepare() it is not ifdefed . >=20 > Hmm, not sure. I'll take a look. It probably shouldn't be ifdefed at all=20 > but definitely by the end it should run without warning. Oh I got confused and thought that was the syscall exit. Interrupt exit=20 has to keep this until patch 6 because 64e context tracking does=20 everything in interrupt wrappers, so by the time we get here it will already be set to CONTEXT_USER. Thanks, Nick