From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85EF1C433ED for ; Wed, 31 Mar 2021 14:34:58 +0000 (UTC) Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 1DCFA601FE for ; Wed, 31 Mar 2021 14:34:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1DCFA601FE Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4F9TNw5H8Nz3dbx for ; Thu, 1 Apr 2021 01:34:56 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=MuD7utNv; dkim-atps=neutral Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kernel.org (client-ip=198.145.29.99; helo=mail.kernel.org; envelope-from=guoren@kernel.org; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256 header.s=k20201202 header.b=MuD7utNv; dkim-atps=neutral Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4F9TLK4dMSz3bq7 for ; Thu, 1 Apr 2021 01:32:41 +1100 (AEDT) Received: by mail.kernel.org (Postfix) with ESMTPSA id 717C960FF1; Wed, 31 Mar 2021 14:32:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1617201160; bh=O2KxmIPB+fHLZecH69jIXhtq++wb564lj/icyjeUAfo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MuD7utNvxc71QnlLEo6eyoz8UG0sDZiPBtJt3hag6/s4X/dkfRLDhQ5OqJXJFt+j6 9qXx33FPUmx3G35TT6KpggWZk8CzgnRPRkmBuxb41XLDNB+DLsaZLfn7okWhGAP/fd XIcnJzsaYKQDC+07SeSrpysX9+39Fr229UOr1ud5VmRf3ZrA9MM7B1eQrw7Q9Xqnw1 QLPvIZ3ogIZFd7LK13OYk2vgisiZmroVX6LOouaaODc0ya16hQUPWrUf3ielzPGQMu g+xqdXQe1Wujk2SS7zfx9ORiUOU/DX/5BKyLBaTlndIEiV02In4jpH7PAyTKRovgEx KBwMY3BPTvyjg== From: guoren@kernel.org To: guoren@kernel.org Subject: [PATCH v6 7/9] sparc: qspinlock: Add ARCH_USE_QUEUED_SPINLOCKS_XCHG32 Date: Wed, 31 Mar 2021 14:30:38 +0000 Message-Id: <1617201040-83905-8-git-send-email-guoren@kernel.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1617201040-83905-1-git-send-email-guoren@kernel.org> References: <1617201040-83905-1-git-send-email-guoren@kernel.org> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, linux-xtensa@linux-xtensa.org, Guo Ren , Arnd Bergmann , Rob Gardner , linux-kernel@vger.kernel.org, linux-csky@vger.kernel.org, openrisc@lists.librecores.org, sparclinux@vger.kernel.org, linux-riscv@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, "David S . Miller" Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Guo Ren We don't have native hw xchg16 instruction, so let qspinlock generic code to deal with it. Using the full-word atomic xchg instructions implement xchg16 has the semantic risk for atomic operations. This patch cancels the dependency of on qspinlock generic code on architecture's xchg16. Signed-off-by: Guo Ren Cc: Arnd Bergmann Cc: David S. Miller Cc: Rob Gardner --- arch/sparc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig index 164a5254c91c..1079fe3f058c 100644 --- a/arch/sparc/Kconfig +++ b/arch/sparc/Kconfig @@ -91,6 +91,7 @@ config SPARC64 select HAVE_REGS_AND_STACK_ACCESS_API select ARCH_USE_QUEUED_RWLOCKS select ARCH_USE_QUEUED_SPINLOCKS + select ARCH_USE_QUEUED_SPINLOCKS_XCHG32 select GENERIC_TIME_VSYSCALL select ARCH_CLOCKSOURCE_DATA select ARCH_HAS_PTE_SPECIAL -- 2.17.1