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[60.242.147.73]) by smtp.gmail.com with ESMTPSA id s123sm9246118pfb.78.2021.06.18.23.02.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Jun 2021 23:02:27 -0700 (PDT) Date: Sat, 19 Jun 2021 16:02:21 +1000 From: Nicholas Piggin Subject: Re: [PATCH 8/8] membarrier: Rewrite sync_core_before_usermode() and improve documentation To: Andy Lutomirski , Mathieu Desnoyers References: <07a8b963002cb955b7516e61bad19514a3acaa82.1623813516.git.luto@kernel.org> <827549827.10547.1623941277868.JavaMail.zimbra@efficios.com> <26196903-4aee-33c4-bed8-8bf8c7b46793@kernel.org> <593983567.12619.1624033908849.JavaMail.zimbra@efficios.com> <1d617df2-57fa-4953-9c75-6de3909a6f14@www.fastmail.com> <639092151.13266.1624046981084.JavaMail.zimbra@efficios.com> In-Reply-To: <639092151.13266.1624046981084.JavaMail.zimbra@efficios.com> MIME-Version: 1.0 Message-Id: <1624080924.z61zvzi4cq.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Will Deacon , linux-mm , Peter Zijlstra , x86 , linux-kernel , stable , Dave Hansen , Paul Mackerras , Catalin Marinas , Andrew Morton , linuxppc-dev , linux-arm-kernel Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Mathieu Desnoyers's message of June 19, 2021 6:09 am: > ----- On Jun 18, 2021, at 3:58 PM, Andy Lutomirski luto@kernel.org wrote: >=20 >> On Fri, Jun 18, 2021, at 9:31 AM, Mathieu Desnoyers wrote: >>> ----- On Jun 17, 2021, at 8:12 PM, Andy Lutomirski luto@kernel.org wrot= e: >>>=20 >>> > On 6/17/21 7:47 AM, Mathieu Desnoyers wrote: >>> >=20 >>> >> Please change back this #ifndef / #else / #endif within function for >>> >>=20 >>> >> if (!IS_ENABLED(CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE)) { >>> >> ... >>> >> } else { >>> >> ... >>> >> } >>> >>=20 >>> >> I don't think mixing up preprocessor and code logic makes it more re= adable. >>> >=20 >>> > I agree, but I don't know how to make the result work well. >>> > membarrier_sync_core_before_usermode() isn't defined in the !IS_ENABL= ED >>> > case, so either I need to fake up a definition or use #ifdef. >>> >=20 >>> > If I faked up a definition, I would want to assert, at build time, th= at >>> > it isn't called. I don't think we can do: >>> >=20 >>> > static void membarrier_sync_core_before_usermode() >>> > { >>> > BUILD_BUG_IF_REACHABLE(); >>> > } >>>=20 >>> Let's look at the context here: >>>=20 >>> static void ipi_sync_core(void *info) >>> { >>> [....] >>> membarrier_sync_core_before_usermode() >>> } >>>=20 >>> ^ this can be within #ifdef / #endif >>>=20 >>> static int membarrier_private_expedited(int flags, int cpu_id) >>> [...] >>> if (!IS_ENABLED(CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE)) >>> return -EINVAL; >>> if (!(atomic_read(&mm->membarrier_state) & >>> MEMBARRIER_STATE_PRIVATE_EXPEDITED_SYNC_CORE_READ= Y)) >>> return -EPERM; >>> ipi_func =3D ipi_sync_core; >>>=20 >>> All we need to make the line above work is to define an empty ipi_sync_= core >>> function in the #else case after the ipi_sync_core() function definitio= n. >>>=20 >>> Or am I missing your point ? >>=20 >> Maybe? >>=20 >> My objection is that an empty ipi_sync_core is a lie =E2=80=94 it doesn= =E2=80=99t sync the core. >> I would be fine with that if I could have the compiler statically verify= that >> it=E2=80=99s not called, but I=E2=80=99m uncomfortable having it there i= f the implementation is >> actively incorrect. >=20 > I see. Another approach would be to implement a "setter" function to popu= late > "ipi_func". That setter function would return -EINVAL in its #ifndef CONF= IG_ARCH_HAS_MEMBARRIER_SYNC_CORE > implementation. I still don't get the problem with my suggestion. Sure the=20 ipi is a "lie", but it doesn't get used. That's how a lot of ifdef folding works out. E.g., diff --git a/kernel/sched/membarrier.c b/kernel/sched/membarrier.c index b5add64d9698..54cb32d064af 100644 --- a/kernel/sched/membarrier.c +++ b/kernel/sched/membarrier.c @@ -5,6 +5,15 @@ * membarrier system call */ #include "sched.h" +#ifdef CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE +#include +#else +static inline void membarrier_sync_core_before_usermode(void) +{ + compiletime_assert(0, "architecture does not implement membarrier_sync_co= re_before_usermode"); +} + +#endif =20 /* * For documentation purposes, here are some membarrier ordering