How to test the DDR memory with burst visit mode?

How to test the DDR memory with burst visit mode?

[郭劲]

Hi,friends,
   I designed my MPC8360E board with 1GBytes DDR-1 memory, I built two demo
boards, one is 533/266/400, the other is 660/330/400. The lower frequancy board is
no problem for our program, but the higher frequency board is always problem about
the data transmit on ethernet. 
   I want to test 1GBytes DDR-1 memory, I want to know whether or not the DDR is
stable and accuracy. Could you tell me a simple way that test my DDR memory? 

Re: How to test the DDR memory with burst visit mode?

[David Hawkins]

> I designed my MPC8360E board with 1GBytes DDR-1 memory, I built two demo
> boards, one is 533/266/400, the other is 660/330/400. The lower frequancy board is
> no problem for our program, but the higher frequency board is always problem about
> the data transmit on ethernet. 
> I want to test 1GBytes DDR-1 memory, I want to know whether or not the DDR is
> stable and accuracy. Could you tell me a simple way that test my DDR memory? 

I use MPC8349E, so the following should be similar.

1) If your board is a PCI agent.

    You can run code on a host CPU that can view the MPC8360 board
    over the PCI bus.

    Setup the MPC8360 to come out of reset with the core held
    in reset.

    Program the DDR controller from the host CPU.

    Program the DMA controller to move data to/from the board DDR
    from/to the host memory (PCI transactions).

    Sweep the DDR MCK and DQS clock skew registers across their
    ranges and check for memory errors.

    You should get two or three settings that work ok.

2) If your board is a PCI host, then its a bit trickier, as you
    ideally want to generate burst traffic to test the DDR controller,
    and since you need to reprogram the DDR controller, you can not
    be running code there, eg. U-Boot.

    If the MPC8360 has an I/O Sequencer (IOS) as on the MPC8349E, then
    I think you should be able to write some code that DMAs from
    Flash to DDR. The IOS should copy the data first to its FIFO,
    and then to the DDR, so it should generate a burst.

    If you have a BDI2000, you should be able to manually program
    the DDR controller and the DMA controller. If you don't, just
    write some simple code that runs from the startup vector,
    eg. copy the contents of start.S up until the stack-in-dcache
    trick, and then you can write some C-code.

Hope that helps.
Cheers,
Dave

Re: How to test the DDR memory with burst visit mode?

[Frank]

--- ¹ù¾¢ <guojin02@tsinghua.org.cn> wrote:

> Hi,friends,
>    I designed my MPC8360E board with 1GBytes DDR-1 memory, I
> built two demo
> boards, one is 533/266/400, the other is 660/330/400. The
> lower frequancy board is
> no problem for our program, but the higher frequency board is
> always problem about
> the data transmit on ethernet. 
>    I want to test 1GBytes DDR-1 memory, I want to know whether
> or not the DDR is
> stable and accuracy. Could you tell me a simple way that test
> my DDR memory? 
> 
Boot the kernel and run something like stress from LTP (Linux
Test project). I guarantee you if there is any instability it
will show up...