From: Qing Wang <wangqing@vivo.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Michael Ellerman <mpe@ellerman.id.au>,
Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
x86@kernel.org, "H. Peter Anvin" <hpa@zytor.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Peter Zijlstra <peterz@infradead.org>,
Juri Lelli <juri.lelli@redhat.com>,
Vincent Guittot <vincent.guittot@linaro.org>,
Dietmar Eggemann <dietmar.eggemann@arm.com>,
Steven Rostedt <rostedt@goodmis.org>,
Ben Segall <bsegall@google.com>, Mel Gorman <mgorman@suse.de>,
Daniel Bristot de Oliveira <bristot@redhat.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org
Cc: Wang Qing <wangqing@vivo.com>
Subject: [PATCH 2/3] arch_topology: support for describing cache topology from DT
Date: Tue, 29 Mar 2022 02:15:20 -0700 [thread overview]
Message-ID: <1648545322-14531-3-git-send-email-wangqing@vivo.com> (raw)
In-Reply-To: <1648545322-14531-1-git-send-email-wangqing@vivo.com>
From: Wang Qing <wangqing@vivo.com>
When ACPI is not enabled, we can get cache topolopy from DT like:
* cpu0: cpu@000 {
* next-level-cache = <&L2_1>;
* L2_1: l2-cache {
* compatible = "cache";
* next-level-cache = <&L3_1>;
* };
* L3_1: l3-cache {
* compatible = "cache";
* };
* };
*
* cpu1: cpu@001 {
* next-level-cache = <&L2_1>;
* cpu-idle-states = <&clusteroff_l &mcusysoff
* &system_mem &system_pll &system_bus
* &s2idle>;
* };
* cpu2: cpu@002 {
* L2_2: l2-cache {
* compatible = "cache";
* next-level-cache = <&L3_1>;
* };
* };
*
* cpu3: cpu@003 {
* next-level-cache = <&L2_2>;
* };
cache_topology hold the pointer describing "next-level-cache",
it can describe the cache topology of every level.
Signed-off-by: Wang Qing <wangqing@vivo.com>
---
drivers/base/arch_topology.c | 89 ++++++++++++++++++++++++++++++++++++++++++-
include/linux/arch_topology.h | 4 ++
2 files changed, 92 insertions(+), 1 deletion(-)
diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c
index 1d6636e..41e0301
--- a/drivers/base/arch_topology.c
+++ b/drivers/base/arch_topology.c
@@ -647,6 +647,92 @@ static int __init parse_dt_topology(void)
}
#endif
+
+/*
+ * cpu cache topology table
+ */
+#define MAX_CACHE_LEVEL 7
+struct device_node *cache_topology[NR_CPUS][MAX_CACHE_LEVEL];
+
+void init_cpu_cache_topology(void)
+{
+ struct device_node *node_cpu, *node_cache;
+ int cpu;
+ int level = 0;
+
+ for_each_possible_cpu(cpu) {
+ node_cpu = of_get_cpu_node(cpu, NULL);
+ if (!node_cpu)
+ continue;
+
+ level = 0;
+ node_cache = node_cpu;
+ while (level < MAX_CACHE_LEVEL) {
+ node_cache = of_parse_phandle(node_cache, "next-level-cache", 0);
+ if (!node_cache)
+ break;
+
+ cache_topology[cpu][level++] = node_cache;
+ }
+ of_node_put(node_cpu);
+ }
+}
+
+/*
+ * private means only shared within cpu_mask
+ * Returns -1 if not described int DT.
+ */
+int cpu_share_private_cache(const struct cpumask *cpu_mask)
+{
+ int cache_level, cpu_id;
+ struct cpumask cache_mask;
+ int cpu = cpumask_first(cpu_mask);
+
+ for (cache_level = 0; cache_level < MAX_CACHE_LEVEL; cache_level++) {
+ if (!cache_topology[cpu][cache_level])
+ return -1;
+
+ cpumask_clear(&cache_mask);
+ for (cpu_id = 0; cpu_id < NR_CPUS; cpu_id++) {
+ if (cache_topology[cpu][cache_level] == cache_topology[cpu_id][cache_level])
+ cpumask_set_cpu(cpu_id, &cache_mask);
+ }
+
+ if (cpumask_equal(cpu_mask, &cache_mask))
+ return 1;
+ }
+
+ return 0;
+}
+
+bool cpu_share_llc(int cpu1, int cpu2)
+{
+ int cache_level;
+
+ for (cache_level = MAX_CACHE_LEVEL - 1; cache_level > 0; cache_level--) {
+ if (!cache_topology[cpu1][cache_level])
+ continue;
+
+ if (cache_topology[cpu1][cache_level] == cache_topology[cpu2][cache_level])
+ return true;
+
+ return false;
+ }
+
+ return false;
+}
+
+bool cpu_share_l2c(int cpu1, int cpu2)
+{
+ if (!cache_topology[cpu1][0])
+ return false;
+
+ if (cache_topology[cpu1][0] == cache_topology[cpu2][0])
+ return true;
+
+ return false;
+}
+
/*
* cpu topology table
*/
@@ -684,7 +770,8 @@ void update_siblings_masks(unsigned int cpuid)
for_each_online_cpu(cpu) {
cpu_topo = &cpu_topology[cpu];
- if (cpuid_topo->llc_id == cpu_topo->llc_id) {
+ if ((cpuid_topo->llc_id != -1 && cpuid_topo->llc_id == cpu_topo->llc_id)
+ || (cpuid_topo->llc_id == -1 && cpu_share_llc(cpu, cpuid))) {
cpumask_set_cpu(cpu, &cpuid_topo->llc_sibling);
cpumask_set_cpu(cpuid, &cpu_topo->llc_sibling);
}
diff --git a/include/linux/arch_topology.h b/include/linux/arch_topology.h
index 58cbe18..a402ff6
--- a/include/linux/arch_topology.h
+++ b/include/linux/arch_topology.h
@@ -86,6 +86,10 @@ extern struct cpu_topology cpu_topology[NR_CPUS];
#define topology_cluster_cpumask(cpu) (&cpu_topology[cpu].cluster_sibling)
#define topology_llc_cpumask(cpu) (&cpu_topology[cpu].llc_sibling)
void init_cpu_topology(void);
+void init_cpu_cache_topology(void);
+int cpu_share_private_cache(const struct cpumask *cpu_mask);
+bool cpu_share_llc(int cpu1, int cpu2);
+bool cpu_share_l2c(int cpu1, int cpu2);
void store_cpu_topology(unsigned int cpuid);
const struct cpumask *cpu_coregroup_mask(int cpu);
const struct cpumask *cpu_clustergroup_mask(int cpu);
--
2.7.4
next prev parent reply other threads:[~2022-03-29 9:18 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-29 9:15 [PATCH 0/3] support for describing cache topology from DT Qing Wang
2022-03-29 9:15 ` [PATCH 1/3] sched: topology: add input parameter for sched_domain_flags_f() Qing Wang
2022-03-29 9:23 ` Peter Zijlstra
2022-03-29 9:15 ` Qing Wang [this message]
2022-03-29 9:15 ` [PATCH 3/3] arm64: add arm64 default topology Qing Wang
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1648545322-14531-3-git-send-email-wangqing@vivo.com \
--to=wangqing@vivo.com \
--cc=benh@kernel.crashing.org \
--cc=bp@alien8.de \
--cc=bristot@redhat.com \
--cc=bsegall@google.com \
--cc=catalin.marinas@arm.com \
--cc=dietmar.eggemann@arm.com \
--cc=gregkh@linuxfoundation.org \
--cc=hpa@zytor.com \
--cc=juri.lelli@redhat.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mgorman@suse.de \
--cc=mingo@redhat.com \
--cc=mpe@ellerman.id.au \
--cc=paulus@samba.org \
--cc=peterz@infradead.org \
--cc=rafael@kernel.org \
--cc=rostedt@goodmis.org \
--cc=sudeep.holla@arm.com \
--cc=tglx@linutronix.de \
--cc=vincent.guittot@linaro.org \
--cc=will@kernel.org \
--cc=x86@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox