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[193.116.203.247]) by smtp.gmail.com with ESMTPSA id md14-20020a17090b23ce00b001ef7bcb7e61sm597654pjb.47.2022.07.12.22.41.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 Jul 2022 22:42:00 -0700 (PDT) Date: Wed, 13 Jul 2022 15:41:54 +1000 From: Nicholas Piggin Subject: Re: [PATCH 1/2] powerpc/kvm: Move pmu code in kvm folder to separate file for power9 and later platforms To: Kajol Jain , linuxppc-dev@lists.ozlabs.org, mpe@ellerman.id.au References: <20220711034927.213192-1-kjain@linux.ibm.com> In-Reply-To: <20220711034927.213192-1-kjain@linux.ibm.com> MIME-Version: 1.0 Message-Id: <1657690385.27p62dp0u2.astroid@bobo.none> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: atrajeev@linux.vnet.ibm.com, maddy@linux.ibm.com, disgoel@linux.vnet.ibm.com, rnsastry@linux.ibm.com Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Excerpts from Kajol Jain's message of July 11, 2022 1:49 pm: > File book3s_hv_p9_entry.c in powerpc/kvm folder consists of functions > like freeze_pmu, switch_pmu_to_guest and switch_pmu_to_host which are > specific to Performance Monitoring Unit(PMU) for power9 and later > platforms. >=20 > For better maintenance, moving pmu related code from > book3s_hv_p9_entry.c to a new file called book3s_hv_p9_perf.c, > without any logic change. > Also make corresponding changes in the Makefile to include > book3s_hv_p9_perf.c during compilation. > + > + if (ppc_get_pmu_inuse()) { > + mtspr(SPRN_PMC1, host_os_sprs->pmc1); > + mtspr(SPRN_PMC2, host_os_sprs->pmc2); > + mtspr(SPRN_PMC3, host_os_sprs->pmc3); > + mtspr(SPRN_PMC4, host_os_sprs->pmc4); > + mtspr(SPRN_PMC5, host_os_sprs->pmc5); > + mtspr(SPRN_PMC6, host_os_sprs->pmc6); > + mtspr(SPRN_MMCR1, host_os_sprs->mmcr1); > + mtspr(SPRN_MMCR2, host_os_sprs->mmcr2); > + mtspr(SPRN_SDAR, host_os_sprs->sdar); > + mtspr(SPRN_SIAR, host_os_sprs->siar); > + mtspr(SPRN_SIER, host_os_sprs->sier1); > + > + if (cpu_has_feature(CPU_FTR_ARCH_31)) { > + mtspr(SPRN_MMCR3, host_os_sprs->mmcr3); > + mtspr(SPRN_SIER2, host_os_sprs->sier2); > + mtspr(SPRN_SIER3, host_os_sprs->sier3); > + } > + > + /* Set MMCRA then MMCR0 last */ > + mtspr(SPRN_MMCRA, host_os_sprs->mmcra); > + mtspr(SPRN_MMCR0, host_os_sprs->mmcr0); > + isync(); > + } > +} > +EXPORT_SYMBOL_GPL(switch_pmu_to_host); >=20 I'm still thinking these parts of the code in particular that do the=20 host PMU save/restore could be handled by calls into perf subsystem. In=20 some cases it doesn't need to save SPRs because it can recreate them or=20 is not using them. Maybe it's not so simple. Either way, I'm fine with this move to stat with. Reviewed-by: Nicholas Piggin