linuxppc-dev.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [more info - please help!] MPC7455 DMA buffer strangeness
@ 2004-07-05 16:15 Oliver Korpilla
  2004-07-05 23:44 ` Paul Mackerras
  0 siblings, 1 reply; 2+ messages in thread
From: Oliver Korpilla @ 2004-07-05 16:15 UTC (permalink / raw)
  To: okorpil; +Cc: linuxppc-embedded


I checked my Page Table Entries (PTEs) for the MPC7455 and MPC8240 after the
remap_page_range() took place.

Except for the RPN part (the physical address of the page) the PTEs match,
ending with the last 11 Bits (flags as in arch/ppc/mm/pgtable.h):

Kernel space: 0x581
User   space: 0x72D

(for user space this does mean - from least significant to most significant:
Page present: 	no,
Hashed PTE: 	yes,
User mode: 	yes,
Guarded: 	yes,
Coherent: 	no,
Inihibited: 	yes,
Write-Through:	no,
Changed:	no,
Referenced:	yes,
Exec:		yes,
Read-Write:	yes.)

This does look correct for my application. But it does yield different results
on the two processors, while both seem to definitely match the same physical
address (the 1st 21 bits do match in the Linux PTEs).

How are these Linux PTEs mapped to the MMU PTEs (64 bit wide descriptors)?

The "Programming Environments Manual For 32-Bit Implementations of the PowerPC
Architecture", the MPC603e and MPC7450 reference manuals depict a completely
different format, so how and where are these converted? (Hopefully not in
assembler! ;) )

I'm so confused by this! It doesn't seem logical that I cannot access those
buffers correctly!

Thanks in advance,
Oliver Korpilla

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [more info - please help!] MPC7455 DMA buffer strangeness
  2004-07-05 16:15 [more info - please help!] MPC7455 DMA buffer strangeness Oliver Korpilla
@ 2004-07-05 23:44 ` Paul Mackerras
  0 siblings, 0 replies; 2+ messages in thread
From: Paul Mackerras @ 2004-07-05 23:44 UTC (permalink / raw)
  To: Oliver Korpilla; +Cc: linuxppc-embedded


Oliver Korpilla writes:

> I checked my Page Table Entries (PTEs) for the MPC7455 and MPC8240 after the
> remap_page_range() took place.
>
> Except for the RPN part (the physical address of the page) the PTEs match,
> ending with the last 11 Bits (flags as in arch/ppc/mm/pgtable.h):
>
> Kernel space: 0x581
> User   space: 0x72D
>
> (for user space this does mean - from least significant to most significant:
> Page present: 	no,
> Hashed PTE: 	yes,

No, you have _PAGE_PRESENT set and _PAGE_HASHPTE clear there (which
looks correct).

> How are these Linux PTEs mapped to the MMU PTEs (64 bit wide descriptors)?
>
> The "Programming Environments Manual For 32-Bit Implementations of the PowerPC
> Architecture", the MPC603e and MPC7450 reference manuals depict a completely
> different format, so how and where are these converted? (Hopefully not in
> assembler! ;) )

Yes, in assembler. :)  For the 74xx, it's done by create_hpte() in
arch/ppc/mm/hashtables.S, and for the 603 (and the 8240) it's done by
DataLoadTLBMiss or DataStoreTLBMiss in arch/ppc/kernel/head.S.

Paul.

** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2004-07-05 23:44 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-07-05 16:15 [more info - please help!] MPC7455 DMA buffer strangeness Oliver Korpilla
2004-07-05 23:44 ` Paul Mackerras

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).