From: Segher Boessenkool <segher@kernel.crashing.org>
To: Kumar Gala <galak@kernel.crashing.org>
Cc: linuxppc-dev list <linuxppc-dev@ozlabs.org>
Subject: Re: [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file.
Date: Wed, 27 Jun 2007 23:21:10 +0200 [thread overview]
Message-ID: <17094a76430d6dd0df7aa07560b4e204@kernel.crashing.org> (raw)
In-Reply-To: <EEF07F54-B6C2-4F27-A3F5-0824DD4826A0@kernel.crashing.org>
>>>>>> - ranges = <0 f8000000 00100000>;
>>>>>> - reg = <f8000000 00100000>; // CCSRBAR 1M
>>>>>> + ranges = <00001000 f8001000 000ff000
>>>>>> + reg = <f8000000 00001000>; // CCSRBAR
>> There is "BAR" in the name, so it is a movable range? Where
>> is the base address set?
>
> in a MMIO register in the space itself.
Oh, *great* design.</sarcasm>
>> What is the relationship between (in the example) the address
>> ranges x'f800_0000+1000 and x'f800_1000+ff000?
>
> uugh, not sure what that's all about.
Reading back I see that the CCSR region is 1MB, and only the
first 4kB are for this PHB. What is the rest of this range
used for -- devices on this PCI bus, other SoC devices, ...?
Segher
next prev parent reply other threads:[~2007-06-27 21:21 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-27 1:16 [PATCH 00/15] [POWERPC] PCI/PCIe cleanups and fixups for 8641 Kumar Gala
2007-06-27 1:16 ` [PATCH 01/15] [POWERPC] Remove set_cfg_type for PCI indirect users that don't need it Kumar Gala
2007-06-27 1:16 ` [PATCH 02/15] [POWERPC] 52xx: Remove support for PCI bus_offset Kumar Gala
2007-06-27 1:16 ` [PATCH 03/15] [POWERPC] Pass the pci_controller into pci_exclude_device Kumar Gala
2007-06-27 1:16 ` [PATCH 04/15] [POWERPC] Remove hack to determine the 2nd PHBs bus number Kumar Gala
2007-06-27 1:16 ` [PATCH 05/15] [POWERPC] Remove bus_offset in places its not really used Kumar Gala
2007-06-27 1:16 ` [PATCH 06/15] [POWERPC] Added self_busno to indicate which bus number the PHB is Kumar Gala
2007-06-27 1:16 ` [PATCH 07/15] [POWERPC] Removed remnants of bus_offset Kumar Gala
2007-06-27 1:16 ` [PATCH 08/15] [POWERPC] Remove PCI-e errata for MPC8641 silicon ver 1.0 Kumar Gala
2007-06-27 1:16 ` [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file Kumar Gala
2007-06-27 1:16 ` [PATCH 10/15] [POWERPC] Added indirect_type to handle variants of PCI ops Kumar Gala
2007-06-27 1:16 ` [PATCH 11/15] [POWERPC] 86xx: Avoid system halt if link training isn't at least L0 Kumar Gala
2007-06-27 1:16 ` [PATCH 12/15] [POWERPC] 86xx: Workaround PCI_PRIMARY_BUS usage Kumar Gala
2007-06-27 1:16 ` [PATCH 13/15] [POWERPC] MPC8641HPCN: Set IDE in ULI1575 to not native mode Kumar Gala
2007-06-27 1:16 ` [PATCH 14/15] [POWERPC] Let subordinate transparent bridges be transparent Kumar Gala
2007-06-27 1:16 ` [PATCH 15/15] [POWERPC] 86xx: Created quirk_fsl_pcie_transparent() to initialize bridge resources Kumar Gala
2007-06-27 19:57 ` [PATCH 09/15] [POWERPC] 86xx: Add uli1575 pci-bridge sector to MPC8641HPCN dts file Andy Fleming
2007-06-27 20:39 ` Segher Boessenkool
2007-06-27 20:43 ` Kumar Gala
2007-06-27 20:57 ` Segher Boessenkool
2007-06-27 21:08 ` Kumar Gala
2007-06-27 21:21 ` Segher Boessenkool [this message]
2007-06-27 22:51 ` Kumar Gala
2007-06-28 9:14 ` Segher Boessenkool
2007-06-30 0:09 ` Andy Fleming
2007-06-28 0:23 ` David Gibson
2007-06-28 9:18 ` Segher Boessenkool
2007-06-27 1:22 ` [PATCH 07/15] [POWERPC] Removed remnants of bus_offset David Gibson
2007-06-27 4:27 ` Kumar Gala
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