From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from gold.webfusion.co.uk (gold.webfusion.co.uk [212.67.202.159]) (using TLSv1 with cipher EDH-RSA-DES-CBC3-SHA (168/168 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTP id EB23967C2A for ; Mon, 4 Jul 2005 18:37:13 +1000 (EST) From: Yuli Barcohen MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Message-ID: <17096.61878.43282.752343@astp0002.localdomain> Date: Mon, 4 Jul 2005 11:22:14 +0300 To: Jason McMullan In-Reply-To: <1120244191.18872.3.camel@jmcmullan.timesys> References: <42C1AAC1.4060702@gmail.com> <20050629085913.GA2153@logos.cnet> <20050701094438.GA11121@logos.cnet> <1120229717.21507.9.camel@jmcmullan.timesys> <20050701101713.GC11121@logos.cnet> <1120244191.18872.3.camel@jmcmullan.timesys> Cc: linux-ppc-embedded Subject: Re: mpc8xx and ld.so problem List-Id: Linux on Embedded PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , >>>>> Jason McMullan writes: [...deleted...] Jason> Ha. Funny. The glibc powerpc maintainer doesn't want any Jason> embedded fixes in the mainline. Last I checked, that was for Jason> 'the tools vendors' to fix. Jason> "We won't work around processor bugs" is their philosophy. [...deleted...] I investigated the problem a bit when I had trouble with a self-compiled glibc a year or so ago. IIRC, I found bug in the memset code, not in the chip. The code was just wrong for cache line sizes not equal to 32. So memset.S is good for 60x series (PQII included) but for 8xx it fails. We use dcbX instructions in some kernel drivers and since we never had any problems with those drivers I'm a bit surprised to hear that all 8xx chips have got that bug. -- ======================================================================== Yuli Barcohen | Phone +972-9-765-1788 | Software Project Leader yuli@arabellasw.com | Fax +972-9-765-7494 | Arabella Software, Israel ========================================================================