From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2FC9AC27C43 for ; Wed, 29 May 2024 09:06:49 +0000 (UTC) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4Vq3Ck54w1z87Pv for ; Wed, 29 May 2024 18:56:50 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nxp.com (client-ip=92.121.34.13; helo=inva020.nxp.com; envelope-from=shengjiu.wang@nxp.com; receiver=lists.ozlabs.org) Received: from inva020.nxp.com (inva020.nxp.com [92.121.34.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4Vq3Br2RVpz7B3C for ; Wed, 29 May 2024 18:56:04 +1000 (AEST) Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id A46691A1398; Wed, 29 May 2024 10:56:01 +0200 (CEST) Received: from aprdc01srsp001v.ap-rdc01.nxp.com (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 19AE21A083E; Wed, 29 May 2024 10:56:01 +0200 (CEST) Received: from localhost.localdomain (shlinux2.ap.freescale.net [10.192.224.44]) by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id 4874F183B72F; Wed, 29 May 2024 16:55:58 +0800 (+08) From: Shengjiu Wang To: lgirdwood@gmail.com, broonie@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, shengjiu.wang@gmail.com, linux-sound@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Xiubo.Lee@gmail.com, festevam@gmail.com, nicoleotsuka@gmail.com, perex@perex.cz, tiwai@suse.com, alsa-devel@alsa-project.org, linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 1/2] ASoC: dt-bindings: fsl,xcvr: Add compatible string for i.MX95 Date: Wed, 29 May 2024 16:40:01 +0800 Message-Id: <1716972002-2315-2-git-send-email-shengjiu.wang@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1716972002-2315-1-git-send-email-shengjiu.wang@nxp.com> References: <1716972002-2315-1-git-send-email-shengjiu.wang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" Add compatible string "fsl,imx95-xcvr" for i.MX95 platform. The difference between each platform is in below table. +---------+--------+----------+--------+ | SOC | PHY | eARC/ARC | SPDIF | +---------+--------+----------+--------+ | i.MX8MP | V1 | Yes | Yes | +---------+--------+----------+--------+ | i.MX93 | N/A | N/A | Yes | +---------+--------+----------+--------+ | i.MX95 | V2 | N/A | Yes | +---------+--------+----------+--------+ On i.MX95, there are two PLL clock sources, they are the parent clocks of the XCVR root clock. one is for 8kHz series rates, named as 'pll8k', another one is for 11kHz series rates, named as 'pll11k'. They are optional clocks, if there are such clocks, then the driver can switch between them to support more accurate sample rates. As 'pll8k' and 'pll11k' are optional, then add 'minItems: 4' for clocks and clock-names properties. On i.MX95, the 'interrupts' configuration has the same constraint as i.MX93. Only on i.MX8MP, the 'resets' is required, but for i.MX95 and i.MX93 there is no such hardware setting. Signed-off-by: Shengjiu Wang --- .../devicetree/bindings/sound/fsl,xcvr.yaml | 32 ++++++++++++++++++- 1 file changed, 31 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml index 0eb0c1ba8710..197ae8ba9c30 100644 --- a/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,xcvr.yaml @@ -22,6 +22,7 @@ properties: enum: - fsl,imx8mp-xcvr - fsl,imx93-xcvr + - fsl,imx95-xcvr reg: items: @@ -49,6 +50,9 @@ properties: - description: PHY clock - description: SPBA clock - description: PLL clock + - description: PLL clock source for 8kHz series + - description: PLL clock source for 11kHz series + minItems: 4 clock-names: items: @@ -56,6 +60,9 @@ properties: - const: phy - const: spba - const: pll_ipg + - const: pll8k + - const: pll11k + minItems: 4 dmas: items: @@ -79,15 +86,24 @@ required: - clock-names - dmas - dma-names - - resets allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mp-xcvr + then: + required: + - resets + - if: properties: compatible: contains: enum: - fsl,imx93-xcvr + - fsl,imx95-xcvr then: properties: interrupts: @@ -98,6 +114,20 @@ allOf: interrupts: maxItems: 1 + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8mp-xcvr + - fsl,imx93-xcvr + then: + properties: + clocks: + maxItems: 4 + clock-names: + maxItems: 4 + additionalProperties: false examples: -- 2.34.1