[PATCH 00/13] Cell patches for 2.6.18

[PATCH 00/13] Cell patches for 2.6.18

[Arnd Bergmann]

This series are the patches that I'd like to suggest for the powerpc.git
tree for 2.6.18. There will be a few more as soon as the stuff I sent
yesterday has gone in, so I can forward-port the patches depending on
that.

	Arnd <><
--

[PATCH 01/13] cell: always build spu base into the kernel

[Arnd Bergmann]

The spu_base module is rather deeply intermixed with the
core kernel, so it makes sense to have that built-in.
This will let us extend the base in the future without
having to export more core symbols just for it.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---

Index: linus-2.6/arch/powerpc/platforms/cell/Makefile
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Makefile	2006-04-29 22:47:56.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Makefile	2006-04-29 22:53:41.000000000 +0200
@@ -2,15 +2,13 @@
 obj-y			+= pervasive.o
 
 obj-$(CONFIG_SMP)	+= smp.o
-obj-$(CONFIG_SPU_FS)	+= spu-base.o spufs/
-
-spu-base-y		+= spu_base.o spu_priv1.o
 
 # needed only when building loadable spufs.ko
 spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
 obj-y			+= $(spufs-modular-m)
 
 # always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o
+spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
 obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
 
+obj-$(CONFIG_SPU_FS)	+= spufs/

--

[PATCH 02/13] spufs: restore mapping of mssync register

[Arnd Bergmann]

A recent change to the way that the mfc file gets mapped made it
impossible to map the SPE Multi-Source Synchronization register
into user space, but that may be needed by some applications.

This restores the missing functionality.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

Index: linus-2.6/arch/powerpc/platforms/cell/spufs/file.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/file.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/file.c	2006-04-29 22:53:41.000000000 +0200
@@ -825,6 +825,55 @@
 					spufs_signal2_type_set, "%llu");
 
 #ifdef CONFIG_SPUFS_MMAP
+static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
+					   unsigned long address, int *type)
+{
+	return spufs_ps_nopage(vma, address, type, 0x0000);
+}
+
+static struct vm_operations_struct spufs_mss_mmap_vmops = {
+	.nopage = spufs_mss_mmap_nopage,
+};
+
+/*
+ * mmap support for problem state MFC DMA area [0x0000 - 0x0fff].
+ * Mapping this area requires that the application have CAP_SYS_RAWIO,
+ * as these registers require special care when read/writing.
+ */
+static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	if (!(vma->vm_flags & VM_SHARED))
+		return -EINVAL;
+
+	if (!capable(CAP_SYS_RAWIO))
+		return -EPERM;
+
+	vma->vm_flags |= VM_RESERVED;
+	vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
+				     | _PAGE_NO_CACHE);
+
+	vma->vm_ops = &spufs_mss_mmap_vmops;
+	return 0;
+}
+#endif
+
+static int spufs_mss_open(struct inode *inode, struct file *file)
+{
+	struct spufs_inode_info *i = SPUFS_I(inode);
+
+	file->private_data = i->i_ctx;
+	return nonseekable_open(inode, file);
+}
+
+static struct file_operations spufs_mss_fops = {
+	.open	 = spufs_mss_open,
+#ifdef CONFIG_SPUFS_MMAP
+	.mmap	 = spufs_mss_mmap,
+#endif
+};
+
+
+#ifdef CONFIG_SPUFS_MMAP
 static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
 					   unsigned long address, int *type)
 {
@@ -1292,6 +1341,7 @@
 	{ "signal2", &spufs_signal2_fops, 0666, },
 	{ "signal1_type", &spufs_signal1_type, 0666, },
 	{ "signal2_type", &spufs_signal2_type, 0666, },
+	{ "mss", &spufs_mss_fops, 0666, },
 	{ "mfc", &spufs_mfc_fops, 0666, },
 	{ "cntl", &spufs_cntl_fops,  0666, },
 	{ "npc", &spufs_npc_ops, 0666, },

--

[PATCH 03/13] cell: fix interrupt priority handling

[Arnd Bergmann]

Checking the priority field to test for irq validity is
completely bogus and breaks with future external interrupt
controllers.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---

Index: linus-2.6/arch/powerpc/platforms/cell/interrupt.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/interrupt.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/interrupt.c	2006-04-29 22:53:41.000000000 +0200
@@ -136,8 +136,7 @@
 		 * One of these units can be connected
 		 * to an external interrupt controller.
 		 */
-		if (pending.prio > 0x3f ||
-		    pending.class != 2)
+		if (pending.class != 2)
 			break;
 		irq = IIC_EXT_OFFSET
 			+ spider_get_irq(node)

--

[PATCH 04/13] cell: remove broken __setup_cpu_be function

[Arnd Bergmann]

 From: Geoff Levand <geoffrey.levand@am.sony.com>

This patch removes the incorrect Cell processor setup routine
__setup_cpu_be.  This routine improperly accesses the hypervisor
page size configuration at SPR HID6.  The correct behavior is for
firmware, or if needed, platform setup code, to set the correct
page size.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/kernel/cpu_setup_power4.S
===================================================================
--- linus-2.6.orig/arch/powerpc/kernel/cpu_setup_power4.S	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/kernel/cpu_setup_power4.S	2006-04-29 22:53:42.000000000 +0200
@@ -76,20 +76,6 @@
 _GLOBAL(__setup_cpu_power4)
 	blr
 
-_GLOBAL(__setup_cpu_be)
-        /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
-        addi    r3, 0,  0
-        ori     r3, r3, HID6_LB
-        sldi    r3, r3, 32
-        nor     r3, r3, r3
-        mfspr   r4, SPRN_HID6
-        and     r4, r4, r3
-        addi    r3, 0, 0x02000
-        sldi    r3, r3, 32
-        or      r4, r4, r3
-        mtspr   SPRN_HID6, r4
-	blr
-
 _GLOBAL(__setup_cpu_ppc970)
 	mfspr	r0,SPRN_HID0
 	li	r11,5			/* clear DOZE and SLEEP */
Index: linus-2.6/arch/powerpc/kernel/cputable.c
===================================================================
--- linus-2.6.orig/arch/powerpc/kernel/cputable.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/kernel/cputable.c	2006-04-29 22:53:42.000000000 +0200
@@ -33,7 +33,6 @@
 #ifdef CONFIG_PPC64
 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
 #else
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -289,7 +288,7 @@
 			PPC_FEATURE_SMT,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
-		.cpu_setup		= __setup_cpu_be,
+		.cpu_setup		= __setup_cpu_power4,
 		.platform		= "ppc-cell-be",
 	},
 	{	/* default match */

--

Re: [PATCH 04/13] cell: remove broken __setup_cpu_be function

[Paul Mackerras]

Arnd Bergmann writes:

>  From: Geoff Levand <geoffrey.levand@am.sony.com>
> 
> This patch removes the incorrect Cell processor setup routine
> __setup_cpu_be.  This routine improperly accesses the hypervisor
> page size configuration at SPR HID6.  The correct behavior is for
> firmware, or if needed, platform setup code, to set the correct
> page size.

> -		.cpu_setup		= __setup_cpu_be,
> +		.cpu_setup		= __setup_cpu_power4,

That looks a bit dodgy.  Either just remove the contents of
__setup_cpu_be (leaving only the blr), or define a __setup_cpu_null
that does nothing, or make the identify_cpu not call the cpu setup
function if the pointer is NULL.

Paul.

Re: [PATCH 04/13] cell: remove broken __setup_cpu_be function

[Geoff Levand]

Paul Mackerras wrote:
> Arnd Bergmann writes:
> 
>>  From: Geoff Levand <geoffrey.levand@am.sony.com>
>> 
>> This patch removes the incorrect Cell processor setup routine
>> __setup_cpu_be.  This routine improperly accesses the hypervisor
>> page size configuration at SPR HID6.  The correct behavior is for
>> firmware, or if needed, platform setup code, to set the correct
>> page size.
> 
>> -		.cpu_setup		= __setup_cpu_be,
>> +		.cpu_setup		= __setup_cpu_power4,
> 
> That looks a bit dodgy.  Either just remove the contents of
> __setup_cpu_be (leaving only the blr), or define a __setup_cpu_null
> that does nothing, or make the identify_cpu not call the cpu setup
> function if the pointer is NULL.


OK, I set it up with __setup_cpu_null.  An updated patch follows.

It falls out from this that we can replace the do-nothing routines
__setup_cpu_power3 and __setup_cpu_power4 with __setup_cpu_null also.
I'll post a separate patch for consideration.

-Geoff


Replaced the Cell processor specific routine __setup_cpu_be with
a new generic routine __setup_cpu_null.  __setup_cpu_be improperly
accessed the hypervisor page size configuration at SPR HID6.  Correct
behavior is for firmware, or if needed, platform setup code, to set
the correct page size.


Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>


Index: cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cpu_setup_power4.S	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S	2006-05-05 15:59:58.000000000 -0700
@@ -76,20 +76,6 @@
 _GLOBAL(__setup_cpu_power4)
 	blr

-_GLOBAL(__setup_cpu_be)
-        /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
-        addi    r3, 0,  0
-        ori     r3, r3, HID6_LB
-        sldi    r3, r3, 32
-        nor     r3, r3, r3
-        mfspr   r4, SPRN_HID6
-        and     r4, r4, r3
-        addi    r3, 0, 0x02000
-        sldi    r3, r3, 32
-        or      r4, r4, r3
-        mtspr   SPRN_HID6, r4
-	blr
-
 _GLOBAL(__setup_cpu_ppc970)
 	mfspr	r0,SPRN_HID0
 	li	r11,5			/* clear DOZE and SLEEP */
Index: cell--alp--3/arch/powerpc/kernel/cputable.c
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cputable.c	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cputable.c	2006-05-05 16:29:06.000000000 -0700
@@ -31,9 +31,9 @@
  * and ppc64
  */
 #ifdef CONFIG_PPC64
+extern void __setup_cpu_null(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
 #else
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -273,7 +273,7 @@
 			PPC_FEATURE_SMT,
 		.icache_bsize		= 128,
 		.dcache_bsize		= 128,
-		.cpu_setup		= __setup_cpu_be,
+		.cpu_setup		= __setup_cpu_null,
 		.platform		= "ppc-cell-be",
 	},
 	{	/* default match */
Index: cell--alp--3/arch/powerpc/kernel/misc_64.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/misc_64.S	2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/misc_64.S	2006-05-05 16:04:59.000000000 -0700
@@ -768,6 +768,9 @@

 #endif /* CONFIG_ALTIVEC */

+_GLOBAL(__setup_cpu_null)
+	blr
+
 _GLOBAL(__setup_cpu_power3)
 	blr

Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Meswani, Mitesh]

[-- Attachment #1: Type: text/plain, Size: 5594 bytes --]

 
Hello 
 
I am looking to use the SMT related parameters like Snooze delay, HMT thread priorities, SMT ON/Off and wanted to know how to invoke and set them. I am running Open Suse 10 with 2.6.16.rc4-3-ppc64 kernel on eServer p590 2-way POWER5 partition. 
 
I noticed the parameters in /sys/devices/system/cpu/cpu#   with the following :
 
mmcr0  online       pmc2  pmc5  smt_snooze_delay
mmcr1  physical_id  pmc3  pmc6  topology
crash_notes  mmcra  pmc1         pmc4  purr

setting the value in online to 0 seems to turn off the logical processor, but I am not sure what the others are for and the meaning of their hex values? 
It seems that there is include/asm-ppc64/processor.h  with macros like HMT_very_low()  ,  wonder if these can be set on command line since I am running unmodified app binaries. 
 
 
 
Thanks, 
Mitesh
 
 

Mitesh R. Meswani 
Ph.D. Candidate 
Research Associate, PLS2 Group
Room 106 F, Department of Computer Science
The University of Texas at El Paso, 
El Paso, Texas 79968
Tel: 915 747 8012 (O)
Email: mmeswani@utep.edu

________________________________

From: linuxppc-dev-bounces+mmeswani=utep.edu@ozlabs.org on behalf of Geoff Levand
Sent: Fri 5/5/2006 6:00 PM
To: Paul Mackerras
Cc: Arnd Bergmann; Levand,Geoffrey; linux-kernel@vger.kernel.org; linuxppc-dev@ozlabs.org; Arnd Bergmann; cbe-oss-dev@ozlabs.org
Subject: Re: [PATCH 04/13] cell: remove broken __setup_cpu_be function



Paul Mackerras wrote:
> Arnd Bergmann writes:
>
>>  From: Geoff Levand <geoffrey.levand@am.sony.com>
>>
>> This patch removes the incorrect Cell processor setup routine
>> __setup_cpu_be.  This routine improperly accesses the hypervisor
>> page size configuration at SPR HID6.  The correct behavior is for
>> firmware, or if needed, platform setup code, to set the correct
>> page size.
>
>> -            .cpu_setup              = __setup_cpu_be,
>> +            .cpu_setup              = __setup_cpu_power4,
>
> That looks a bit dodgy.  Either just remove the contents of
> __setup_cpu_be (leaving only the blr), or define a __setup_cpu_null
> that does nothing, or make the identify_cpu not call the cpu setup
> function if the pointer is NULL.


OK, I set it up with __setup_cpu_null.  An updated patch follows.

It falls out from this that we can replace the do-nothing routines
__setup_cpu_power3 and __setup_cpu_power4 with __setup_cpu_null also.
I'll post a separate patch for consideration.

-Geoff


Replaced the Cell processor specific routine __setup_cpu_be with
a new generic routine __setup_cpu_null.  __setup_cpu_be improperly
accessed the hypervisor page size configuration at SPR HID6.  Correct
behavior is for firmware, or if needed, platform setup code, to set
the correct page size.


Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>


Index: cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cpu_setup_power4.S    2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cpu_setup_power4.S 2006-05-05 15:59:58.000000000 -0700
@@ -76,20 +76,6 @@
 _GLOBAL(__setup_cpu_power4)
        blr

-_GLOBAL(__setup_cpu_be)
-        /* Set large page sizes LP=0: 16MB, LP=1: 64KB */
-        addi    r3, 0,  0
-        ori     r3, r3, HID6_LB
-        sldi    r3, r3, 32
-        nor     r3, r3, r3
-        mfspr   r4, SPRN_HID6
-        and     r4, r4, r3
-        addi    r3, 0, 0x02000
-        sldi    r3, r3, 32
-        or      r4, r4, r3
-        mtspr   SPRN_HID6, r4
-       blr
-
 _GLOBAL(__setup_cpu_ppc970)
        mfspr   r0,SPRN_HID0
        li      r11,5                   /* clear DOZE and SLEEP */
Index: cell--alp--3/arch/powerpc/kernel/cputable.c
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/cputable.c    2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/cputable.c 2006-05-05 16:29:06.000000000 -0700
@@ -31,9 +31,9 @@
  * and ppc64
  */
 #ifdef CONFIG_PPC64
+extern void __setup_cpu_null(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
-extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
 #else
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
@@ -273,7 +273,7 @@
                        PPC_FEATURE_SMT,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
-               .cpu_setup              = __setup_cpu_be,
+               .cpu_setup              = __setup_cpu_null,
                .platform               = "ppc-cell-be",
        },
        {       /* default match */
Index: cell--alp--3/arch/powerpc/kernel/misc_64.S
===================================================================
--- cell--alp--3.orig/arch/powerpc/kernel/misc_64.S     2006-04-26 19:19:25.000000000 -0700
+++ cell--alp--3/arch/powerpc/kernel/misc_64.S  2006-05-05 16:04:59.000000000 -0700
@@ -768,6 +768,9 @@

 #endif /* CONFIG_ALTIVEC */

+_GLOBAL(__setup_cpu_null)
+       blr
+
 _GLOBAL(__setup_cpu_power3)
        blr

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Linuxppc-dev mailing list
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev



[-- Attachment #2: Type: text/html, Size: 9612 bytes --]

Re: Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Will Schmidt]

On Mon, 2006-05-08 at 12:09 -0600, Meswani, Mitesh wrote:
>  
> Hello 

Hi

>  
> I am looking to use the SMT related parameters like Snooze delay, HMT
> thread priorities, SMT ON/Off and wanted to know how to invoke and set
> them. I am running Open Suse 10 with 2.6.16.rc4-3-ppc64 kernel on
> eServer p590 2-way POWER5 partition. 

>  
> I noticed the parameters in /sys/devices/system/cpu/cpu#   with the
> following :
>  
> mmcr0  online       pmc2  pmc5  smt_snooze_delay
> mmcr1  physical_id  pmc3  pmc6  topology
> crash_notes  mmcra  pmc1         pmc4  purr
> 

Some of this is unique to Logical Partitions and cpu's on POWER5 pSeries
hardware..    I think you've already found the useful entry "online",
and the rest would be just trivial information.

On the kernel boot commandline, you can add parms such as
"smt-snooze-delay=xxxx" to set the snooze_delay value, and
"smt-enabled=off" to turn off the secondary threads. 

As you've already found, you can echo values into the sys entries to
cause the cpus to go online or offline.  0=offline, 1=online.   You can
also adjust the value for snooze-delay.  This one defaults to '0'.  This
controls the amount of time the processor thread spins before declaring
that it's got no useful work to do and cedes itself. 

"mmcr*" and "pmc*" are performance counter registers and values.  These
are used by oprofile.

"purr" is a Processor Utilization Resource Register, indicating the
number of ticks that the processor has been in use.  

I believe "crash_notes" has to do with lkcd or crashdump.   

No idea on the "topology" entry.  possibly related to NUMA. 

> setting the value in online to 0 seems to turn off the logical
> processor, but I am not sure what the others are for and the meaning
> of their hex values? 
> It seems that there is include/asm-ppc64/processor.h  with macros like
> HMT_very_low()  ,  wonder if these can be set on command line
>  since I am running unmodified app binaries. 

the HMT_* macros are telling firmware that "this processor thread should
run at this priority".  Typically used when we're waiting on a spinlock.
I.e. When we are waiting on a spinlock, we hit the HMT_low macro to drop
our threads priority, allowing the other thread to use those extra
cycles finish it's stuff quicker, and maybe even release the lock we're
waiting for.          HMT_* is all within the kernel though, no exposure
to userspace apps.  

>  
> Thanks, 
> Mitesh
>  
>  

Hope that is helpful..  
-Will


> Mitesh R. Meswani 
> Ph.D. Candidate 
> Research Associate, PLS2 Group
> Room 106 F, Department of Computer Science
> The University of Texas at El Paso, 
> El Paso, Texas 79968
> Tel: 915 747 8012 (O)
> Email: mmeswani@utep.edu
> 
> ______________________________________________________________________
> From: linuxppc-dev-bounces+mmeswani=utep.edu@ozlabs.org on behalf of
> Geoff Levand
> Sent: Fri 5/5/2006 6:00 PM
> To: Paul Mackerras
> Cc: Arnd Bergmann; Levand,Geoffrey; linux-kernel@vger.kernel.org;
> linuxppc-dev@ozlabs.org; Arnd Bergmann; cbe-oss-dev@ozlabs.org
> Subject: Re: [PATCH 04/13] cell: remove broken __setup_cpu_be function
> 
<Snippage...>

> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

Re: Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Segher Boessenkool]

> the HMT_* macros are telling firmware that "this processor thread  
> should
> run at this priority".  Typically used when we're waiting on a  
> spinlock.
> I.e. When we are waiting on a spinlock, we hit the HMT_low macro to  
> drop
> our threads priority, allowing the other thread to use those extra
> cycles finish it's stuff quicker, and maybe even release the lock  
> we're
> waiting for.          HMT_* is all within the kernel though, no  
> exposure
> to userspace apps.

Actually, those macros translate straight into a single machine insn.
No firmware is involved.  See include/asm-powerpc/processor.h.  For
example:

#define HMT_very_low()   asm volatile("or 31,31,31   # very low  
priority")

You can use those same macros from user space, although it is CPU
implementation dependent which priorities you can actually set (you
probably can do low and medium priority).


Segher

RE: Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Meswani, Mitesh]

[-- Attachment #1: Type: text/plain, Size: 2833 bytes --]

Thanks guys 
 
That answered so many of my questions. 
 
If I were to use these macros from user space, would they remain set until next reboot or change ? POWER5 allows priorities 2 through 4 for user apps, so considering this, and the fact that the normal prioirity is level 4, if a user app resets it to say 2 and then finishes without changing it back to 4 , would all the subsequent user apps run at the new level 2. I wonder what I am saying even makes sense, because the kernel internally throttles the priority for various sections of the kernel code and it may even overwrite it. 
 
 
On a slightly unrelated note, I appended some boot parameters like smt-enabled=on/off to /etc/lilo.conf and unfortunately I am not able to see any effect and it boots the same way. I am switching from the AIX world so I maybe doing something dumb, please point out if I am !  This kind of seems to effect the bind processor calls using sys_setaffinity when there are 4 logical processors 0-3 on two physical processors, bind only allows me to set affinity to either cpu 0 or 2, this seems weird to me because my system is booting with two logical cpus and then I set online bit to 1 to turn the remaining on, thereafter I try binding and havent been very successful. 
 
 
Thanks for all your replies. 
 
 
 

Mitesh R. Meswani 
Ph.D. Candidate 
Research Associate, PLS2 Group
Room 106 F, Department of Computer Science
The University of Texas at El Paso, 
El Paso, Texas 79968
Tel: 915 747 8012 (O)
Email: mmeswani@utep.edu

________________________________

From: Segher Boessenkool [mailto:segher@kernel.crashing.org]
Sent: Mon 5/8/2006 5:04 PM
To: will_schmidt@vnet.ibm.com
Cc: Meswani, Mitesh; linuxppc-dev@ozlabs.org; Arnd Bergmann; linux-kernel@vger.kernel.org; cbe-oss-dev@ozlabs.org
Subject: Re: Information for setting up SMT related parameters on linux 2.6.16 on POWER5



> the HMT_* macros are telling firmware that "this processor thread 
> should
> run at this priority".  Typically used when we're waiting on a 
> spinlock.
> I.e. When we are waiting on a spinlock, we hit the HMT_low macro to 
> drop
> our threads priority, allowing the other thread to use those extra
> cycles finish it's stuff quicker, and maybe even release the lock 
> we're
> waiting for.          HMT_* is all within the kernel though, no 
> exposure
> to userspace apps.

Actually, those macros translate straight into a single machine insn.
No firmware is involved.  See include/asm-powerpc/processor.h.  For
example:

#define HMT_very_low()   asm volatile("or 31,31,31   # very low 
priority")

You can use those same macros from user space, although it is CPU
implementation dependent which priorities you can actually set (you
probably can do low and medium priority).


Segher




[-- Attachment #2: Type: text/html, Size: 4525 bytes --]

RE: Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Will Schmidt]

On Tue, 2006-05-09 at 17:17 -0600, Meswani, Mitesh wrote:
> Thanks guys 
>  
> That answered so many of my questions. 
>  
> If I were to use these macros from user space, would they remain set
> until next reboot or change ? POWER5 allows priorities 2 through 4 for
> user apps, so considering this, and the fact that the normal prioirity
> is level 4, if a user app resets it to say 2 and then finishes without
> changing it back to 4 , would all the subsequent user apps run at the
> new level 2. I wonder what I am saying even makes sense, because the
> kernel internally throttles the priority for various sections of the
> kernel code and it may even overwrite it. 

I dont believe there is any mechanism that ever saves the current
priority between user and kernel, or between threads, etc.  So if you
were to set it, it would remain set until the next HMT_ macro was
touched.  A brief source search shows that the HMT_ macros are
referenced in idle loops, spin locks, exceptions, and hcalls, so not
likely that it would remain set for long. 

>  
> On a slightly unrelated note, I appended some boot parameters like
> smt-enabled=on/off to /etc/lilo.conf and unfortunately I am not able
> to see any effect and it boots the same way. I am switching from the

Perhaps bad notation in my first note.    "smt-enabled=on" is a default,
and will give you threads.   "smt-enabled=off"  will cause those threads
to be off by default. 

>  AIX world so I maybe doing something dumb, please point out if I am !
> This kind of seems to effect the bind processor calls using
> sys_setaffinity when there are 4 logical processors 0-3 on two
> physical processors, bind only allows me to set affinity to either cpu
> 0 or 2, this seems weird to me because my system is booting with two
> logical cpus and then I set online bit to 1 to turn the remaining on,
> thereafter I try binding and havent been very successful. 

Dont know about the affinity stuff.. 

>  
>  
> Thanks for all your replies. 
>  
>  
>  
> 
> Mitesh R. Meswani 
> Ph.D. Candidate 
> Research Associate, PLS2 Group
> Room 106 F, Department of Computer Science
> The University of Texas at El Paso, 
> El Paso, Texas 79968
> Tel: 915 747 8012 (O)
> Email: mmeswani@utep.edu
> 
> 
> ______________________________________________________________________
> From: Segher Boessenkool [mailto:segher@kernel.crashing.org]
> Sent: Mon 5/8/2006 5:04 PM
> To: will_schmidt@vnet.ibm.com
> Cc: Meswani, Mitesh; linuxppc-dev@ozlabs.org; Arnd Bergmann;
> linux-kernel@vger.kernel.org; cbe-oss-dev@ozlabs.org
> Subject: Re: Information for setting up SMT related parameters on
> linux 2.6.16 on POWER5
> 
> 
> > the HMT_* macros are telling firmware that "this processor thread 
> > should
> > run at this priority".  Typically used when we're waiting on a 
> > spinlock.
> > I.e. When we are waiting on a spinlock, we hit the HMT_low macro to 
> > drop
> > our threads priority, allowing the other thread to use those extra
> > cycles finish it's stuff quicker, and maybe even release the lock 
> > we're
> > waiting for.          HMT_* is all within the kernel though, no 
> > exposure
> > to userspace apps.
> 
> Actually, those macros translate straight into a single machine insn.
> No firmware is involved.  See include/asm-powerpc/processor.h.  For
> example:
> 
> #define HMT_very_low()   asm volatile("or 31,31,31   # very low 
> priority")
> 
> You can use those same macros from user space, although it is CPU
> implementation dependent which priorities you can actually set (you
> probably can do low and medium priority).
> 
> 
> Segher
> 
> 
> 
> 

RE: Information for setting up SMT related parameters on linux 2.6.16 on POWER5

[Meswani, Mitesh]

[-- Attachment #1: Type: text/plain, Size: 2139 bytes --]

Hello Segher and Will 
 
I tried using these macros on some applications and they dont seem to have any effect. I am running everything as root, and have been using bind processor commands to ensure that a task is assigned to a logical cpu. Since I am running SPEC CPU benchmarks I was exepecting to see a difference in run times, CPI when running two seperate SPEC apps on SMT threads. 
 
Is there some thing else I need to do to make sure that the processor takes the hint to "lower the HMT priority " , I am executing them from a regular shell which I assume has user level priority. 
 
 
Thanks
Mitesh 
 
 

Mitesh R. Meswani 
Ph.D. Candidate 
Research Associate, PLS2 Group
Room 106 F, Department of Computer Science
The University of Texas at El Paso, 
El Paso, Texas 79968
Tel: 915 747 8012 (O)
Email: mmeswani@utep.edu

________________________________

From: Segher Boessenkool [mailto:segher@kernel.crashing.org]
Sent: Mon 5/8/2006 5:04 PM
To: will_schmidt@vnet.ibm.com
Cc: Meswani, Mitesh; linuxppc-dev@ozlabs.org; Arnd Bergmann; linux-kernel@vger.kernel.org; cbe-oss-dev@ozlabs.org
Subject: Re: Information for setting up SMT related parameters on linux 2.6.16 on POWER5



> the HMT_* macros are telling firmware that "this processor thread 
> should
> run at this priority".  Typically used when we're waiting on a 
> spinlock.
> I.e. When we are waiting on a spinlock, we hit the HMT_low macro to 
> drop
> our threads priority, allowing the other thread to use those extra
> cycles finish it's stuff quicker, and maybe even release the lock 
> we're
> waiting for.          HMT_* is all within the kernel though, no 
> exposure
> to userspace apps.

Actually, those macros translate straight into a single machine insn.
No firmware is involved.  See include/asm-powerpc/processor.h.  For
example:

#define HMT_very_low()   asm volatile("or 31,31,31   # very low 
priority")

You can use those same macros from user space, although it is CPU
implementation dependent which priorities you can actually set (you
probably can do low and medium priority).


Segher




[-- Attachment #2: Type: text/html, Size: 3507 bytes --]

[PATCH 05/13] cell: enable CPU_FTR_CI_LARGE_PAGE

[Arnd Bergmann]

Reflect the fact that the Cell Broadband Engine supports 64k
pages by adding the bit to the CPU features.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/include/asm-powerpc/cputable.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/cputable.h	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/include/asm-powerpc/cputable.h	2006-04-29 22:53:42.000000000 +0200
@@ -329,7 +329,7 @@
 #define CPU_FTRS_CELL	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \
 	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
-	    CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO)
+	    CPU_FTR_CTRL | CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE)
 #define CPU_FTRS_COMPATIBLE	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \
 	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2)
 #endif

--

[PATCH 06/13] powerpc: fix 64k pages on non-hypervisor

[Arnd Bergmann]

 From: Benjamin Herrenschmidt <benh@kernel.crashing.org>

The page size encoding passed to tlbie is incorrect for
new-style large pages. This fixes it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/mm/hash_native_64.c
===================================================================
--- linus-2.6.orig/arch/powerpc/mm/hash_native_64.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/mm/hash_native_64.c	2006-04-29 22:53:42.000000000 +0200
@@ -52,7 +52,7 @@
 	default:
 		penc = mmu_psize_defs[psize].penc;
 		va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
-		va |= (0x7f >> (8 - penc)) << 12;
+		va |= penc << 12;
 		asm volatile("tlbie %0,1" : : "r" (va) : "memory");
 		break;
 	}
@@ -74,7 +74,7 @@
 	default:
 		penc = mmu_psize_defs[psize].penc;
 		va &= ~((1ul << mmu_psize_defs[psize].shift) - 1);
-		va |= (0x7f >> (8 - penc)) << 12;
+		va |= penc << 12;
 		asm volatile(".long 0x7c000224 | (%0 << 11) | (1 << 21)"
 			     : : "r"(va) : "memory");
 		break;

--

[PATCH 07/13] powerpc: export symbols for page size selection

[Arnd Bergmann]

We need access to some symbols in powerpc memory management
from spufs in order to create proper SLB entries.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/mm/hash_utils_64.c
===================================================================
--- linus-2.6.orig/arch/powerpc/mm/hash_utils_64.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/mm/hash_utils_64.c	2006-04-29 22:53:43.000000000 +0200
@@ -85,16 +85,26 @@
 #endif /* CONFIG_U3_DART */
 
 static unsigned long _SDR1;
-struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 
 hpte_t *htab_address;
 unsigned long htab_size_bytes;
 unsigned long htab_hash_mask;
+
+struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
+EXPORT_SYMBOL_GPL(mmu_psize_defs);
+
 int mmu_linear_psize = MMU_PAGE_4K;
+EXPORT_SYMBOL_GPL(mmu_linear_psize);
+
 int mmu_virtual_psize = MMU_PAGE_4K;
+EXPORT_SYMBOL_GPL(mmu_virtual_psize);
+
 #ifdef CONFIG_HUGETLB_PAGE
 int mmu_huge_psize = MMU_PAGE_16M;
+EXPORT_SYMBOL_GPL(mmu_huge_psize);
+
 unsigned int HPAGE_SHIFT;
+EXPORT_SYMBOL_GPL(HPAGE_SHIFT);
 #endif
 
 /* There are definitions of page sizes arrays to be used when none

--

Re: [PATCH 07/13] powerpc: export symbols for page size selection

[Paul Mackerras]

Arnd Bergmann writes:

> We need access to some symbols in powerpc memory management
> from spufs in order to create proper SLB entries.

I don't like exporting low-level implementation details like this, and
it seems a bit bogus to have an SLB miss handler in a module.  Could
you move the SLB miss handler to the non-modular part?

Regards,
Paul.

Re: [PATCH 07/13] powerpc: export symbols for page size selection

[Arnd Bergmann]

On Friday 05 May 2006 07:56, Paul Mackerras wrote:
> I don't like exporting low-level implementation details like this, and
> it seems a bit bogus to have an SLB miss handler in a module.  Could
> you move the SLB miss handler to the non-modular part?

Yes. The series already has the patches to move the SLB miss handler
into the built-in parts. At the moment, we also need the symbols for
the context switch code that also touches the SLB entries. We already
have a patch to move that as well, but are still discussing the details
of that.

I'll follow up with a patch to replace this one.

	Arnd <><

[PATCH 08/13] spufs: set up correct SLB entries for 64k pages

[Arnd Bergmann]

spufs currently knows only 4k pages and 16M hugetlb
pages. Make it use the regular methods for deciding on
the SLB bits.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 22:53:40.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 22:53:43.000000000 +0200
@@ -71,7 +71,7 @@
 {
 	struct spu_priv2 __iomem *priv2 = spu->priv2;
 	struct mm_struct *mm = spu->mm;
-	u64 esid, vsid;
+	u64 esid, vsid, llp;
 
 	pr_debug("%s\n", __FUNCTION__);
 
@@ -91,9 +91,14 @@
 	}
 
 	esid = (ea & ESID_MASK) | SLB_ESID_V;
-	vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) | SLB_VSID_USER;
+#ifdef CONFIG_HUGETLB_PAGE
 	if (in_hugepage_area(mm->context, ea))
-		vsid |= SLB_VSID_L;
+		llp = mmu_psize_defs[mmu_huge_psize].sllp;
+	else
+#endif
+		llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+	vsid = (get_vsid(mm->context.id, ea) << SLB_VSID_SHIFT) |
+			SLB_VSID_USER | llp;
 
 	out_be64(&priv2->slb_index_W, spu->slb_replace);
 	out_be64(&priv2->slb_vsid_RW, vsid);
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/switch.c	2006-04-29 22:47:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c	2006-04-29 22:53:43.000000000 +0200
@@ -718,13 +718,15 @@
 
 static inline void get_kernel_slb(u64 ea, u64 slb[2])
 {
-	slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
-	slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
+	u64 llp;
 
-	/* Large pages are used for kernel text/data, but not vmalloc.  */
-	if (cpu_has_feature(CPU_FTR_16M_PAGE)
-	    && REGION_ID(ea) == KERNEL_REGION_ID)
-		slb[0] |= SLB_VSID_L;
+	if (REGION_ID(ea) == KERNEL_REGION_ID)
+		llp = mmu_psize_defs[mmu_linear_psize].sllp;
+	else
+		llp = mmu_psize_defs[mmu_virtual_psize].sllp;
+	slb[0] = (get_kernel_vsid(ea) << SLB_VSID_SHIFT) |
+		SLB_VSID_KERNEL | llp;
+	slb[1] = (ea & ESID_MASK) | SLB_ESID_V;
 }
 
 static inline void load_mfc_slb(struct spu *spu, u64 slb[2], int slbe)

--

[PATCH 09/13] spufs: add a phys-id attribute to each SPU context

[Arnd Bergmann]

For performance analysis, it is often interesting to know
which physical SPE a thread is currently running on, and,
more importantly, if it is running at all.

This patch adds a simple attribute to each SPU directory
with that information.
The attribute is read-only and called 'phys-id'. It contains
an ascii string with the number of the physical SPU (e.g.
"0x5"), or alternatively the string "0xffffffff" (32 bit -1)
when it is not running at all at the time that the file
is read.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/file.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/file.c	2006-04-29 22:53:41.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/file.c	2006-04-29 22:53:44.000000000 +0200
@@ -1328,6 +1328,22 @@
 DEFINE_SIMPLE_ATTRIBUTE(spufs_srr0_ops, spufs_srr0_get, spufs_srr0_set,
 			"%llx\n")
 
+static u64 spufs_id_get(void *data)
+{
+	struct spu_context *ctx = data;
+	u64 num;
+
+	spu_acquire(ctx);
+	if (ctx->state == SPU_STATE_RUNNABLE)
+		num = ctx->spu->number;
+	else
+		num = (unsigned int)-1;
+	spu_release(ctx);
+
+	return num;
+}
+DEFINE_SIMPLE_ATTRIBUTE(spufs_id_ops, spufs_id_get, 0, "0x%llx\n")
+
 struct tree_descr spufs_dir_contents[] = {
 	{ "mem",  &spufs_mem_fops,  0666, },
 	{ "regs", &spufs_regs_fops,  0666, },
@@ -1351,5 +1367,6 @@
 	{ "spu_tag_mask", &spufs_spu_tag_mask_ops, 0666, },
 	{ "event_mask", &spufs_event_mask_ops, 0666, },
 	{ "srr0", &spufs_srr0_ops, 0666, },
+	{ "phys-id", &spufs_id_ops, 0666, },
 	{},
 };

--

[PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

 From: Geoff Levand <geoffrey.levand@am.sony.com>

Split the Cell BE support into generic and platform
dependant parts.

Creates a new config variable CONFIG_PPC_IBM_CELL_BLADE.
The existing CONFIG_PPC_CELL is now used to denote the
generic Cell processor support.  Also renames spu_priv1.c
to spu_priv1_mmio.c.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/Kconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/Kconfig	2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/Kconfig	2006-04-29 22:54:42.000000000 +0200
@@ -391,11 +391,17 @@
 	  For more informations, refer to <http://www.970eval.com>
 
 config PPC_CELL
-	bool "  Cell Broadband Processor Architecture"
+	bool
+	default n
+
+config PPC_IBM_CELL_BLADE
+	bool "  IBM Cell Blade"
 	depends on PPC_MULTIPLATFORM && PPC64
+	select PPC_CELL
 	select PPC_RTAS
 	select MMIO_NVRAM
 	select PPC_UDBG_16550
+	select SPUFS_PRIV1_MMIO
 
 config XICS
 	depends on PPC_PSERIES
@@ -440,7 +446,7 @@
 	default y
 
 config CELL_IIC
-	depends on PPC_CELL
+	depends on PPC_IBM_CELL_BLADE
 	bool
 	default y
 
Index: linus-2.6/arch/powerpc/configs/cell_defconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/configs/cell_defconfig	2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/configs/cell_defconfig	2006-04-29 22:54:42.000000000 +0200
@@ -116,6 +116,7 @@
 # CONFIG_PPC_PMAC is not set
 # CONFIG_PPC_MAPLE is not set
 CONFIG_PPC_CELL=y
+CONFIG_PPC_IBM_CELL_BLADE=y
 # CONFIG_U3_DART is not set
 CONFIG_PPC_RTAS=y
 # CONFIG_RTAS_ERROR_LOGGING is not set
@@ -132,6 +133,8 @@
 # Cell Broadband Engine options
 #
 CONFIG_SPU_FS=m
+CONFIG_SPU_BASE=y
+CONFIG_SPUFS_PRIV1_MMIO=y
 CONFIG_SPUFS_MMAP=y
 
 #
Index: linus-2.6/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Kconfig	2006-04-29 22:53:51.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Kconfig	2006-04-29 22:54:42.000000000 +0200
@@ -5,11 +5,20 @@
 	tristate "SPU file system"
 	default m
 	depends on PPC_CELL
+	select SPU_BASE
 	help
 	  The SPU file system is used to access Synergistic Processing
 	  Units on machines implementing the Broadband Processor
 	  Architecture.
 
+config SPU_BASE
+	bool
+	default n
+
+config SPUFS_PRIV1_MMIO
+	bool
+	default n
+
 config SPUFS_MMAP
 	bool
 	depends on SPU_FS && SPARSEMEM && !PPC_64K_PAGES
Index: linus-2.6/arch/powerpc/platforms/cell/Makefile
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/Makefile	2006-04-29 22:54:25.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/Makefile	2006-04-29 22:54:42.000000000 +0200
@@ -1,14 +1,13 @@
-obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
-obj-y			+= pervasive.o
-
-obj-$(CONFIG_SMP)	+= smp.o
+obj-$(CONFIG_PPC_IBM_CELL_BLADE)	+= interrupt.o iommu.o setup.o \
+					   spider-pic.o pervasive.o
+ifeq ($(CONFIG_SMP),y)
+obj-$(CONFIG_PPC_IBM_CELL_BLADE)	+= smp.o
+endif
 
 # needed only when building loadable spufs.ko
-spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
-obj-y			+= $(spufs-modular-m)
-
-# always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
-obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
+spufs-modular-$(CONFIG_SPU_FS)		+= spu_syscalls.o
 
-obj-$(CONFIG_SPU_FS)	+= spufs/
+obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
+					   $(spufs-modular-m)
+obj-$(CONFIG_SPUFS_PRIV1_MMIO)		+= spu_priv1_mmio.o
+obj-$(CONFIG_SPU_FS)			+= spufs/
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1.c	2006-04-29 22:53:50.000000000 +0200
+++ /dev/null	1970-01-01 00:00:00.000000000 +0000
@@ -1,133 +0,0 @@
-/*
- * access to SPU privileged registers
- */
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/spu.h>
-
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
-
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
-
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
-{
-	out_be64(&spu->priv1->int_mask_RW[class], mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
-
-u64 spu_int_mask_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_mask_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
-
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
-{
-	out_be64(&spu->priv1->int_stat_RW[class], stat);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
-
-u64 spu_int_stat_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_stat_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
-
-void spu_int_route_set(struct spu *spu, u64 route)
-{
-	out_be64(&spu->priv1->int_route_RW, route);
-}
-EXPORT_SYMBOL_GPL(spu_int_route_set);
-
-u64 spu_mfc_dar_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dar_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
-
-u64 spu_mfc_dsisr_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dsisr_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
-
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
-{
-	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
-
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
-{
-	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
-
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
-{
-	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
-
-u64 spu_mfc_sr1_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_sr1_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
-
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
-{
-	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
-
-u64 spu_mfc_tclass_id_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_tclass_id_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
-
-void spu_tlb_invalidate(struct spu *spu)
-{
-	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
-}
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
-
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
-{
-	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
-
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
-
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
-{
-	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
-
-u64 spu_resource_allocation_enable_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_enable_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-29 22:54:42.000000000 +0200
@@ -0,0 +1,133 @@
+/*
+ * access to SPU privileged registers
+ */
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include <asm/spu.h>
+
+void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_and);
+
+void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_or);
+
+void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+{
+	out_be64(&spu->priv1->int_mask_RW[class], mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_set);
+
+u64 spu_int_mask_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_mask_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_get);
+
+void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+{
+	out_be64(&spu->priv1->int_stat_RW[class], stat);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_clear);
+
+u64 spu_int_stat_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_stat_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_get);
+
+void spu_int_route_set(struct spu *spu, u64 route)
+{
+	out_be64(&spu->priv1->int_route_RW, route);
+}
+EXPORT_SYMBOL_GPL(spu_int_route_set);
+
+u64 spu_mfc_dar_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dar_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
+
+u64 spu_mfc_dsisr_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dsisr_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
+
+void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+{
+	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
+
+void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+{
+	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
+
+void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+{
+	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
+
+u64 spu_mfc_sr1_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_sr1_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
+
+void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+{
+	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
+
+u64 spu_mfc_tclass_id_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_tclass_id_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
+
+void spu_tlb_invalidate(struct spu *spu)
+{
+	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
+}
+EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
+
+void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+{
+	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
+
+u64 spu_resource_allocation_groupID_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
+
+void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+{
+	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
+
+u64 spu_resource_allocation_enable_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_enable_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: linus-2.6/drivers/net/Kconfig
===================================================================
--- linus-2.6.orig/drivers/net/Kconfig	2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/drivers/net/Kconfig	2006-04-29 22:54:42.000000000 +0200
@@ -2171,7 +2171,7 @@
 
 config SPIDER_NET
 	tristate "Spider Gigabit Ethernet driver"
-	depends on PCI && PPC_CELL
+	depends on PCI && PPC_IBM_CELL_BLADE
 	select FW_LOADER
 	help
 	  This driver supports the Gigabit Ethernet chips present on the

--

Re: [PATCH 11/13] cell: split out board specific files

[Segher Boessenkool]

> Split the Cell BE support into generic and platform
> dependant parts.
>
> Creates a new config variable CONFIG_PPC_IBM_CELL_BLADE.
> The existing CONFIG_PPC_CELL is now used to denote the
> generic Cell processor support.  Also renames spu_priv1.c
> to spu_priv1_mmio.c.

>  config CELL_IIC
> -	depends on PPC_CELL
> +	depends on PPC_IBM_CELL_BLADE
>  	bool
>  	default y

Erm no...  Make this

	depends on PPC_CELL && !SOME_HYPERVISOR_THING

to reflect the _real_ dependency please?  Similar in a few other
places perhaps.


Segher

Re: [PATCH 11/13] cell: split out board specific files

[Geoff Levand]

Segher Boessenkool wrote:
>> Split the Cell BE support into generic and platform
>> dependant parts.
>>
>> Creates a new config variable CONFIG_PPC_IBM_CELL_BLADE.
>> The existing CONFIG_PPC_CELL is now used to denote the
>> generic Cell processor support.  Also renames spu_priv1.c
>> to spu_priv1_mmio.c.
> 
>>  config CELL_IIC
>> -	depends on PPC_CELL
>> +	depends on PPC_IBM_CELL_BLADE
>>  	bool
>>  	default y
> 
> Erm no...  Make this
> 
> 	depends on PPC_CELL && !SOME_HYPERVISOR_THING
> 
> to reflect the _real_ dependency please?  Similar in a few other
> places perhaps.


Seems CELL_IIC is never used.  Must be some stale variable,
so I removed it.  Arnd, could you ack this.

Segher, a problem with your suggestion is that our
makefiles don't have as rich a set of logical ops as the
config files.  Its easy to express 'build A if B', but not
so easy to do 'build A if not C'.  To make this work
cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
so I can have constructions like this in the makefile:

obj-$(CONFIG_PPC_CELL)	+= ...

I also got rid of SPUFS_PRIV1_MMIO, since SPUFS_PRIV1_MMIO
just meant spufs with !SOME_HYPERVISOR_THING.

Updated patch follows.

-Geoff



Split the Cell BPA support into generic and platform
dependant parts.

Creates new config variable CONFIG_PPC_IBM_CELL_BLADE.
Also renames spu_priv1.c to spu_priv1_mmio.c.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>

Index: cell--alp--2/arch/powerpc/Kconfig
===================================================================
--- cell--alp--2.orig/arch/powerpc/Kconfig	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/Kconfig	2006-05-01 15:16:38.000000000 -0700
@@ -391,15 +391,20 @@
 	  For more informations, refer to <http://www.970eval.com>

 config PPC_CELL
-	bool "  Cell Broadband Processor Architecture"
+	bool
+	default n
+
+config PPC_IBM_CELL_BLADE
+	bool "  IBM Cell Blade"
 	depends on PPC_MULTIPLATFORM && PPC64
+	select PPC_CELL
 	select PPC_RTAS
 	select MMIO_NVRAM
 	select PPC_UDBG_16550

 config PPC_SYSTEMSIM
 	bool "  IBM Full System Simulator (systemsim) support"
-	depends on PPC_CELL || PPC_PSERIES || PPC_MAPLE
+	depends on PPC_IBM_CELL_BLADE || PPC_PSERIES || PPC_MAPLE
 	help
 	  Support booting resulting image under IBMs Full System Simulator.
 	  If you enable this option, you are able to select device
@@ -450,11 +455,6 @@
 	depends on PPC_MAPLE
 	default y

-config CELL_IIC
-	depends on PPC_CELL
-	bool
-	default y
-
 config IBMVIO
 	depends on PPC_PSERIES || PPC_ISERIES
 	bool
Index: cell--alp--2/arch/powerpc/configs/cell_defconfig
===================================================================
--- cell--alp--2.orig/arch/powerpc/configs/cell_defconfig	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/configs/cell_defconfig	2006-05-01 15:13:23.000000000 -0700
@@ -116,6 +116,7 @@
 # CONFIG_PPC_PMAC is not set
 # CONFIG_PPC_MAPLE is not set
 CONFIG_PPC_CELL=y
+CONFIG_PPC_IBM_CELL_BLADE=y
 CONFIG_PPC_SYSTEMSIM=y
 # CONFIG_U3_DART is not set
 CONFIG_PPC_RTAS=y
@@ -123,7 +124,6 @@
 CONFIG_RTAS_PROC=y
 CONFIG_RTAS_FLASH=y
 CONFIG_MMIO_NVRAM=y
-CONFIG_CELL_IIC=y
 # CONFIG_PPC_MPC106 is not set
 # CONFIG_CPU_FREQ is not set
 # CONFIG_WANT_EARLY_SERIAL is not set
@@ -133,6 +133,7 @@
 #
 CONFIG_BE_DD2=y
 CONFIG_SPU_FS=m
+CONFIG_SPU_BASE=y
 CONFIG_SPUFS_MMAP=y

 #
Index: cell--alp--2/arch/powerpc/configs/systemsim_defconfig
===================================================================
--- cell--alp--2.orig/arch/powerpc/configs/systemsim_defconfig	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/configs/systemsim_defconfig	2006-05-01 15:13:23.000000000 -0700
@@ -117,6 +117,7 @@
 # CONFIG_PPC_PMAC is not set
 CONFIG_PPC_MAPLE=y
 CONFIG_PPC_CELL=y
+CONFIG_PPC_IBM_CELL_BLADE=y
 CONFIG_PPC_SYSTEMSIM=y
 CONFIG_SYSTEMSIM_IDLE=y
 CONFIG_XICS=y
@@ -128,7 +129,6 @@
 # CONFIG_RTAS_FLASH is not set
 CONFIG_MMIO_NVRAM=y
 CONFIG_MPIC_BROKEN_U3=y
-CONFIG_CELL_IIC=y
 CONFIG_IBMVIO=y
 # CONFIG_IBMEBUS is not set
 # CONFIG_PPC_MPC106 is not set
@@ -139,6 +139,7 @@
 # Cell Broadband Engine options
 #
 CONFIG_SPU_FS=m
+CONFIG_SPU_BASE=y

 #
 # Kernel options
Index: cell--alp--2/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- cell--alp--2.orig/arch/powerpc/platforms/cell/Kconfig	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/platforms/cell/Kconfig	2006-05-01 15:13:23.000000000 -0700
@@ -11,10 +11,15 @@
 	  or may crash other CPUs.
 	  Say 'n' here unless you expect to run on DD2.0 only.

+config SPU_BASE
+	bool
+	default n
+
 config SPU_FS
 	tristate "SPU file system"
 	default m
 	depends on PPC_CELL
+	select SPU_BASE
 	help
 	  The SPU file system is used to access Synergistic Processing
 	  Units on machines implementing the Broadband Processor
Index: cell--alp--2/arch/powerpc/platforms/cell/Makefile
===================================================================
--- cell--alp--2.orig/arch/powerpc/platforms/cell/Makefile	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/platforms/cell/Makefile	2006-05-01 15:17:58.000000000 -0700
@@ -1,14 +1,14 @@
-obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
-obj-y			+= pervasive.o pci.o
-
-obj-$(CONFIG_SMP)	+= smp.o
+obj-$(CONFIG_PPC_CELL)		+= interrupt.o iommu.o setup.o \
+				   spider-pic.o pervasive.o pci.o
+ifeq ($(CONFIG_SMP),y)
+obj-$(CONFIG_PPC_CELL)		+= smp.o
+endif

 # needed only when building loadable spufs.ko
-spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
-obj-y			+= $(spufs-modular-m)
-
-# always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
-obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
-
-obj-$(CONFIG_SPU_FS)	+= spufs/
+spufs-modular-$(CONFIG_SPU_FS)	+= spu_syscalls.o
+obj-$(CONFIG_SPU_BASE)		+= spu_callbacks.o spu_base.o \
+				   $(spufs-modular-m)
+ifdef CONFIG_SPU_FS
+obj-$(CONFIG_PPC_CELL)		+= spu_priv1_mmio.o
+endif
+obj-$(CONFIG_SPU_FS)		+= spufs/
Index: cell--alp--2/arch/powerpc/platforms/cell/spu_priv1.c
===================================================================
--- cell--alp--2.orig/arch/powerpc/platforms/cell/spu_priv1.c	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/arch/powerpc/platforms/cell/spu_priv1.c	2006-04-21 13:04:41.284693750 -0700
@@ -1,142 +0,0 @@
-/*
- * access to SPU privileged registers
- */
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/spu.h>
-
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
-
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
-
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
-{
-	out_be64(&spu->priv1->int_mask_RW[class], mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
-
-u64 spu_int_mask_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_mask_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
-
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
-{
-	out_be64(&spu->priv1->int_stat_RW[class], stat);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
-
-u64 spu_int_stat_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_stat_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
-
-void spu_int_route_set(struct spu *spu, u64 route)
-{
-	out_be64(&spu->priv1->int_route_RW, route);
-}
-EXPORT_SYMBOL_GPL(spu_int_route_set);
-
-u64 spu_mfc_dar_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dar_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
-
-u64 spu_mfc_dsisr_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dsisr_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
-
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
-{
-	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
-
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
-{
-	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
-
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
-{
-	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
-
-u64 spu_mfc_sr1_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_sr1_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
-
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
-{
-	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
-
-u64 spu_mfc_tclass_id_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_tclass_id_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
-
-void spu_smm_pgsz_set(struct spu *spu, u64 pgsz)
-{
-	u64 smm_hid;
-	smm_hid = in_be64(&spu->priv1->smm_hid);
-	smm_hid &= ~(0xfull << 60);
-	smm_hid |= pgsz << 60;
-	out_be64(&spu->priv1->smm_hid, smm_hid);
-}
-
-void spu_tlb_invalidate(struct spu *spu)
-{
-	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
-}
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
-
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
-{
-	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
-
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
-
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
-{
-	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
-
-u64 spu_resource_allocation_enable_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_enable_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: cell--alp--2/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- cell--alp--2.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-21 13:04:41.284693750 -0700
+++ cell--alp--2/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-05-01 15:16:49.000000000 -0700
@@ -0,0 +1,142 @@
+/*
+ * access to SPU privileged registers
+ */
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include <asm/spu.h>
+
+void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_and);
+
+void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_or);
+
+void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+{
+	out_be64(&spu->priv1->int_mask_RW[class], mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_set);
+
+u64 spu_int_mask_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_mask_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_get);
+
+void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+{
+	out_be64(&spu->priv1->int_stat_RW[class], stat);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_clear);
+
+u64 spu_int_stat_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_stat_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_get);
+
+void spu_int_route_set(struct spu *spu, u64 route)
+{
+	out_be64(&spu->priv1->int_route_RW, route);
+}
+EXPORT_SYMBOL_GPL(spu_int_route_set);
+
+u64 spu_mfc_dar_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dar_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
+
+u64 spu_mfc_dsisr_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dsisr_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
+
+void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+{
+	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
+
+void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+{
+	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
+
+void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+{
+	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
+
+u64 spu_mfc_sr1_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_sr1_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
+
+void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+{
+	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
+
+u64 spu_mfc_tclass_id_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_tclass_id_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
+
+void spu_smm_pgsz_set(struct spu *spu, u64 pgsz)
+{
+	u64 smm_hid;
+	smm_hid = in_be64(&spu->priv1->smm_hid);
+	smm_hid &= ~(0xfull << 60);
+	smm_hid |= pgsz << 60;
+	out_be64(&spu->priv1->smm_hid, smm_hid);
+}
+
+void spu_tlb_invalidate(struct spu *spu)
+{
+	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
+}
+EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
+
+void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+{
+	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
+
+u64 spu_resource_allocation_groupID_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
+
+void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+{
+	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
+
+u64 spu_resource_allocation_enable_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_enable_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: cell--alp--2/drivers/net/Kconfig
===================================================================
--- cell--alp--2.orig/drivers/net/Kconfig	2006-05-01 15:13:22.000000000 -0700
+++ cell--alp--2/drivers/net/Kconfig	2006-05-01 15:13:23.000000000 -0700
@@ -2179,7 +2179,7 @@

 config SPIDER_NET
 	tristate "Spider Gigabit Ethernet driver"
-	depends on PCI && PPC_CELL
+	depends on PCI && PPC_IBM_CELL_BLADE
 	select FW_LOADER
 	help
 	  This driver supports the Gigabit Ethernet chips present on the

Re: [PATCH 11/13] cell: split out board specific files

[Segher Boessenkool]

> Segher, a problem with your suggestion is that our
> makefiles don't have as rich a set of logical ops as the
> config files.  Its easy to express 'build A if B', but not
> so easy to do 'build A if not C'.  To make this work
> cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
> so I can have constructions like this in the makefile:

Not just that, but we can have a kernel image supporting both
the "raw" hardware _and_ stuff with a hypervisor underneath.

All CONFIG_<whatever> should always be used as a positive,
never a negative.  My bad :-)

So it really should be

	depends on PPC_CELL_NATIVE

or similar.  Having PPC_CELL mean "native" / "raw" is not the
way to go, there will be many many hypervisors in the future,
it would be nice to have PPC_CELL mean just that, "support for
the Cell architecture" in general, kernels running on various
hypervisors will see the hardware virtualised to varying degrees.


Segher

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

On Tuesday 02 May 2006 01:09, Segher Boessenkool wrote:
> So it really should be
> 
>         depends on PPC_CELL_NATIVE
> 
> or similar.  Having PPC_CELL mean "native" / "raw" is not the
> way to go, there will be many many hypervisors in the future,
> it would be nice to have PPC_CELL mean just that, "support for
> the Cell architecture" in general, kernels running on various
> hypervisors will see the hardware virtualised to varying degrees.
> 
Yes, good point.

	Arnd <><

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

On Tuesday 02 May 2006 00:51, Geoff Levand wrote:
> Seems CELL_IIC is never used.  Must be some stale variable,
> so I removed it.  Arnd, could you ack this.

Yes, I used it before when there was more code shared between
Cell and pSeries, but that is no longer the case.

> Segher, a problem with your suggestion is that our
> makefiles don't have as rich a set of logical ops as the
> config files.  Its easy to express 'build A if B', but not
> so easy to do 'build A if not C'.  To make this work
> cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
> so I can have constructions like this in the makefile:
> 
> obj-$(CONFIG_PPC_CELL)	+= ...
> 
> I also got rid of SPUFS_PRIV1_MMIO, since SPUFS_PRIV1_MMIO
> just meant spufs with !SOME_HYPERVISOR_THING.
> 

I guess that one should really be (SPU_FS && CELL_NATIVE),
using the option Segher suggested now.

> ===================================================================
> --- cell--alp--2.orig/arch/powerpc/Kconfig	2006-05-01 15:13:22.000000000 -0700
> +++ cell--alp--2/arch/powerpc/Kconfig	2006-05-01 15:16:38.000000000 -0700
> @@ -391,15 +391,20 @@
>  	  For more informations, refer to <http://www.970eval.com>
> 
>  config PPC_CELL
> -	bool "  Cell Broadband Processor Architecture"
> +	bool
> +	default n
> +
> +config PPC_IBM_CELL_BLADE
> +	bool "  IBM Cell Blade"
>  	depends on PPC_MULTIPLATFORM && PPC64
> +	select PPC_CELL
>  	select PPC_RTAS
>  	select MMIO_NVRAM
>  	select PPC_UDBG_16550
> 
>  config PPC_SYSTEMSIM
>  	bool "  IBM Full System Simulator (systemsim) support"
> -	depends on PPC_CELL || PPC_PSERIES || PPC_MAPLE
> +	depends on PPC_IBM_CELL_BLADE || PPC_PSERIES || PPC_MAPLE
>  	help
>  	  Support booting resulting image under IBMs Full System Simulator.
>  	  If you enable this option, you are able to select device

whoops, this one should not be there at all. Note that I updated
your previous patch as well to fit into the series for submission,
and that did not include systemsim.

> Index: cell--alp--2/arch/powerpc/platforms/cell/Kconfig
> ===================================================================
> --- cell--alp--2.orig/arch/powerpc/platforms/cell/Kconfig	2006-05-01 15:13:22.000000000 -0700
> +++ cell--alp--2/arch/powerpc/platforms/cell/Kconfig	2006-05-01 15:13:23.000000000 -0700
> @@ -11,10 +11,15 @@
>  	  or may crash other CPUs.
>  	  Say 'n' here unless you expect to run on DD2.0 only.
> 
> +config SPU_BASE
> +	bool
> +	default n
> +
>  config SPU_FS
>  	tristate "SPU file system"
>  	default m
>  	depends on PPC_CELL
> +	select SPU_BASE
>  	help
>  	  The SPU file system is used to access Synergistic Processing
>  	  Units on machines implementing the Broadband Processor
> Index: cell--alp--2/arch/powerpc/platforms/cell/Makefile
> ===================================================================
> --- cell--alp--2.orig/arch/powerpc/platforms/cell/Makefile	2006-05-01 15:13:22.000000000 -0700
> +++ cell--alp--2/arch/powerpc/platforms/cell/Makefile	2006-05-01 15:17:58.000000000 -0700
> @@ -1,14 +1,14 @@
> -obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
> -obj-y			+= pervasive.o pci.o
> -
> -obj-$(CONFIG_SMP)	+= smp.o
> +obj-$(CONFIG_PPC_CELL)		+= interrupt.o iommu.o setup.o \
> +				   spider-pic.o pervasive.o pci.o
> +ifeq ($(CONFIG_SMP),y)
> +obj-$(CONFIG_PPC_CELL)		+= smp.o
> +endif
> 
>  # needed only when building loadable spufs.ko
> -spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
> -obj-y			+= $(spufs-modular-m)
> -
> -# always needed in kernel
> -spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
> -obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
> -
> -obj-$(CONFIG_SPU_FS)	+= spufs/
> +spufs-modular-$(CONFIG_SPU_FS)	+= spu_syscalls.o
> +obj-$(CONFIG_SPU_BASE)		+= spu_callbacks.o spu_base.o \
> +				   $(spufs-modular-m)
> +ifdef CONFIG_SPU_FS
> +obj-$(CONFIG_PPC_CELL)		+= spu_priv1_mmio.o
> +endif

I guess this could then become something like

spu-priv1-$(CONFIG_PPC_CELL_NATIVE)	+= spu_priv1_mmio.o
spufs-modular-$(CONFIG_SPU_FS)		+= spu_syscalls.o
obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
					   $(spufs-modular-m) \
					   $(spu-priv1-y)

> Index: cell--alp--2/drivers/net/Kconfig
> ===================================================================
> --- cell--alp--2.orig/drivers/net/Kconfig	2006-05-01 15:13:22.000000000 -0700
> +++ cell--alp--2/drivers/net/Kconfig	2006-05-01 15:13:23.000000000 -0700
> @@ -2179,7 +2179,7 @@
> 
>  config SPIDER_NET
>  	tristate "Spider Gigabit Ethernet driver"
> -	depends on PCI && PPC_CELL
> +	depends on PCI && PPC_IBM_CELL_BLADE
>  	select FW_LOADER
>  	help
>  	  This driver supports the Gigabit Ethernet chips present on the

Hmm, I'm also no longer sure if this is right. In theory, spidernet
could be used in all sorts of products, wether they are using the
same bridge chip or just the gigabit ethernet macro from it.

For now, I guess you can just leave this one alone if you respin
the patch another time. It's disabled by default, so the dependency
can be updated the next time we get a user in _addition_ to PPC_CELL.

	Arnd <><

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Segher Boessenkool]

>>  config SPIDER_NET
>>  	tristate "Spider Gigabit Ethernet driver"
>> -	depends on PCI && PPC_CELL
>> +	depends on PCI && PPC_IBM_CELL_BLADE
>>  	select FW_LOADER
>>  	help
>>  	  This driver supports the Gigabit Ethernet chips present on the
>
> Hmm, I'm also no longer sure if this is right. In theory, spidernet
> could be used in all sorts of products, wether they are using the
> same bridge chip or just the gigabit ethernet macro from it.
>
> For now, I guess you can just leave this one alone if you respin
> the patch another time. It's disabled by default, so the dependency
> can be updated the next time we get a user in _addition_ to PPC_CELL.

Is there any reason the driver wouldn't build and/or run on other
platforms?  If so, fix it.  If not, just make it

	depends on PCI

?


Segher

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

On Tuesday 02 May 2006 02:06, Segher Boessenkool wrote:
> Is there any reason the driver wouldn't build and/or run on other
> platforms?  If so, fix it.  If not, just make it
> 
>         depends on PCI

Well, it could run on other platforms, except:

- it requires a few properties in the device tree (local-mac-address,
  firmware), so it should also depend on PPC
- It's not actually PCI at all, but on an internal bus that has
  something close enough to a PCI config space.

	Arnd <><

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Segher Boessenkool]

>> Is there any reason the driver wouldn't build and/or run on other
>> platforms?  If so, fix it.  If not, just make it
>>
>>         depends on PCI
>
> Well, it could run on other platforms, except:
>
> - it requires a few properties in the device tree (local-mac-address,
>   firmware), so it should also depend on PPC

The portions of code that require OF should have appropriate #ifdef  
guards.

> - It's not actually PCI at all, but on an internal bus that has
>   something close enough to a PCI config space.

Our emulation should be good enough; if not, holler (off-list).


Segher

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

Am Wednesday 03 May 2006 01:38 schrieb Segher Boessenkool:
> > - it requires a few properties in the device tree (local-mac-address,
> > =A0 firmware), so it should also depend on PPC
>
> The portions of code that require OF should have appropriate #ifdef =A0
> guards.

Why should we? Getting the mac address and the firmware into the
chip is rather essential to make it work. When there is an #ifdef
around that code, it will only produce a non-working driver that can
be compiled everywhere instead of a driver that can only be compiled
on platforms where it has a chance of working.

If someone has the need to make it work somewhere else, it's easy
enough to change to code to whatever other method is used to set up
the chip.

	Arnd <><

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Paul Mackerras]

Segher Boessenkool writes:

> > Well, it could run on other platforms, except:
> >
> > - it requires a few properties in the device tree (local-mac-address,
> >   firmware), so it should also depend on PPC
> 
> The portions of code that require OF should have appropriate #ifdef  
> guards.

So you're suggesting that we change the Makefile so we can *add*
ifdefs?  Usually we do it the other way around. :)

Paul.

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Segher Boessenkool]

>>> Well, it could run on other platforms, except:
>>>
>>> - it requires a few properties in the device tree (local-mac- 
>>> address,
>>>   firmware), so it should also depend on PPC
>>
>> The portions of code that require OF should have appropriate #ifdef
>> guards.
>
> So you're suggesting that we change the Makefile so we can *add*
> ifdefs?  Usually we do it the other way around. :)

Yeah, what was I thinking.  So use some platform hook instead.

But Arnd of course is right; if the driver (currently) only works
on a certain platform, just mark it as such in the Makefile (erm,
Kconfig file).

Hey, we should probably do that with 90% of all drivers.  But that
is a discussion for some other day :-)


Segher

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Benjamin Herrenschmidt]

> Yeah, what was I thinking.  So use some platform hook instead.

You must be smoking good stuff :)

> But Arnd of course is right; if the driver (currently) only works
> on a certain platform, just mark it as such in the Makefile (erm,
> Kconfig file).

Exactly :) I don't see any point in adding hooks or ifdef's or anything
fancy like that to guard from something that doesn't exist in real life:
that is building that driver on non-cell :) Thus Kconfig is the way to
go.

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Geoff Levand]

Arnd Bergmann wrote:
>> I also got rid of SPUFS_PRIV1_MMIO, since SPUFS_PRIV1_MMIO
>> just meant spufs with !SOME_HYPERVISOR_THING.
>> 
> 
> I guess that one should really be (SPU_FS && CELL_NATIVE),
> using the option Segher suggested now.


OK.  I set it up that way.  Updated patch below.


>>  config PPC_SYSTEMSIM
>>  	bool "  IBM Full System Simulator (systemsim) support"
>> -	depends on PPC_CELL || PPC_PSERIES || PPC_MAPLE
>> +	depends on PPC_IBM_CELL_BLADE || PPC_PSERIES || PPC_MAPLE
>>  	help
>>  	  Support booting resulting image under IBMs Full System Simulator.
>>  	  If you enable this option, you are able to select device
> 
> whoops, this one should not be there at all. Note that I updated
> your previous patch as well to fit into the series for submission,
> and that did not include systemsim.


Sorry, didn't notice you changed it.  Fixed now.


>>  # needed only when building loadable spufs.ko
>> -spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
>> -obj-y			+= $(spufs-modular-m)
>> -
>> -# always needed in kernel
>> -spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
>> -obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
>> -
>> -obj-$(CONFIG_SPU_FS)	+= spufs/
>> +spufs-modular-$(CONFIG_SPU_FS)	+= spu_syscalls.o
>> +obj-$(CONFIG_SPU_BASE)		+= spu_callbacks.o spu_base.o \
>> +				   $(spufs-modular-m)
>> +ifdef CONFIG_SPU_FS
>> +obj-$(CONFIG_PPC_CELL)		+= spu_priv1_mmio.o
>> +endif
> 
> I guess this could then become something like
> 
> spu-priv1-$(CONFIG_PPC_CELL_NATIVE)	+= spu_priv1_mmio.o
> spufs-modular-$(CONFIG_SPU_FS)		+= spu_syscalls.o
> obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
> 					   $(spufs-modular-m) \
> 					   $(spu-priv1-y)


Yes, a nice way.


>> --- cell--alp--2.orig/drivers/net/Kconfig	2006-05-01 15:13:22.000000000 -0700
>> +++ cell--alp--2/drivers/net/Kconfig	2006-05-01 15:13:23.000000000 -0700
>> @@ -2179,7 +2179,7 @@
>> 
>>  config SPIDER_NET
>>  	tristate "Spider Gigabit Ethernet driver"
>> -	depends on PCI && PPC_CELL
>> +	depends on PCI && PPC_IBM_CELL_BLADE
>>  	select FW_LOADER
>>  	help
>>  	  This driver supports the Gigabit Ethernet chips present on the
> 
> Hmm, I'm also no longer sure if this is right. In theory, spidernet
> could be used in all sorts of products, wether they are using the
> same bridge chip or just the gigabit ethernet macro from it.
> 
> For now, I guess you can just leave this one alone if you respin
> the patch another time. It's disabled by default, so the dependency
> can be updated the next time we get a user in _addition_ to PPC_CELL.


OK, based on your other mail I just left it as PCI && PPC_IBM_CELL_BLADE.
We can change it when another system uses it.


-Geoff


Split the Cell BE support into generic and platform dependent parts.

Creates new config variables PPC_CELL_NATIVE and PPC_IBM_CELL_BLADE.
The existing CONFIG_PPC_CELL is now used to denote the generic
Cell processor support.

Also renames spu_priv1.c to spu_priv1_mmio.c.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Index: cell--alp--3/arch/powerpc/Kconfig
===================================================================
--- cell--alp--3.orig/arch/powerpc/Kconfig	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/arch/powerpc/Kconfig	2006-05-02 10:11:42.000000000 -0700
@@ -391,8 +391,18 @@
 	  For more informations, refer to <http://www.970eval.com>

 config PPC_CELL
-	bool "  Cell Broadband Processor Architecture"
+	bool
+	default n
+
+config PPC_CELL_NATIVE
+	bool
+	select PPC_CELL
+	default n
+
+config PPC_IBM_CELL_BLADE
+	bool "  IBM Cell Blade"
 	depends on PPC_MULTIPLATFORM && PPC64
+	select PPC_CELL_NATIVE
 	select PPC_RTAS
 	select MMIO_NVRAM
 	select PPC_UDBG_16550
@@ -439,11 +449,6 @@
 	depends on PPC_MAPLE
 	default y

-config CELL_IIC
-	depends on PPC_CELL
-	bool
-	default y
-
 config IBMVIO
 	depends on PPC_PSERIES || PPC_ISERIES
 	bool
Index: cell--alp--3/arch/powerpc/configs/cell_defconfig
===================================================================
--- cell--alp--3.orig/arch/powerpc/configs/cell_defconfig	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/arch/powerpc/configs/cell_defconfig	2006-05-02 10:12:22.000000000 -0700
@@ -118,13 +118,14 @@
 # CONFIG_PPC_PMAC is not set
 # CONFIG_PPC_MAPLE is not set
 CONFIG_PPC_CELL=y
+CONFIG_PPC_CELL_NATIVE=y
+CONFIG_PPC_IBM_CELL_BLADE=y
 # CONFIG_U3_DART is not set
 CONFIG_PPC_RTAS=y
 # CONFIG_RTAS_ERROR_LOGGING is not set
 CONFIG_RTAS_PROC=y
 CONFIG_RTAS_FLASH=y
 CONFIG_MMIO_NVRAM=y
-CONFIG_CELL_IIC=y
 # CONFIG_PPC_MPC106 is not set
 # CONFIG_CPU_FREQ is not set
 # CONFIG_WANT_EARLY_SERIAL is not set
@@ -133,6 +134,7 @@
 # Cell Broadband Engine options
 #
 CONFIG_SPU_FS=m
+CONFIG_SPU_BASE=y
 CONFIG_SPUFS_MMAP=y

 #
Index: cell--alp--3/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- cell--alp--3.orig/arch/powerpc/platforms/cell/Kconfig	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/arch/powerpc/platforms/cell/Kconfig	2006-05-02 10:14:05.000000000 -0700
@@ -5,11 +5,16 @@
 	tristate "SPU file system"
 	default m
 	depends on PPC_CELL
+	select SPU_BASE
 	help
 	  The SPU file system is used to access Synergistic Processing
 	  Units on machines implementing the Broadband Processor
 	  Architecture.

+config SPU_BASE
+	bool
+	default n
+
 config SPUFS_MMAP
 	bool
 	depends on SPU_FS && SPARSEMEM && !PPC_64K_PAGES
Index: cell--alp--3/arch/powerpc/platforms/cell/Makefile
===================================================================
--- cell--alp--3.orig/arch/powerpc/platforms/cell/Makefile	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/arch/powerpc/platforms/cell/Makefile	2006-05-02 10:39:27.000000000 -0700
@@ -1,14 +1,14 @@
-obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
-obj-y			+= pervasive.o
+obj-$(CONFIG_PPC_CELL_NATIVE)		+= interrupt.o iommu.o setup.o \
+					   spider-pic.o pervasive.o

-obj-$(CONFIG_SMP)	+= smp.o
+ifeq ($(CONFIG_SMP),y)
+obj-$(CONFIG_PPC_CELL_NATIVE)		+= smp.o
+endif

 # needed only when building loadable spufs.ko
-spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
-obj-y			+= $(spufs-modular-m)
+spufs-modular-$(CONFIG_SPU_FS)		+= spu_syscalls.o
+spu-priv1-$(CONFIG_PPC_CELL_NATIVE)	+= spu_priv1_mmio.o

-# always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o
-obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
-
-obj-$(CONFIG_SPU_FS)	+= spufs/
+obj-$(CONFIG_SPU_BASE)			+= spu_callbacks.o spu_base.o \
+					   $(spufs-modular-m) $(spu-priv1-y)
+obj-$(CONFIG_SPU_FS)			+= spufs/
Index: cell--alp--3/arch/powerpc/platforms/cell/spu_priv1.c
===================================================================
--- cell--alp--3.orig/arch/powerpc/platforms/cell/spu_priv1.c	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/arch/powerpc/platforms/cell/spu_priv1.c	2006-05-01 17:06:59.032678000 -0700
@@ -1,133 +0,0 @@
-/*
- * access to SPU privileged registers
- */
-#include <linux/module.h>
-
-#include <asm/io.h>
-#include <asm/spu.h>
-
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
-
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
-{
-	u64 old_mask;
-
-	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
-	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
-
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
-{
-	out_be64(&spu->priv1->int_mask_RW[class], mask);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
-
-u64 spu_int_mask_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_mask_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
-
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
-{
-	out_be64(&spu->priv1->int_stat_RW[class], stat);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
-
-u64 spu_int_stat_get(struct spu *spu, int class)
-{
-	return in_be64(&spu->priv1->int_stat_RW[class]);
-}
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
-
-void spu_int_route_set(struct spu *spu, u64 route)
-{
-	out_be64(&spu->priv1->int_route_RW, route);
-}
-EXPORT_SYMBOL_GPL(spu_int_route_set);
-
-u64 spu_mfc_dar_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dar_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
-
-u64 spu_mfc_dsisr_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_dsisr_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
-
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
-{
-	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
-
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
-{
-	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
-
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
-{
-	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
-
-u64 spu_mfc_sr1_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_sr1_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
-
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
-{
-	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
-
-u64 spu_mfc_tclass_id_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->mfc_tclass_id_RW);
-}
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
-
-void spu_tlb_invalidate(struct spu *spu)
-{
-	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
-}
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
-
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
-{
-	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
-
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
-
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
-{
-	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
-
-u64 spu_resource_allocation_enable_get(struct spu *spu)
-{
-	return in_be64(&spu->priv1->resource_allocation_enable_RW);
-}
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: cell--alp--3/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- cell--alp--3.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-05-01 17:06:59.032678000 -0700
+++ cell--alp--3/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-05-02 10:11:42.000000000 -0700
@@ -0,0 +1,133 @@
+/*
+ * access to SPU privileged registers
+ */
+#include <linux/module.h>
+
+#include <asm/io.h>
+#include <asm/spu.h>
+
+void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_and);
+
+void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+{
+	u64 old_mask;
+
+	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
+	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_or);
+
+void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+{
+	out_be64(&spu->priv1->int_mask_RW[class], mask);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_set);
+
+u64 spu_int_mask_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_mask_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_mask_get);
+
+void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+{
+	out_be64(&spu->priv1->int_stat_RW[class], stat);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_clear);
+
+u64 spu_int_stat_get(struct spu *spu, int class)
+{
+	return in_be64(&spu->priv1->int_stat_RW[class]);
+}
+EXPORT_SYMBOL_GPL(spu_int_stat_get);
+
+void spu_int_route_set(struct spu *spu, u64 route)
+{
+	out_be64(&spu->priv1->int_route_RW, route);
+}
+EXPORT_SYMBOL_GPL(spu_int_route_set);
+
+u64 spu_mfc_dar_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dar_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
+
+u64 spu_mfc_dsisr_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_dsisr_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
+
+void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+{
+	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
+
+void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+{
+	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
+
+void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+{
+	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
+
+u64 spu_mfc_sr1_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_sr1_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
+
+void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+{
+	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
+
+u64 spu_mfc_tclass_id_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->mfc_tclass_id_RW);
+}
+EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
+
+void spu_tlb_invalidate(struct spu *spu)
+{
+	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
+}
+EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
+
+void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+{
+	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
+
+u64 spu_resource_allocation_groupID_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
+
+void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+{
+	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
+
+u64 spu_resource_allocation_enable_get(struct spu *spu)
+{
+	return in_be64(&spu->priv1->resource_allocation_enable_RW);
+}
+EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
Index: cell--alp--3/drivers/net/Kconfig
===================================================================
--- cell--alp--3.orig/drivers/net/Kconfig	2006-05-02 10:10:52.000000000 -0700
+++ cell--alp--3/drivers/net/Kconfig	2006-05-02 10:11:42.000000000 -0700
@@ -2171,7 +2171,7 @@

 config SPIDER_NET
 	tristate "Spider Gigabit Ethernet driver"
-	depends on PCI && PPC_CELL
+	depends on PCI && PPC_IBM_CELL_BLADE
 	select FW_LOADER
 	help
 	  This driver supports the Gigabit Ethernet chips present on the

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Arnd Bergmann]

Am Tuesday 02 May 2006 20:20 schrieb Geoff Levand:
> Split the Cell BE support into generic and platform dependent parts.
>
> Creates new config variables PPC_CELL_NATIVE and PPC_IBM_CELL_BLADE.
> The existing CONFIG_PPC_CELL is now used to denote the generic
> Cell processor support.
>
> Also renames spu_priv1.c to spu_priv1_mmio.c.

Ok, looks good now.

> Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Acked-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specific files

[Michael Ellerman]

[-- Attachment #1: Type: text/plain, Size: 1598 bytes --]

On Mon, 2006-05-01 at 15:51 -0700, Geoff Levand wrote:
> Segher, a problem with your suggestion is that our
> makefiles don't have as rich a set of logical ops as the
> config files.  Its easy to express 'build A if B', but not
> so easy to do 'build A if not C'.  To make this work
> cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
> so I can have constructions like this in the makefile:
> 
> obj-$(CONFIG_PPC_CELL)	+= ...

Hi Geoff,

I've been ignoring this discussion, but now that I read it I think this
is all kinda backwards.

PPC_CELL should not denote !SOME_HYPERVISOR, it should just mean "basic
cell support", ie. PPC_CELL gets you platforms/cell built in.

Then we can have SOME_HYPERVISOR which _adds_ support for that
hypervisor. And PPC_CELL_BLADE which selects things which are actually
specific to that hardware, like SPIDERNET etc.

But SOME_HYPERVISOR should not remove support for running on bare metal,
it should just give you the option of running on the hypervisor. Yes
that may require testing things at runtime, that's what
firmware_has_feature() is for.

The goal should be that we have one kernel which can boot on all Cell
implementations. In fact the ultimate goal is to have one kernel that
can boot any platform under powerpc, that's a way off still, but we
don't want to start going backwards.

cheers

-- 
Michael Ellerman
IBM OzLabs

wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)

We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person

[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 191 bytes --]

Re: [Cbe-oss-dev] [PATCH 11/13] cell: split out board specificfil es

[Geoff Levand]

Michael Ellerman wrote:
> On Mon, 2006-05-01 at 15:51 -0700, Geoff Levand wrote:
>> Segher, a problem with your suggestion is that our
>> makefiles don't have as rich a set of logical ops as the
>> config files.  Its easy to express 'build A if B', but not
>> so easy to do 'build A if not C'.  To make this work
>> cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
>> so I can have constructions like this in the makefile:
>> 
>> obj-$(CONFIG_PPC_CELL)	+= ...
> 
> Hi Geoff,
> 
> I've been ignoring this discussion, but now that I read it I think this
> is all kinda backwards.
> 
> PPC_CELL should not denote !SOME_HYPERVISOR, it should just mean "basic
> cell support", ie. PPC_CELL gets you platforms/cell built in.


Yes, that's the way I originally made it, and I switched it back
to that in the latest patch.


> Then we can have SOME_HYPERVISOR which _adds_ support for that
> hypervisor. And PPC_CELL_BLADE which selects things which are actually
> specific to that hardware, like SPIDERNET etc.
> But SOME_HYPERVISOR should not remove support for running on bare metal,
> it should just give you the option of running on the hypervisor. Yes
> that may require testing things at runtime, that's what
> firmware_has_feature() is for.


I feel you're missing one thing though, we need PPC_CELL_NATIVE.  We
don't want to build that in if we don't need it.  Here's what I setup:

PPC_CELL = make descends into platforms/cell
PPC_CELL_NATIVE = add bare metal support
PPC_IBM_CELL_BLADE = add blade device drivers, etc.


> The goal should be that we have one kernel which can boot on all Cell
> implementations. In fact the ultimate goal is to have one kernel that
> can boot any platform under powerpc, that's a way off still, but we
> don't want to start going backwards.


Yes, that's the whole idea of this patch.  It comes from my patch set
'cell: support multi-platform image'...  But we also need to be able
to build in only the support needed.  This is an important requirement
for consumer products, to reduce the image size.

In a certain class of products the kernel image and read-only parts
of the file system are stored on flash.  A smaller kernel means more
space for applications.  Also, a smaller kernel image loads faster.
Device startup time is very important for many consumer products.


-Geoff

Re: [PATCH 11/13] cell: split out board specific files

[Christoph Hellwig]

On Mon, May 01, 2006 at 03:51:35PM -0700, Geoff Levand wrote:
> makefiles don't have as rich a set of logical ops as the
> config files.  Its easy to express 'build A if B', but not
> so easy to do 'build A if not C'.  To make this work
> cleanly I made PPC_CELL denote !SOME_HYPERVISOR_THING,
> so I can have constructions like this in the makefile:
> 
> obj-$(CONFIG_PPC_CELL)	+= ...
> 
> I also got rid of SPUFS_PRIV1_MMIO, since SPUFS_PRIV1_MMIO
> just meant spufs with !SOME_HYPERVISOR_THING.

The Kconfig files has lots of nice operators.

Anyway, until we actually have the cell common hypervisor interface
out in the public adding any support for it in Kconfig or the
Makefile is completely pointless, and a patch like this even when
done correctly shouldn't go in.


> Split the Cell BPA support into generic and platform
> dependant parts.
> 
> Creates new config variable CONFIG_PPC_IBM_CELL_BLADE.

That's wrong.  Most of these files will be needed to support
the PS3 when running on bare hardware.  The right option will
be CELL_SPIDER_HARDWARE, which is right now the only cell
hardware generation supported.  It'll become meaningfull when
adding axon support.

[PATCH 12/13] cell: abstract priviledge-1 SPU registers for hypervisors

[Arnd Bergmann]

 From: Geoff Levand <geoffrey.levand@am.sony.com>

To support multi-platform binaries the spu hypervisor accessor
routines must have runtime binding.

I removed the existing statically linked routines in spu.h
and spu_priv1_mmio.c and created new accessor routines in spu_priv1.h
that operate indirectly through an ops struct spu_priv1_ops.
spu_priv1_mmio.c contains the instance of the accessor routines
for running on raw hardware.

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/setup.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/setup.c	2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/setup.c	2006-04-29 23:13:06.000000000 +0200
@@ -46,6 +46,7 @@
 #include <asm/cputable.h>
 #include <asm/ppc-pci.h>
 #include <asm/irq.h>
+#include <asm/spu_priv1.h>
 
 #include "interrupt.h"
 #include "iommu.h"
@@ -149,6 +150,9 @@
 {
 	ppc_md.init_IRQ       = iic_init_IRQ;
 	ppc_md.get_irq        = iic_get_irq;
+#ifdef CONFIG_SPU_BASE
+	spu_priv1_ops         = &spu_priv1_mmio_ops;
+#endif
 
 #ifdef CONFIG_SMP
 	smp_init_cell();
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 23:12:16.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 23:13:06.000000000 +0200
@@ -34,10 +34,15 @@
 #include <asm/prom.h>
 #include <linux/mutex.h>
 #include <asm/spu.h>
+#include <asm/spu_priv1.h>
 #include <asm/mmu_context.h>
 
 #include "interrupt.h"
 
+const struct spu_priv1_ops *spu_priv1_ops;
+
+EXPORT_SYMBOL_GPL(spu_priv1_ops);
+
 static int __spu_trap_invalid_dma(struct spu *spu)
 {
 	pr_debug("%s\n", __FUNCTION__);
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-29 23:12:55.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-29 23:13:06.000000000 +0200
@@ -1,133 +1,155 @@
 /*
- * access to SPU privileged registers
+ * spu hypervisor abstraction for direct hardware access.
+ *
+ *  (C) Copyright IBM Deutschland Entwicklung GmbH 2005
+ *  Copyright 2006 Sony Corp.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
+
 #include <linux/module.h>
 
 #include <asm/io.h>
 #include <asm/spu.h>
+#include <asm/spu_priv1.h>
 
-void spu_int_mask_and(struct spu *spu, int class, u64 mask)
+static void int_mask_and(struct spu *spu, int class, u64 mask)
 {
 	u64 old_mask;
 
 	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
 	out_be64(&spu->priv1->int_mask_RW[class], old_mask & mask);
 }
-EXPORT_SYMBOL_GPL(spu_int_mask_and);
 
-void spu_int_mask_or(struct spu *spu, int class, u64 mask)
+static void int_mask_or(struct spu *spu, int class, u64 mask)
 {
 	u64 old_mask;
 
 	old_mask = in_be64(&spu->priv1->int_mask_RW[class]);
 	out_be64(&spu->priv1->int_mask_RW[class], old_mask | mask);
 }
-EXPORT_SYMBOL_GPL(spu_int_mask_or);
 
-void spu_int_mask_set(struct spu *spu, int class, u64 mask)
+static void int_mask_set(struct spu *spu, int class, u64 mask)
 {
 	out_be64(&spu->priv1->int_mask_RW[class], mask);
 }
-EXPORT_SYMBOL_GPL(spu_int_mask_set);
 
-u64 spu_int_mask_get(struct spu *spu, int class)
+static u64 int_mask_get(struct spu *spu, int class)
 {
 	return in_be64(&spu->priv1->int_mask_RW[class]);
 }
-EXPORT_SYMBOL_GPL(spu_int_mask_get);
 
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat)
+static void int_stat_clear(struct spu *spu, int class, u64 stat)
 {
 	out_be64(&spu->priv1->int_stat_RW[class], stat);
 }
-EXPORT_SYMBOL_GPL(spu_int_stat_clear);
 
-u64 spu_int_stat_get(struct spu *spu, int class)
+static u64 int_stat_get(struct spu *spu, int class)
 {
 	return in_be64(&spu->priv1->int_stat_RW[class]);
 }
-EXPORT_SYMBOL_GPL(spu_int_stat_get);
 
-void spu_int_route_set(struct spu *spu, u64 route)
+static void int_route_set(struct spu *spu, u64 route)
 {
 	out_be64(&spu->priv1->int_route_RW, route);
 }
-EXPORT_SYMBOL_GPL(spu_int_route_set);
 
-u64 spu_mfc_dar_get(struct spu *spu)
+static u64 mfc_dar_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->mfc_dar_RW);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_dar_get);
 
-u64 spu_mfc_dsisr_get(struct spu *spu)
+static u64 mfc_dsisr_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->mfc_dsisr_RW);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_get);
 
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr)
+static void mfc_dsisr_set(struct spu *spu, u64 dsisr)
 {
 	out_be64(&spu->priv1->mfc_dsisr_RW, dsisr);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_dsisr_set);
 
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr)
+static void mfc_sdr_set(struct spu *spu, u64 sdr)
 {
 	out_be64(&spu->priv1->mfc_sdr_RW, sdr);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_sdr_set);
 
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1)
+static void mfc_sr1_set(struct spu *spu, u64 sr1)
 {
 	out_be64(&spu->priv1->mfc_sr1_RW, sr1);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_set);
 
-u64 spu_mfc_sr1_get(struct spu *spu)
+static u64 mfc_sr1_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->mfc_sr1_RW);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_sr1_get);
 
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
+static void mfc_tclass_id_set(struct spu *spu, u64 tclass_id)
 {
 	out_be64(&spu->priv1->mfc_tclass_id_RW, tclass_id);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_set);
 
-u64 spu_mfc_tclass_id_get(struct spu *spu)
+static u64 mfc_tclass_id_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->mfc_tclass_id_RW);
 }
-EXPORT_SYMBOL_GPL(spu_mfc_tclass_id_get);
 
-void spu_tlb_invalidate(struct spu *spu)
+static void tlb_invalidate(struct spu *spu)
 {
 	out_be64(&spu->priv1->tlb_invalidate_entry_W, 0ul);
 }
-EXPORT_SYMBOL_GPL(spu_tlb_invalidate);
 
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id)
+static void resource_allocation_groupID_set(struct spu *spu, u64 id)
 {
 	out_be64(&spu->priv1->resource_allocation_groupID_RW, id);
 }
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_set);
 
-u64 spu_resource_allocation_groupID_get(struct spu *spu)
+static u64 resource_allocation_groupID_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->resource_allocation_groupID_RW);
 }
-EXPORT_SYMBOL_GPL(spu_resource_allocation_groupID_get);
 
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable)
+static void resource_allocation_enable_set(struct spu *spu, u64 enable)
 {
 	out_be64(&spu->priv1->resource_allocation_enable_RW, enable);
 }
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_set);
 
-u64 spu_resource_allocation_enable_get(struct spu *spu)
+static u64 resource_allocation_enable_get(struct spu *spu)
 {
 	return in_be64(&spu->priv1->resource_allocation_enable_RW);
 }
-EXPORT_SYMBOL_GPL(spu_resource_allocation_enable_get);
+
+const struct spu_priv1_ops spu_priv1_mmio_ops =
+{
+	.int_mask_and = int_mask_and,
+	.int_mask_or = int_mask_or,
+	.int_mask_set = int_mask_set,
+	.int_mask_get = int_mask_get,
+	.int_stat_clear = int_stat_clear,
+	.int_stat_get = int_stat_get,
+	.int_route_set = int_route_set,
+	.mfc_dar_get = mfc_dar_get,
+	.mfc_dsisr_get = mfc_dsisr_get,
+	.mfc_dsisr_set = mfc_dsisr_set,
+	.mfc_sdr_set = mfc_sdr_set,
+	.mfc_sr1_set = mfc_sr1_set,
+	.mfc_sr1_get = mfc_sr1_get,
+	.mfc_tclass_id_set = mfc_tclass_id_set,
+	.mfc_tclass_id_get = mfc_tclass_id_get,
+	.tlb_invalidate = tlb_invalidate,
+	.resource_allocation_groupID_set = resource_allocation_groupID_set,
+	.resource_allocation_groupID_get = resource_allocation_groupID_get,
+	.resource_allocation_enable_set = resource_allocation_enable_set,
+	.resource_allocation_enable_get = resource_allocation_enable_get,
+};
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/hw_ops.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/hw_ops.c	2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/hw_ops.c	2006-04-29 23:13:06.000000000 +0200
@@ -32,6 +32,7 @@
 
 #include <asm/io.h>
 #include <asm/spu.h>
+#include <asm/spu_priv1.h>
 #include <asm/spu_csa.h>
 #include <asm/mmu_context.h>
 #include "spufs.h"
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/switch.c	2006-04-29 23:12:15.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/switch.c	2006-04-29 23:13:06.000000000 +0200
@@ -46,6 +46,7 @@
 
 #include <asm/io.h>
 #include <asm/spu.h>
+#include <asm/spu_priv1.h>
 #include <asm/spu_csa.h>
 #include <asm/mmu_context.h>
 
Index: linus-2.6/include/asm-powerpc/spu.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/spu.h	2006-04-29 23:12:16.000000000 +0200
+++ linus-2.6/include/asm-powerpc/spu.h	2006-04-29 23:13:06.000000000 +0200
@@ -181,29 +181,6 @@
 #endif /* MODULE */
 
 
-/* access to priv1 registers */
-void spu_int_mask_and(struct spu *spu, int class, u64 mask);
-void spu_int_mask_or(struct spu *spu, int class, u64 mask);
-void spu_int_mask_set(struct spu *spu, int class, u64 mask);
-u64 spu_int_mask_get(struct spu *spu, int class);
-void spu_int_stat_clear(struct spu *spu, int class, u64 stat);
-u64 spu_int_stat_get(struct spu *spu, int class);
-void spu_int_route_set(struct spu *spu, u64 route);
-u64 spu_mfc_dar_get(struct spu *spu);
-u64 spu_mfc_dsisr_get(struct spu *spu);
-void spu_mfc_dsisr_set(struct spu *spu, u64 dsisr);
-void spu_mfc_sdr_set(struct spu *spu, u64 sdr);
-void spu_mfc_sr1_set(struct spu *spu, u64 sr1);
-u64 spu_mfc_sr1_get(struct spu *spu);
-void spu_mfc_tclass_id_set(struct spu *spu, u64 tclass_id);
-u64 spu_mfc_tclass_id_get(struct spu *spu);
-void spu_tlb_invalidate(struct spu *spu);
-void spu_resource_allocation_groupID_set(struct spu *spu, u64 id);
-u64 spu_resource_allocation_groupID_get(struct spu *spu);
-void spu_resource_allocation_enable_set(struct spu *spu, u64 enable);
-u64 spu_resource_allocation_enable_get(struct spu *spu);
-
-
 /*
  * This defines the Local Store, Problem Area and Privlege Area of an SPU.
  */
Index: linus-2.6/include/asm-powerpc/spu_priv1.h
===================================================================
--- /dev/null	1970-01-01 00:00:00.000000000 +0000
+++ linus-2.6/include/asm-powerpc/spu_priv1.h	2006-04-29 23:13:06.000000000 +0200
@@ -0,0 +1,189 @@
+/*
+ * Defines an spu hypervisor abstraction layer.
+ *
+ *  Copyright 2006 Sony Corp.
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; version 2 of the License.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#if !defined(_SPU_PRIV1_H)
+#define _SPU_PRIV1_H
+#if defined(__KERNEL__)
+
+struct spu;
+
+/* access to priv1 registers */
+
+struct spu_priv1_ops
+{
+	void (*int_mask_and) (struct spu *spu, int class, u64 mask);
+	void (*int_mask_or) (struct spu *spu, int class, u64 mask);
+	void (*int_mask_set) (struct spu *spu, int class, u64 mask);
+	u64 (*int_mask_get) (struct spu *spu, int class);
+	void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
+	u64 (*int_stat_get) (struct spu *spu, int class);
+	void (*int_route_set) (struct spu *spu, u64 route);
+	u64 (*mfc_dar_get) (struct spu *spu);
+	u64 (*mfc_dsisr_get) (struct spu *spu);
+	void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
+	void (*mfc_sdr_set) (struct spu *spu, u64 sdr);
+	void (*mfc_sr1_set) (struct spu *spu, u64 sr1);
+	u64 (*mfc_sr1_get) (struct spu *spu);
+	void (*mfc_tclass_id_set) (struct spu *spu, u64 tclass_id);
+	u64 (*mfc_tclass_id_get) (struct spu *spu);
+	void (*smm_pgsz_set) (struct spu *spu, u64 pgsz);
+	void (*tlb_invalidate) (struct spu *spu);
+	void (*resource_allocation_groupID_set) (struct spu *spu, u64 id);
+	u64 (*resource_allocation_groupID_get) (struct spu *spu);
+	void (*resource_allocation_enable_set) (struct spu *spu, u64 enable);
+	u64 (*resource_allocation_enable_get) (struct spu *spu);
+};
+
+extern const struct spu_priv1_ops* spu_priv1_ops;
+
+static inline void
+spu_int_mask_and (struct spu *spu, int class, u64 mask)
+{
+	spu_priv1_ops->int_mask_and(spu, class, mask);
+}
+
+static inline void
+spu_int_mask_or (struct spu *spu, int class, u64 mask)
+{
+	spu_priv1_ops->int_mask_or(spu, class, mask);
+}
+
+static inline void
+spu_int_mask_set (struct spu *spu, int class, u64 mask)
+{
+	spu_priv1_ops->int_mask_set(spu, class, mask);
+}
+
+static inline u64
+spu_int_mask_get (struct spu *spu, int class)
+{
+	return spu_priv1_ops->int_mask_get(spu, class);
+}
+
+static inline void
+spu_int_stat_clear (struct spu *spu, int class, u64 stat)
+{
+	spu_priv1_ops->int_stat_clear(spu, class, stat);
+}
+
+static inline u64
+spu_int_stat_get (struct spu *spu, int class)
+{
+	return spu_priv1_ops->int_stat_get (spu, class);
+}
+
+static inline void
+spu_int_route_set (struct spu *spu, u64 route)
+{
+	spu_priv1_ops->int_stat_get(spu, route);
+}
+
+static inline u64
+spu_mfc_dar_get (struct spu *spu)
+{
+	return spu_priv1_ops->mfc_dar_get(spu);
+}
+
+static inline u64
+spu_mfc_dsisr_get (struct spu *spu)
+{
+	return spu_priv1_ops->mfc_dsisr_get(spu);
+}
+
+static inline void
+spu_mfc_dsisr_set (struct spu *spu, u64 dsisr)
+{
+	spu_priv1_ops->mfc_dsisr_set(spu, dsisr);
+}
+
+static inline void
+spu_mfc_sdr_set (struct spu *spu, u64 sdr)
+{
+	spu_priv1_ops->mfc_sdr_set(spu, sdr);
+}
+
+static inline void
+spu_mfc_sr1_set (struct spu *spu, u64 sr1)
+{
+	spu_priv1_ops->mfc_sr1_set(spu, sr1);
+}
+
+static inline u64
+spu_mfc_sr1_get (struct spu *spu)
+{
+	return spu_priv1_ops->mfc_sr1_get(spu);
+}
+
+static inline void
+spu_mfc_tclass_id_set (struct spu *spu, u64 tclass_id)
+{
+	spu_priv1_ops->mfc_tclass_id_set(spu, tclass_id);
+}
+
+static inline u64
+spu_mfc_tclass_id_get (struct spu *spu)
+{
+	return spu_priv1_ops->mfc_tclass_id_get(spu);
+}
+
+static inline void
+spu_smm_pgsz_set (struct spu *spu, u64 pgsz)
+{
+	spu_priv1_ops->smm_pgsz_set(spu, pgsz);
+}
+
+static inline void
+spu_tlb_invalidate (struct spu *spu)
+{
+	spu_priv1_ops->tlb_invalidate(spu);
+}
+
+static inline void
+spu_resource_allocation_groupID_set (struct spu *spu, u64 id)
+{
+	spu_priv1_ops->resource_allocation_groupID_set(spu, id);
+}
+
+static inline u64
+spu_resource_allocation_groupID_get (struct spu *spu)
+{
+	return spu_priv1_ops->resource_allocation_groupID_get(spu);
+}
+
+static inline void
+spu_resource_allocation_enable_set (struct spu *spu, u64 enable)
+{
+	spu_priv1_ops->resource_allocation_enable_set(spu, enable);
+}
+
+static inline u64
+spu_resource_allocation_enable_get (struct spu *spu)
+{
+	return spu_priv1_ops->resource_allocation_enable_get(spu);
+}
+
+/* The declarations folowing are put here for convenience
+ * and only intended to be used by the platform setup code
+ * for initializing spu_priv1_ops.
+ */
+
+extern const struct spu_priv1_ops spu_priv1_mmio_ops;
+
+#endif /* __KERNEL__ */
+#endif

--

[PATCH 13/13] cell: set SPU interrupt affinity in spu_priv1 code

[Arnd Bergmann]

 From: Geoff Levand <geoffrey.levand@am.sony.com>

This changes the hypervisor abstraction of setting cpu affinity to a
higher level to avoid platform dependent interrupt controller
routines.  I replaced spu_priv1_ops:spu_int_route_set() with a
new routine spu_priv1_ops:spu_cpu_affinity_set().

As a by-product, this change eliminated what looked like an
existing bug in the set affinity code where spu_int_route_set()
mistakenly called int_stat_get().

Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_base.c	2006-04-29 22:57:08.000000000 +0200
@@ -522,14 +522,6 @@
 	return ret;
 }
 
-void spu_irq_setaffinity(struct spu *spu, int cpu)
-{
-	u64 target = iic_get_target_id(cpu);
-	u64 route = target << 48 | target << 32 | target << 16;
-	spu_int_route_set(spu, route);
-}
-EXPORT_SYMBOL_GPL(spu_irq_setaffinity);
-
 static void __iomem * __init map_spe_prop(struct device_node *n,
 						 const char *name)
 {
Index: linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spu_priv1_mmio.c	2006-04-29 22:56:37.000000000 +0200
@@ -24,6 +24,8 @@
 #include <asm/spu.h>
 #include <asm/spu_priv1.h>
 
+#include "interrupt.h"
+
 static void int_mask_and(struct spu *spu, int class, u64 mask)
 {
 	u64 old_mask;
@@ -60,8 +62,10 @@
 	return in_be64(&spu->priv1->int_stat_RW[class]);
 }
 
-static void int_route_set(struct spu *spu, u64 route)
+static void cpu_affinity_set(struct spu *spu, int cpu)
 {
+	u64 target = iic_get_target_id(cpu);
+	u64 route = target << 48 | target << 32 | target << 16;
 	out_be64(&spu->priv1->int_route_RW, route);
 }
 
@@ -138,7 +142,7 @@
 	.int_mask_get = int_mask_get,
 	.int_stat_clear = int_stat_clear,
 	.int_stat_get = int_stat_get,
-	.int_route_set = int_route_set,
+	.cpu_affinity_set = cpu_affinity_set,
 	.mfc_dar_get = mfc_dar_get,
 	.mfc_dsisr_get = mfc_dsisr_get,
 	.mfc_dsisr_set = mfc_dsisr_set,
Index: linus-2.6/arch/powerpc/platforms/cell/spufs/sched.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/spufs/sched.c	2006-04-29 22:53:50.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/spufs/sched.c	2006-04-29 22:56:37.000000000 +0200
@@ -43,6 +43,7 @@
 #include <asm/mmu_context.h>
 #include <asm/spu.h>
 #include <asm/spu_csa.h>
+#include <asm/spu_priv1.h>
 #include "spufs.h"
 
 #define SPU_MIN_TIMESLICE 	(100 * HZ / 1000)
@@ -363,7 +364,7 @@
 	 * We're likely to wait for interrupts on the same
 	 * CPU that we are now on, so send them here.
 	 */
-	spu_irq_setaffinity(spu, raw_smp_processor_id());
+	spu_cpu_affinity_set(spu, raw_smp_processor_id());
 	put_active_spu(spu);
 	return 0;
 }
Index: linus-2.6/include/asm-powerpc/spu_priv1.h
===================================================================
--- linus-2.6.orig/include/asm-powerpc/spu_priv1.h	2006-04-29 22:54:59.000000000 +0200
+++ linus-2.6/include/asm-powerpc/spu_priv1.h	2006-04-29 22:56:37.000000000 +0200
@@ -33,7 +33,7 @@
 	u64 (*int_mask_get) (struct spu *spu, int class);
 	void (*int_stat_clear) (struct spu *spu, int class, u64 stat);
 	u64 (*int_stat_get) (struct spu *spu, int class);
-	void (*int_route_set) (struct spu *spu, u64 route);
+	void (*cpu_affinity_set) (struct spu *spu, int cpu);
 	u64 (*mfc_dar_get) (struct spu *spu);
 	u64 (*mfc_dsisr_get) (struct spu *spu);
 	void (*mfc_dsisr_set) (struct spu *spu, u64 dsisr);
@@ -89,9 +89,9 @@
 }
 
 static inline void
-spu_int_route_set (struct spu *spu, u64 route)
+spu_cpu_affinity_set (struct spu *spu, int cpu)
 {
-	spu_priv1_ops->int_stat_get(spu, route);
+	spu_priv1_ops->cpu_affinity_set(spu, cpu);
 }
 
 static inline u64

--

[PATCH 10/13] cell: correctly detect systemsim host

[Arnd Bergmann]

From: Christian Krafft <krafft@de.ibm.com>
Systemsim uses a different compatible property in the device tree.

Signed-off-by: Christian Krafft <krafft@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: linus-2.6/arch/powerpc/platforms/cell/setup.c
===================================================================
--- linus-2.6.orig/arch/powerpc/platforms/cell/setup.c	2006-04-29 
22:53:51.000000000 +0200
+++ linus-2.6/arch/powerpc/platforms/cell/setup.c	2006-04-29 
22:54:32.000000000 +0200
@@ -201,10 +201,13 @@
 	 * more appropriate detection logic
 	 */
 	unsigned long root = of_get_flat_dt_root();
-	if (!of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
-		return 0;
+	if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0"))
+		return 1;
 
-	return 1;
+	if (of_flat_dt_is_compatible(root, "IBM,CPBW-SystemSim"))
+		return 1;
+
+	return 0;
 }
 
 /*

--